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1. 发明授权

US08661206B2 Hybrid hardware and software implementation of transactional memory access 有权
标题翻译：混合硬件和软件实现事务性内存访问
公开(公告)号：US08661206B2
公开(公告)日：2014-02-25
申请号：US12943848
申请日：2010-11-10
申请人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
发明人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
IPC分类号： G06F13/00
CPC分类号： G06F12/0806 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/30145 , G06F9/3834 , G06F9/3857 , G06F9/3859 , G06F9/467 , G06F9/528 , G06F12/0831 , G06F12/084 , G06F12/0848 , G06F2212/60 , G06F2212/621
摘要： Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
摘要翻译：本发明的实施例涉及计算机系统中事务性存储器访问的混合硬件和软件实现。包括事务高速缓存和常规高速缓存的处理器在包括策略管理器的计算机系统中被利用，该策略管理器选择第一模式（硬件模式）或第二模式（软件模式）之一来实现事务存储器访问。在硬件模式中，事务缓存用于执行读写存储器操作，并且在软件模式中，常规高速缓存用于执行读写存储器操作。

2. 发明申请

US20110055837A1 HYBRID HARDWARE AND SOFTWARE IMPLEMENTATION OF TRANSACTIONAL MEMORY ACCESS 有权
标题翻译：交互式存储器访问的混合硬件和软件实现
公开(公告)号：US20110055837A1
公开(公告)日：2011-03-03
申请号：US12943848
申请日：2010-11-10
申请人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
发明人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
IPC分类号： G06F9/46
CPC分类号： G06F12/0806 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/30145 , G06F9/3834 , G06F9/3857 , G06F9/3859 , G06F9/467 , G06F9/528 , G06F12/0831 , G06F12/084 , G06F12/0848 , G06F2212/60 , G06F2212/621
摘要： Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
摘要翻译：本发明的实施例涉及计算机系统中事务性存储器访问的混合硬件和软件实现。包括事务高速缓存和常规高速缓存的处理器在包括策略管理器的计算机系统中被利用，该策略管理器选择第一模式（硬件模式）或第二模式（软件模式）之一来实现事务存储器访问。在硬件模式中，事务缓存用于执行读写存储器操作，并且在软件模式中，常规高速缓存用于执行读写存储器操作。

3. 发明授权

US07856537B2 Hybrid hardware and software implementation of transactional memory access 有权
标题翻译：混合硬件和软件实现事务性内存访问
公开(公告)号：US07856537B2
公开(公告)日：2010-12-21
申请号：US10956179
申请日：2004-09-30
申请人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
发明人： Sanjeev Kumar , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
IPC分类号： G06F13/00 , G06F13/28 , G06F12/00
CPC分类号： G06F12/0806 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/30145 , G06F9/3834 , G06F9/3857 , G06F9/3859 , G06F9/467 , G06F9/528 , G06F12/0831 , G06F12/084 , G06F12/0848 , G06F2212/60 , G06F2212/621
摘要： Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
摘要翻译：本发明的实施例涉及计算机系统中事务性存储器访问的混合硬件和软件实现。包括事务高速缓存和常规高速缓存的处理器在包括策略管理器的计算机系统中被利用，该策略管理器选择第一模式（硬件模式）或第二模式（软件模式）之一来实现事务存储器访问。在硬件模式中，事务缓存用于执行读写存储器操作，并且在软件模式中，常规高速缓存用于执行读写存储器操作。

4. 发明申请

US20140136783A1 HYBRID HARDWARE AND SOFTWARE IMPLEMENTATION OF TRANSACTIONAL MEMORY ACCESS 审中-公开
标题翻译：交互式存储器访问的混合硬件和软件实现
公开(公告)号：US20140136783A1
公开(公告)日：2014-05-15
申请号：US13843890
申请日：2013-03-15
申请人： Sanjeev KUMAR , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
发明人： Sanjeev KUMAR , Christopher J. Hughes , Partha Kundu , Anthony Nguyen
IPC分类号： G06F12/08 , G06F9/46
CPC分类号： G06F12/0806 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/30145 , G06F9/3834 , G06F9/3857 , G06F9/3859 , G06F9/467 , G06F9/528 , G06F12/0831 , G06F12/084 , G06F12/0848 , G06F2212/60 , G06F2212/621
摘要： Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
摘要翻译：本发明的实施例涉及计算机系统中事务性存储器访问的混合硬件和软件实现。包括事务高速缓存和常规高速缓存的处理器在包括策略管理器的计算机系统中被利用，该策略管理器选择第一模式（硬件模式）或第二模式（软件模式）之一来实现事务存储器访问。在硬件模式中，事务缓存用于执行读写存储器操作，并且在软件模式中，常规高速缓存用于执行读写存储器操作。

5. 发明申请

US20060085591A1 Hybrid hardware and software implementation of transactional memory access 有权
标题翻译：混合硬件和软件实现事务性内存访问
公开(公告)号：US20060085591A1
公开(公告)日：2006-04-20
申请号：US10956179
申请日：2004-09-30
申请人： Sanjeev Kumar , Christopher Hughes , Partha Kundu , Anthony Nguyen
发明人： Sanjeev Kumar , Christopher Hughes , Partha Kundu , Anthony Nguyen
IPC分类号： G06F13/00
CPC分类号： G06F12/0806 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/30145 , G06F9/3834 , G06F9/3857 , G06F9/3859 , G06F9/467 , G06F9/528 , G06F12/0831 , G06F12/084 , G06F12/0848 , G06F2212/60 , G06F2212/621
摘要： Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
摘要翻译：本发明的实施例涉及计算机系统中事务性存储器访问的混合硬件和软件实现。包括事务高速缓存和常规高速缓存的处理器在包括策略管理器的计算机系统中被利用，该策略管理器选择第一模式（硬件模式）或第二模式（软件模式）之一来实现事务存储器访问。在硬件模式中，事务缓存用于执行读写存储器操作，并且在软件模式中，常规高速缓存用于执行读写存储器操作。

6. 发明申请

US20100073368A1 METHODS AND SYSTEMS TO DETERMINE CONSERVATIVE VIEW CELL OCCLUSION 有权
标题翻译：确定保守观察细胞的方法和系统
公开(公告)号：US20100073368A1
公开(公告)日：2010-03-25
申请号：US12234988
申请日：2008-09-22
申请人： Changkyu Kim , Jatin Chhugani , Christian Bienia , Daehyun Kim , Anthony Nguyen , Sanjeev Kumar
发明人： Changkyu Kim , Jatin Chhugani , Christian Bienia , Daehyun Kim , Anthony Nguyen , Sanjeev Kumar
IPC分类号： G06T15/40 , G06T15/00
CPC分类号： G06T15/40
摘要： Methods and systems to determine view cell occlusion, including to project objects of a 3-dimensional graphics environment to a 2-dimensional image plane with respect to the view point, to reduce sizes of corresponding object images, to generate an occluder map from the reduced-size object images, to compare at least a portion of the object images to the occluder map, and to identify an object as occluded with respect to the view cell when pixel depth values of the object image are greater than corresponding pixel depth values of the occluder map. Methods and systems to reduce an object image size include methods and systems to nullify pixel depth values within a radius of an edge pixel, and to determine the radius as a distance from the edge pixel to a second pixel so that a line between the view point and the second pixel is parallel with one or more of a line and a plane that is tangential to a sphere enclosing the view cell and a point on the object that corresponds to the edge pixel.
摘要翻译：确定观察细胞闭塞的方法和系统，包括将三维图形环境的对象相对于视点投影到二维图像平面，以减小相应对象图像的大小，从缩小的图像生成闭塞图将对象图像的尺寸调整为将至少一部分对象图像与遮挡物图进行比较，并且当对象图像的像素深度值大于对象图像的对应像素深度值时，识别相对于视图单元被遮挡的对象封堵器图。减少对象图像尺寸的方法和系统包括使边缘像素的半径内的像素深度值无效的方法和系统，并且将半径确定为距离边缘像素到第二像素的距离，使得视点并且第二像素平行于与包围视图单元的球体相切的线和平面以及与边缘像素对应的物体上的点的一个或多个。

7. 发明授权

US09819071B2 Antenna apparatus and method of making same 有权
公开(公告)号：US09819071B2
公开(公告)日：2017-11-14
申请号：US14422528
申请日：2012-08-20
申请人： Anthony Nguyen
发明人： Anthony Nguyen
IPC分类号： H01Q1/24 , H01Q9/42 , H01Q21/00 , H01Q21/30
CPC分类号： H01Q1/243 , H01Q9/42 , H01Q21/0087 , H01Q21/30
摘要： A housing defines a face bounded by opposed longitudinal and opposed lateral sidewalls. At least one conductive portion of at least one longitudinal sidewall is electrically isolated from at least one conductive portion of at least one of the lateral sidewalls by at least one corner section that is non-conductive or electrically floating. At least one antenna element internal to the housing is electrically coupled to radio frequency circuitry; and a conductor configured to electrically couple the at least one conductive portion of the at least one lateral sidewall between the opposed longitudinal portions to a ground plane. In a specific embodiment, there are two opposed corner sections each defined by first and second gaps, and the lateral conductive portion between the corner sections parasitically couples to the antenna element when transmitting or receiving. The corner sections may each have a corner conductive portion which are isolated by the gaps.

8. 发明申请

US20140038710A1 DYNAMIC VIEWS WITHIN GAMING ENVIRONMENTS 审中-公开
标题翻译：在游戏环境中的动态视图
公开(公告)号：US20140038710A1
公开(公告)日：2014-02-06
申请号：US13873106
申请日：2013-04-29
申请人： Scott Rudi , Anthony Nguyen
发明人： Scott Rudi , Anthony Nguyen
IPC分类号： A63F13/00
CPC分类号： A63F13/5258 , A63F2300/306 , A63F2300/577 , A63F2300/6684
摘要： Systems and methods for providing dynamic views for video game programs are provided herein. Exemplary methods for providing a dynamic view of a gaming environment may include continually calculating a bounding area of a gaming environment, the bounding area being defined by locations of a plurality of players relative to one another within the gaming environment, the bounding area changing as the plurality of players move relative to one another, as well as continually generating a top down view of the bounding area of the gaming environment, the top down view being dynamically altered as the bounding area is dynamically adjusted.
摘要翻译：本文提供了用于为视频游戏程序提供动态视图的系统和方法。用于提供游戏环境的动态视图的示例性方法可以包括连续地计算游戏环境的边界区域，边界区域由游戏环境内的多个玩家相对于彼此的位置定义，边界区域变化为多个玩家相对于彼此移动，并且连续地生成游戏环境的边界区域的俯视图，当动态地调整边界区域时，自上而下的视图被动态地改变。

9. 发明授权

US08636751B2 Methods and devices for the rerouting of chyme to induce intestinal brake 有权
标题翻译：用于重新路由食糜诱导肠内制动的方法和装置
公开(公告)号：US08636751B2
公开(公告)日：2014-01-28
申请号：US13104192
申请日：2011-05-10
申请人： Thomas E. Albrecht , Jeffrey L. Aldridge , Sean P. Conlon , Michael S. Cropper , Denzel Z. Herrera-Davis , Daniel F. Dlugos, Jr. , Jason L. Harris , Christopher J. Hess , Kevin L. Houser , Mario Gutierrez , Prasanna Malaviya , Amy L. Marcotte , Jeffrey D. Messerly , Anthony Nguyen , Mark S. Ortiz , Mark D. Overmyer , Alessandro Pastorelli , Galen C. Robertson , Frederick E. Shelton, IV , Michael J. Stokes , Foster B. Stulen , James W. Voegele , Lauren S. Weaner , Tamara S. Vetro Widenhouse , James A. Woodard, Jr. , Mark S. Zeiner
发明人： Thomas E. Albrecht , Jeffrey L. Aldridge , Sean P. Conlon , Michael S. Cropper , Denzel Z. Herrera-Davis , Daniel F. Dlugos, Jr. , Jason L. Harris , Christopher J. Hess , Kevin L. Houser , Mario Gutierrez , Prasanna Malaviya , Amy L. Marcotte , Jeffrey D. Messerly , Anthony Nguyen , Mark S. Ortiz , Mark D. Overmyer , Alessandro Pastorelli , Galen C. Robertson , Frederick E. Shelton, IV , Michael J. Stokes , Foster B. Stulen , James W. Voegele , Lauren S. Weaner , Tamara S. Vetro Widenhouse , James A. Woodard, Jr. , Mark S. Zeiner
IPC分类号： A61B17/10
CPC分类号： A61B17/00234 , A61B5/0031 , A61B5/036 , A61B5/073 , A61B5/076 , A61B5/1107 , A61B5/14532 , A61B5/14539 , A61B5/42 , A61B17/0469 , A61B17/1114 , A61B2017/00876 , A61B2017/1117 , A61B2017/1139 , A61B2560/0219 , A61F2/04 , A61F5/0013 , A61F2002/045
摘要： Methods and devices reroute chyme to induce intestinal brake in order to improve the effectiveness of bariatric surgical procedures and to improve comorbidity resolution. A bowel is manipulated to provide a shortened path for chyme to travel to the ileum. These methods and devices of rerouting chyme to induce intestinal brake may include one or more of a surgical procedure, an implanted device, or a combination of an implant with an improved surgical procedure.
摘要翻译：方法和装置重新路由食糜诱导肠道制动，以提高减肥手术的有效性和改善共病分解。肠道被操纵以提供用于食糜行进到回肠的缩短路径。用于诱导肠内制动器的这些重新路由食糜的方法和装置可以包括外科手术，植入装置或具有改进的外科手术的植入物的组合中的一种或多种。

10. 发明申请

US20130223484A1 Two-Channel Compact Small Form-Factor Pluggable Module 有权
标题翻译：双通道紧凑型小型可插拔模块
公开(公告)号：US20130223484A1
公开(公告)日：2013-08-29
申请号：US13403340
申请日：2012-02-23
申请人： Norman Tang , Liang Ping Peng , David Lai , Anthony Nguyen
发明人： Norman Tang , Liang Ping Peng , David Lai , Anthony Nguyen
IPC分类号： H04B1/38
CPC分类号： H04B10/40
摘要： An apparatus and method are provided for two-channel bidirectional communications between devices for enhanced data signals. In particular, the techniques describe a first transceiver channel configured to receive first data communications from a first transceiver port. A second transceiver channel is also configured to receive second data communications from a second transceiver port. A set of signal pins are configured to receive the first data communications from the first transceiver port at a first group of signal pins and to receive the second data communications from the second transceiver port at a second group of signal pins. The first group of signal pins comprises signal pins in a signal-signal-ground configuration and the second group of signal pins comprises signal pins in a ground-signal-signal-ground configuration.
摘要翻译：提供了用于增强数据信号的装置之间的双通道双向通信的装置和方法。特别地，这些技术描述了配置成从第一收发器端口接收第一数据通信的第一收发器通道。第二收发器通道还被配置为从第二收发器端口接收第二数据通信。一组信号引脚被配置为在第一组信号引脚处从第一收发器端口接收第一数据通信，并且在第二组信号引脚处接收来自第二收发器端口的第二数据通信。第一组信号引脚包括信号 - 信号 - 接地配置中的信号引脚，第二组信号引脚包括接地信号 - 接地配置中的信号引脚。

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