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1. 发明授权

US5172338A Multi-state EEprom read and write circuits and techniques 失效
标题翻译：多状态EEprom读写电路和技术
公开(公告)号：US5172338A
公开(公告)日：1992-12-15
申请号：US508273
申请日：1990-04-11
申请人： Sanjay Mehrotra , Eliyahou Harari , Winston Lee
发明人： Sanjay Mehrotra , Eliyahou Harari , Winston Lee
IPC分类号： G11C16/02 , G01R31/28 , G11C7/00 , G11C11/00 , G11C11/56 , G11C16/00 , G11C16/04 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/28 , G11C16/34
CPC分类号： G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C11/5642 , G11C16/10 , G11C16/16 , G11C16/28 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C7/04 , G11C2211/5621 , G11C2211/5631 , G11C2211/5634 , G11C2211/5645
摘要： Improvements in the circuits and techniques for read, write and erase of EEprom memory enable non-volatile multi-state memory to operate with enhanced performance over an extended period of time. In the improved circuits for normal read, and read between write or erase for verification, the reading is made relative to a set of threshold levels as provided by a corresponding set of reference cells which closely track and make adjustment for the variations presented by the memory cells. In one embodiment, each Flash sector of memory cells has its own reference cells for reading the cells in the sector, and a set of reference cells also exists for the whole memory chip acting as a master reference. In another embodiment, the reading is made relative to a set of threshold levels simultaneously by means of a one-to-many current mirror circuit. In improved write or erase circuits, verification of the written or erased data is done in parallel on a group of memory cells at a time and a circuit selectively inhibits further write or erase to those cells which have been correctly verified. Other improvements includes programming the ground state after erase, independent and variable power supply for the control gate of EEprom memory cells.
摘要翻译： EEprom存储器的读，写和擦除电路和技术的改进使非易失性多态存储器能够在更长的时间内以更高的性能运行。在用于正常读取和用于读取或擦除之间的读取和读取的改进电路进行验证之前，相对于由对应的一组参考单元提供的一组阈值电平进行读取，所述一组参考单元紧密地跟踪和调整由存储器呈现的变化细胞。在一个实施例中，存储器单元的每个闪存扇区具有其自己的用于读取扇区中的单元的参考单元，并且对于用作主参考的整个存储器芯片也存在一组参考单元。在另一个实施例中，通过一对多电流镜像电路同时进行相对于一组阈值电平的读取。在改进的写入或擦除电路中，写入或擦除的数据的验证一次在一组存储器单元上并行完成，并且电路选择性地禁止对已经被正确验证的那些单元进一步写入或擦除。其他改进包括对擦除后的基准状态进行编程，独立和可变的电源为EEprom存储器单元的控制栅极。

2. 发明授权

US5163021A Multi-state EEprom read and write circuits and techniques 失效
标题翻译：多状态EEprom读写电路和技术
公开(公告)号：US5163021A
公开(公告)日：1992-11-10
申请号：US734221
申请日：1991-07-22
申请人： Sanjay Mehrotra , Eliyahou Harari , Winston Lee
发明人： Sanjay Mehrotra , Eliyahou Harari , Winston Lee
IPC分类号： G11C11/56 , G11C16/10 , G11C16/16 , G11C16/34
CPC分类号： G11C7/04 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C11/5642 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5631 , G11C2211/5634 , G11C2211/5645
摘要： Improvements in the circuits and techniques for read, write and erase of EEprom memory enable nonvolatile multi-state memory to operate with enhanced performance over an extended period of time. In the improved circuits for normal read, and read between write or erase for verification, the reading is made relative to a set of threshold levels as provided by a corresponding set of reference cells which closely track and make adjustment for the variations presented by the memory cells. In one embodiment, each Flash sector of memory cells has its own reference cells for reading the cells in the sector, and a set of reference cells also exists for the whole memory chip acting as a master reference. In another embodiment, the reading is made relative to a set of threshold levels simultaneously by means of a one-to-many current mirror circuit. In improved write or erase circuits, verification of the written or erased data is done in parallel on a group of memory cells at a time and a circuit selectively inhibits further write or erase to those cells which have been correctly verified. Other improvements includes programming the ground state after erase, independent and variable power supply for the control gate of EEprom memory cells.
摘要翻译：用于读，写和擦除EEprom存储器的电路和技术的改进使非易失性多状态存储器能够在更长的时间内以更高的性能运行。在用于正常读取和用于读取或擦除之间的读取和读取的改进电路进行验证之前，相对于由对应的一组参考单元提供的一组阈值电平进行读取，所述一组参考单元紧密地跟踪和调整由存储器呈现的变化细胞。在一个实施例中，存储器单元的每个闪存扇区具有其自己的用于读取扇区中的单元的参考单元，并且对于用作主参考的整个存储器芯片也存在一组参考单元。在另一个实施例中，通过一对多电流镜像电路同时进行相对于一组阈值电平的读取。在改进的写入或擦除电路中，写入或擦除的数据的验证一次在一组存储器单元上并行完成，并且电路选择性地禁止对已经被正确验证的那些单元进一步写入或擦除。其他改进包括对擦除后的基准状态进行编程，独立和可变的电源为EEprom存储器单元的控制栅极。

3. 发明授权

US07362618B2 Flash EEprom system 失效
标题翻译： Flash EEprom系统
公开(公告)号：US07362618B2
公开(公告)日：2008-04-22
申请号：US10417954
申请日：2003-04-16
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/04
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
摘要翻译：具有控制电路的闪存EEprom存储器芯片的系统用作诸如由磁盘驱动器提供的非易失性存储器。改进包括选择性多扇区擦除，其中Flash扇区的任何组合可以一起被擦除。所选组合中的选择扇区也可以在擦除操作期间被取消选择。另一个改进是使用替代细胞重新映射和替换有缺陷的细胞的能力。一旦检测到有缺陷的单元，就会自动执行重新映射。当Flash扇区的缺陷数量变大时，整个扇区被重新映射。另一个改进是使用写高速缓存来减少写入闪存EEPROM存储器的数量，从而最小化对器件进行过多写/擦循环的应力。

4. 发明授权

US07266017B2 Method for selective erasing and parallel programming/verifying of cell blocks in a flash EEprom system 失效
标题翻译：用于在闪存EEprom系统中选择性擦除和并行编程/验证单元块的方法
公开(公告)号：US07266017B2
公开(公告)日：2007-09-04
申请号：US09867836
申请日：2001-05-30
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/34 , G11C16/10
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. A chunk of user data is programmed into a group of memory cells in parallel, the programming of individual memory cells being terminated when they are determined to have reached desired threshold level ranges while the programming of other memory cells continues. Other improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
摘要翻译：具有控制电路的闪存EEprom存储器芯片的系统用作诸如由磁盘驱动器提供的非易失性存储器。一组用户数据被并行地编程到一组存储器单元中，当确定其已经达到期望的阈值电平范围时，各个存储器单元的编程被终止，同时其它存储器单元的编程继续进行。其他改进包括选择性多扇区擦除，其中Flash扇区的任何组合可以一起被擦除。所选组合中的选择扇区也可以在擦除操作期间被取消选择。另一个改进是使用替代细胞重新映射和替换有缺陷的细胞的能力。一旦检测到有缺陷的单元，就会自动执行重新映射。当Flash扇区的缺陷数量变大时，整个扇区被重新映射。另一个改进是使用写高速缓存来减少写入闪存EEPROM存储器的数量，从而最小化对器件进行过多写/擦循环的应力。

5. 发明授权

US06373747B1 Flash EEprom system 失效
公开(公告)号：US06373747B1
公开(公告)日：2002-04-16
申请号：US09059815
申请日：1998-04-14
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C1606
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.

6. 发明授权

US5862080A Multi-state flash EEprom system with defect handling 失效
标题翻译：具有缺陷处理的多状态闪存EEprom系统
公开(公告)号：US5862080A
公开(公告)日：1999-01-19
申请号：US999489
申请日：1997-12-29
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/02 , G06F3/06 , G06F11/10 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/12 , G06F12/16 , G11C5/00 , G11C8/02 , G11C8/12 , G11C11/56 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/34 , G11C17/00 , G11C29/00 , G11C29/04 , G11C29/26 , G11C29/34 , G11C29/52 , H01L21/82 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G11C16/04
CPC分类号： G11C29/26 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/52 , G11C29/765 , G11C29/82 , G11C7/1039 , G11C8/12 , G06F11/1068 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18 , G11C29/00 , G11C29/34
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
摘要翻译：具有控制电路的闪存EEprom存储器芯片的系统用作诸如由磁盘驱动器提供的非易失性存储器。改进包括选择性多扇区擦除，其中Flash扇区的任何组合可以一起被擦除。所选组合中的选择扇区也可以在擦除操作期间被取消选择。另一个改进是使用替代细胞重新映射和替换有缺陷的细胞的能力。一旦检测到有缺陷的单元，就会自动执行重新映射。当Flash扇区的缺陷数量变大时，整个扇区被重新映射。另一个改进是使用写高速缓存来减少写入闪存EEPROM存储器的数量，从而最小化对器件进行过多写/擦循环的应力。

7. 发明授权

US5418752A Flash EEPROM system with erase sector select 失效
标题翻译：具有擦除扇区选择的闪存EEPROM系统
公开(公告)号：US5418752A
公开(公告)日：1995-05-23
申请号：US963851
申请日：1992-10-20
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/02 , G06F3/06 , G06F11/10 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/12 , G06F12/16 , G11C5/00 , G11C8/02 , G11C8/12 , G11C11/56 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/34 , G11C17/00 , G11C29/00 , G11C29/04 , G11C29/26 , G11C29/34 , G11C29/52 , H01L21/82 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G11C7/00
CPC分类号： G11C29/26 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/52 , G11C29/765 , G11C29/82 , G11C7/1039 , G11C8/12 , G06F11/1068 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18 , G11C29/00 , G11C29/34
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
摘要翻译：具有控制电路的闪存EEprom存储器芯片的系统用作诸如由磁盘驱动器提供的非易失性存储器。改进包括选择性多扇区擦除，其中Flash扇区的任何组合可以一起被擦除。所选组合中的选择扇区也可以在擦除操作期间被取消选择。另一个改进是使用替代细胞重新映射和替换有缺陷的细胞的能力。一旦检测到有缺陷的单元，就会自动执行重新映射。当Flash扇区的缺陷数量变大时，整个扇区被重新映射。另一个改进是使用写高速缓存来减少写入闪存EEPROM存储器的数量，从而最小化对器件进行过多写/擦循环的应力。

8. 发明申请

US20050286336A1 Flash EEprom system 审中-公开
公开(公告)号：US20050286336A1
公开(公告)日：2005-12-29
申请号：US10641210
申请日：2003-08-13
申请人： Eliyahou Harari , Robert Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert Norman , Sanjay Mehrotra
IPC分类号： G11C16/02 , G06F3/06 , G06F11/10 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/12 , G06F12/16 , G11C5/00 , G11C8/02 , G11C8/12 , G11C11/56 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/34 , G11C17/00 , G11C29/00 , G11C29/04 , G11C29/26 , G11C29/34 , G11C29/52 , H01L21/82 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.

9. 发明授权

US06914846B2 Flash EEprom system 失效
标题翻译： Flash EEprom系统
公开(公告)号：US06914846B2
公开(公告)日：2005-07-05
申请号：US10331081
申请日：2002-12-26
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G11C16/02 , G06F3/06 , G06F11/10 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/12 , G06F12/16 , G11C5/00 , G11C8/02 , G11C8/12 , G11C11/56 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/34 , G11C17/00 , G11C29/00 , G11C29/04 , G11C29/26 , G11C29/34 , G11C29/52 , H01L21/82 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G11C8/00 , G11C7/00 , G11C16/04
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
摘要翻译：具有控制电路的闪存EEprom存储器芯片的系统用作诸如由磁盘驱动器提供的非易失性存储器。改进包括选择性多扇区擦除，其中Flash扇区的任何组合可以一起被擦除。所选组合中的选择扇区也可以在擦除操作期间被取消选择。另一个改进是使用替代细胞重新映射和替换有缺陷的细胞的能力。一旦检测到有缺陷的单元，就会自动执行重新映射。当Flash扇区的缺陷数量变大时，整个扇区被重新映射。另一个改进是使用写高速缓存来减少写入闪存EEPROM存储器的数量，从而最小化对器件进行过多写/擦循环的应力。

10. 发明授权

US06684345B2 Flash EEprom system 失效
公开(公告)号：US06684345B2
公开(公告)日：2004-01-27
申请号：US10330455
申请日：2002-12-26
申请人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
发明人： Eliyahou Harari , Robert D. Norman , Sanjay Mehrotra
IPC分类号： G06F1100
CPC分类号： G11C29/26 , G06F3/0601 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F3/0688 , G06F11/1068 , G06F12/0246 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0875 , G06F12/123 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G06F2212/7201 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208 , G11C7/1039 , G11C8/12 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C16/16 , G11C16/3436 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459 , G11C29/00 , G11C29/34 , G11C29/52 , G11C29/765 , G11C29/82 , G11C2211/5621 , G11C2211/5634 , G11C2211/5643 , G11C2216/18
摘要： A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.

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