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1. 发明申请

US20150187869A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150187869A1
公开(公告)日：2015-07-02
申请号：US14272009
申请日：2014-05-07
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Hoon PARK , Kyu Hyun Mo , Jae Kyu Sung , Kee Ju Um , In Hyuk Song
IPC分类号： H01L29/06 , H01L29/10 , H01L29/739
CPC分类号： H01L29/063 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/7397 , H01L29/74 , H01L29/7802 , H01L29/7813
摘要： A power semiconductor device may include: a first conductivity-type first semiconductor region; a resurf region disposed in the first semiconductor region and including first conductivity-type second semiconductor regions and second conductivity-type third semiconductor regions alternately disposed in a width direction; a first conductivity-type first cover region disposed in the first semiconductor region, disposed to be contiguous with an upper surface of the resurf region, and having an impurity concentration higher than that of the first semiconductor region; a second conductivity-type fourth semiconductor region disposed above the first semiconductor region; a first conductivity-type fifth semiconductor region disposed on an inner side of an upper portion of the fourth semiconductor region; and a trench gate disposed to penetrate from the fifth semiconductor region to a portion of an upper portion of the first semiconductor region and including a gate insulating layer and a conductive material.
摘要翻译：功率半导体器件可以包括：第一导电类型的第一半导体区域; 设置在所述第一半导体区域中并且包括在宽度方向上交替布置的第一导电类型的第二半导体区域和第二导电类型的第三半导体区域的再生区域; 设置在所述第一半导体区域中的第一导电类型的第一覆盖区域，被设置为与所述复原区域的上表面邻接，并且具有高于所述第一半导体区域的杂质浓度的杂质浓度; 设置在所述第一半导体区域上方的第二导电型第四半导体区域; 设置在第四半导体区域的上部的内侧的第一导电型第五半导体区域; 以及沟槽栅极，设置成从第五半导体区域穿透到第一半导体区域的上部的一部分，并且包括栅极绝缘层和导电材料。

2. 发明申请

US20160013268A1 POWER SEMICONDUCTOR DEVICE 有权
标题翻译：功率半导体器件
公开(公告)号：US20160013268A1
公开(公告)日：2016-01-14
申请号：US14617158
申请日：2015-02-09
申请人： Samsung Electro-Mechanics Co., Ltd.
发明人： Kyu Hyun MO , Dong Soo SEO , Chang Su JANG , Jae Hoon PARK , In Hyuk SONG
IPC分类号： H01L29/06 , H01L29/423 , H01L29/78
CPC分类号： H01L29/0634 , H01L29/0865 , H01L29/1095 , H01L29/42356 , H01L29/7397 , H01L29/7813 , H01L29/7827
摘要： A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size.
摘要翻译：功率半导体器件可以包括第一导电类型半导体衬底，设置在第一导电类型半导体衬底上的超接合部分，并且包括交替排列的第一导电型柱和第二导电型柱，并且三维（3D）门部分，设置在第一导电型柱上。 3D栅极部分设置在第一导电型柱上以减小第一和第二导电型柱的宽度，从而有效地减小了器件尺寸。

3. 发明申请

US20150187877A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150187877A1
公开(公告)日：2015-07-02
申请号：US14273164
申请日：2014-05-08
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Hoon PARK , Jae Kyu SUNG , In Hyuk SONG , Kee Ju UM , Dong Soo SEO
IPC分类号： H01L29/08 , H01L29/739
CPC分类号： H01L29/407 , H01L29/0615 , H01L29/0638 , H01L29/0878 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A power semiconductor device may include: an active region having a channel formed therein when the power semiconductor device is turned on, the channel allowing a current to flow therethrough; a termination region formed around the active region; first trenches formed in the active region, each first trench having an insulating layer formed on a surface thereof and filled with a conductive material; and second trenches formed in the termination region, each second trench having an insulating layer formed on a surface thereof and filled with a conductive material.
摘要翻译：功率半导体器件可以包括：当功率半导体器件导通时，其中形成有沟道的有源区，允许电流流过的沟道; 形成在有源区周围的端接区域; 在有源区中形成的第一沟槽，每个第一沟槽在其表面上形成有填充有导电材料的绝缘层; 以及形成在端接区域中的第二沟槽，每个第二沟槽在其表面上形成有填充有导电材料的绝缘层。

4. 发明申请

US20150187678A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150187678A1
公开(公告)日：2015-07-02
申请号：US14270894
申请日：2014-05-06
申请人： Samsung Electro-Mechanics Co., Ltd.
发明人： Jae Hoon PARK , Sun Jae Yoon , Chang Su Jang , Kee Ju Um , In Hyuk Song
IPC分类号： H01L23/373
CPC分类号： H01L23/367 , H01L29/0834 , H01L29/7397 , H01L29/7813 , H01L2924/0002 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： A power semiconductor device may include: a first conductivity-type first semiconductor layer; a second conductivity-type second semiconductor layer disposed above the first semiconductor layer; and a heat dissipation trench disposed to penetrate from an upper surface of the second semiconductor layer into a portion of the second semiconductor layer and having an insulating layer disposed on a surface thereof.
摘要翻译：功率半导体器件可以包括：第一导电型第一半导体层; 设置在所述第一半导体层上方的第二导电型第二半导体层; 以及散热沟，其设置成从所述第二半导体层的上表面穿透到所述第二半导体层的一部分中，并且具有设置在其表面上的绝缘层。

5. 发明申请

US20150171198A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150171198A1
公开(公告)日：2015-06-18
申请号：US14271244
申请日：2014-05-06
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： In Hyuk SONG , Kee Ju UM , Chang Su JANG , Jae Hoon PARK , Dong Soo SEO
IPC分类号： H01L29/739 , H01L29/06 , H01L29/10
CPC分类号： H01L29/7397 , H01L29/0615 , H01L29/0619 , H01L29/0878 , H01L29/4236 , H01L29/7811 , H01L29/7813
摘要： A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; a termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; and a hole accumulating region formed in the active region and below the channel and having a first conductivity type. A trench disposed at a boundary between the termination region and the active region has a depth shallower than that of a trench adjacent thereto.
摘要翻译：功率半导体器件可以包括：在功率半导体器件的导通操作时具有流过其中形成的沟道的电流的有源区; 形成在有源区附近的端接区域; 在所述有源区的长度方向上形成的多个沟槽; 以及形成在所述有源区域中并且在所述沟道下方并具有第一导电类型的孔积聚区域。设置在终端区域和有源区域之间的边界处的沟槽的深度比与其相邻的沟槽的深度浅。

6. 发明申请

US20150187921A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150187921A1
公开(公告)日：2015-07-02
申请号：US14273159
申请日：2014-05-08
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Hoon PARK , In Hyuk SONG , Dong Soo SEO , Ji Yeon OH , Kee Ju UM
IPC分类号： H01L29/739 , H01L29/10 , H01L29/06
CPC分类号： H01L29/7397 , H01L29/0856 , H01L29/0873 , H01L29/1025 , H01L29/1095 , H01L29/267 , H01L29/7802 , H01L29/7813
摘要： A power semiconductor device may include a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed in an upper portion of the first semiconductor region; a third semiconductor region having a first conductivity type and formed in an upper portion of the second semiconductor region; and a trench gate formed by penetrating from the third semiconductor region to the first semiconductor region. A portion of at least one of the first semiconductor region, the second semiconductor region, and the third semiconductor region may include a device protection material of which a conduction band has a main state and a satellite state in an E-k diagram, and a curvature of the device protection material in the satellite state may be lower than a curvature thereof in the main state in the E-k diagram.
摘要翻译：功率半导体器件可以包括具有第一导电类型的第一半导体区域; 具有第二导电类型并形成在第一半导体区域的上部的第二半导体区域; 具有第一导电类型并形成在第二半导体区域的上部的第三半导体区域; 以及通过从第三半导体区域穿透到第一半导体区域而形成的沟槽栅极。第一半导体区域，第二半导体区域和第三半导体区域中的至少一个的一部分可以包括在Ek图中导带具有主状态和卫星状态的器件保护材料，以及曲率处于卫星状态的器件保护材料可能低于Ek图中主状态下的曲率。

7. 发明申请

US20150187919A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150187919A1
公开(公告)日：2015-07-02
申请号：US14221972
申请日：2014-03-21
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： In Hyuk SONG , Dong Soo SEO , Kyu Hyun MO , Chang Su JANG , Jae Hoon PARK
IPC分类号： H01L29/739 , H01L29/06
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0865 , H01L29/0878 , H01L29/1095 , H01L29/74 , H01L29/7813
摘要： A provided a power semiconductor device may include: a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type formed on the first semiconductor region; a plurality of trench gates formed to penetrate through the second semiconductor region and lengthily formed in one direction; and a third semiconductor region of the first conductive type formed on the second semiconductor region, formed at least partially in a length direction between the plurality of trench gates, and formed to contact one side of an adjacent trench gate in a width direction.
摘要翻译：提供功率半导体器件的A可以包括：第一导电类型的第一半导体区域; 形成在第一半导体区域上的第二导电类型的第二半导体区域; 多个沟槽栅极，形成为穿过所述第二半导体区域并且沿一个方向长时间地形成; 以及第一导电类型的第三半导体区域，形成在所述第二半导体区域上，至少部分地在所述多个沟槽栅极之间的长度方向上形成，并且形成为在宽度方向上接触相邻沟槽栅极的一侧。

8. 发明申请

US20150187868A1 POWER SEMICONDUCTOR DEVICE 有权
标题翻译：功率半导体器件
公开(公告)号：US20150187868A1
公开(公告)日：2015-07-02
申请号：US14243873
申请日：2014-04-02
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Hoon PARK , Ji Hye KIM , Kyu Hyun MO , Dong Soo SEO , In Hyuk SONG
IPC分类号： H01L29/06 , H01L29/10 , H01L29/739
CPC分类号： H01L29/063 , H01L29/1095 , H01L29/7397
摘要： A power semiconductor device may include: an active region in which a current flows through a channel formed when the device being turned on; a termination region disposed around the active region; a first semiconductor region of a first conductive type disposed in the termination region in a direction from the active region to the termination region; and a second semiconductor region of a second conductive type disposed in the termination region in the direction from the active region to the termination region, the first semiconductor region and the second semiconductor region being disposed alternately.
摘要翻译：功率半导体器件可以包括：有源区域，其中电流流过当器件导通时形成的沟道; 设置在所述有源区域周围的端接区域; 第一导电类型的第一半导体区域，设置在从有源区域到端接区域的方向上的端接区域中; 以及第二导电类型的第二半导体区域，其设置在从所述有源区域到所述端接区域的方向上的所述端接区域中，所述第一半导体区域和所述第二半导体区域交替布置。

9. 发明申请

US20150144994A1 POWER SEMICONDUCTOR DEVICE 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20150144994A1
公开(公告)日：2015-05-28
申请号：US14329378
申请日：2014-07-11
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Kyu SUNG , Dong Soo SEO , Chang Su Jang , Jae Hoon PARK , In Hyuk SONG
IPC分类号： H01L29/739 , H01L29/417
CPC分类号： H01L29/7397 , H01L29/4232
摘要： A power semiconductor device may include: a first semiconductor layer having a first conductivity type; a second semiconductor layer formed on the first semiconductor layer, having a concentration of impurities higher than that of the first semiconductor layer, and having the first conductivity type; a third semiconductor layer formed on the second semiconductor layer and having a second conductivity type; a fourth semiconductor layer formed in an upper surface of the third semiconductor layer and having the first conductivity type; and trench gates penetrating from the fourth semiconductor layer into a portion of the first semiconductor layer and having gate insulating layers formed on surfaces thereof. The trench gates have a first gate, a second gate, and a third gate are sequentially disposed from a lower portion thereof, and the first gate, the second gate, and the third gate are insulated from each other by gate insulating films.
摘要翻译：功率半导体器件可以包括：具有第一导电类型的第一半导体层; 形成在第一半导体层上的第二半导体层，其杂质浓度高于第一半导体层，其具有第一导电类型; 形成在第二半导体层上并具有第二导电类型的第三半导体层; 形成在第三半导体层的上表面并具有第一导电类型的第四半导体层; 以及从第四半导体层穿入第一半导体层的一部分并且在其表面上形成有栅极绝缘层的沟槽栅极。沟槽栅极具有第一栅极，第二栅极和第三栅极，从其下部依次配置，并且第一栅极，第二栅极和第三栅极通过栅极绝缘膜彼此绝缘。

10. 发明申请

US20150123164A1 POWER SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US20150123164A1
公开(公告)日：2015-05-07
申请号：US14273341
申请日：2014-05-08
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Jae Hoon PARK , Jae Kyu SUNG , In Hyuk SONG , Ji Yeon OH , Dong Soo SEO
IPC分类号： H01L29/739 , H01L29/78 , H01L29/74 , H01L29/66
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/4236 , H01L29/66348 , H01L29/66734 , H01L29/74 , H01L29/7813 , H01L29/7827
摘要： A power semiconductor device may include a first conductivity type first semiconductor region; a second conductivity type second semiconductor region formed on an upper portion of the first semiconductor region; a first conductivity type third semiconductor region formed in an upper inner side of the second semiconductor region; a trench gate formed to penetrate through a portion of the first semiconductor region from the third semiconductor region; and a first conductivity type fourth semiconductor region formed below the second semiconductor region while being spaced apart from the trench gate.
摘要翻译：功率半导体器件可以包括第一导电类型的第一半导体区域; 形成在所述第一半导体区域的上部的第二导电类型的第二半导体区域; 形成在第二半导体区域的上内侧的第一导电型第三半导体区域; 形成为从第三半导体区域穿过第一半导体区域的一部分的沟槽栅极; 以及在与所述沟槽栅极间隔开的状态下，形成在所述第二半导体区域的下方的第一导电型第四半导体区域

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