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1. 发明授权

US11527273B2 Column control circuit and semiconductor device including the same 有权
公开(公告)号：US11527273B2
公开(公告)日：2022-12-13
申请号：US17331368
申请日：2021-05-26
申请人： SK hynix Inc.
发明人： Kyung Ho Chu , Soo Bin Lim , Yong Suk Joo
IPC分类号： G11C7/10 , G11C7/12 , G11C7/08 , G11C7/22
摘要： A column control circuit may include a column control signal generation circuit and a column access block signal generation circuit. The column control signal generation circuit is configured to activate an input/output strobe signal when a column access block signal is deactivated. The column control signal generation circuit is configured to deactivate the input/output strobe signal when the column access block signal is activated. The column access block signal generation circuit is configured to activate the column access block signal when gap-less read commands may be inputted. The column access block signal generation circuit may deactivate the column access block signal during a period corresponding to an N-th read command among the gap-less read commands. N is an integer that is no less than 2.

2. 发明授权

US09129705B2 Semiconductor devices 有权
标题翻译：半导体器件
公开(公告)号：US09129705B2
公开(公告)日：2015-09-08
申请号：US14251222
申请日：2014-04-11
申请人： SK hynix Inc.
发明人： Yong Suk Joo
IPC分类号： G11C7/00 , G11C11/4076 , G11C11/409
CPC分类号： G11C11/4076 , G11C7/1018 , G11C7/1093 , G11C11/409
摘要： The semiconductor device includes an input clock generator and a data input unit. The input clock generator generates an input clock signal including a first pulse and a second pulse, wherein the first pulse is generated in response to a write signal and a write latency signal and the second pulse is generated in response to an external command signal and a burst length signal. The data input unit receives data and generates first input data in response to the first pulse of the input clock signal and receives the data and generates second input data in response of the second pulse of the input clock signal.
摘要翻译：半导体器件包括输入时钟发生器和数据输入单元。输入时钟发生器产生包括第一脉冲和第二脉冲的输入时钟信号，其中响应于写入信号和写入等待时间信号产生第一脉冲，并且响应于外部命令信号和第二脉冲产生第二脉冲突发长度信号。数据输入单元响应于输入时钟信号的第一脉冲接收数据并产生第一输入数据，并接收数据并根据输入时钟信号的第二脉冲产生第二输入数据。

3. 发明授权

US09761328B2 Test mode circuit with serialized I/O and semiconductor memory device including the same 有权
公开(公告)号：US09761328B2
公开(公告)日：2017-09-12
申请号：US14878905
申请日：2015-10-08
申请人： SK hynix Inc.
发明人： Geun Ho Choi , Yong Suk Joo
IPC分类号： G11C29/12 , G11C29/18 , G11C29/32 , G11C29/36
CPC分类号： G01R31/3177 , G01R31/28 , G11C29/1201 , G11C29/12015 , G11C29/18 , G11C29/32 , G11C29/36
摘要： A semiconductor system may include a controller and a semiconductor device. The controller may output command/address signals. The semiconductor device may generate a plurality of control codes from the command/address signals in a test mode according to a combination of the command/address signals. The semiconductor device may output a first output datum generated by serializing the plurality of control codes, and the first output datum, through a single pad.

4. 发明授权

US11049534B2 Column control circuit and semiconductor device including the same 有权
公开(公告)号：US11049534B2
公开(公告)日：2021-06-29
申请号：US16809266
申请日：2020-03-04
申请人： SK hynix Inc.
发明人： Kyung Ho Chu , Soo Bin Lim , Yong Suk Joo
IPC分类号： G11C8/18 , G11C7/12 , G11C7/08 , G11C7/10 , G11C7/22
摘要： A column control circuit may include a column control signal generation circuit and a column access block signal generation circuit. The column control signal generation circuit is configured to activate an input/output strobe signal when a column access block signal is deactivated. The column control signal generation circuit is configured to deactivate the input/output strobe signal when the column access block signal is activated. The column access block signal generation circuit is configured to activate the column access block signal when gap-less read commands may be inputted. The column access block signal generation circuit may deactivate the column access block signal during a period corresponding to an N-th read command among the gap-less read commands. N is an integer that is no less than 2.

5. 发明授权

US10790038B2 Semiconductor apparatus and test system including the semiconductor apparatus 有权
公开(公告)号：US10790038B2
公开(公告)日：2020-09-29
申请号：US16216748
申请日：2018-12-11
申请人： SK hynix Inc.
发明人： Soo Young Jang , Kyu Bong Kong , Geun Il Lee , Yong Suk Joo , Kyung Ho Chu
IPC分类号： G11C29/10 , G11C29/52 , G11C7/10
摘要： A semiconductor apparatus includes: a pad unit comprising a plurality of data input/output (I/O) pads and a plurality of error detection code pads; an error detection code (EDC) read path configured to generate a plurality of EDCs by performing an error detection operation on a plurality of data, and output the plurality of EDCs through the plurality of error detection code pads; a comparison circuit configured to generate a comparison result signal by comparing the plurality of EDCs; and a data read path configured to output the comparison result signal through any one of the plurality of data I/O pads.

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