专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20200185026A1 SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF 审中-公开
公开(公告)号：US20200185026A1
公开(公告)日：2020-06-11
申请号：US16682696
申请日：2019-11-13
申请人： SK hynix Inc.
发明人： Tae-Sik YUN , Dae-Suk KIM , Seok-Cheol YOON , No-Guen JOO
IPC分类号： G11C11/406 , G11C11/4091 , G11C11/408 , G11C11/4076
摘要： A semiconductor memory device includes: a plurality of banks each including a plurality of cell mats and a plurality of sense amplifiers shared by adjacent cell mats; and a bank control circuit suitable for activating a normal word line of a particular cell mat of a bank selected according to a refresh command including bank information, and activating a target word line of a cell mat that does not share a sense amplifier with the particular cell mat according to a target refresh command after a preset delay time.

2. 发明申请

US20160293243A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20160293243A1
公开(公告)日：2016-10-06
申请号：US14854990
申请日：2015-09-15
申请人： SK hynix Inc.
发明人： No-Guen JOO , Do-Hong KIM , Jae-Il KIM
IPC分类号： G11C11/406 , G11C17/16 , G11C29/00 , G11C11/408
CPC分类号： G11C29/783 , G11C11/406 , G11C11/40615 , G11C11/40618
摘要： A semiconductor memory device may include a memory bank having a plurality of word lines arranged at a predetermined address interval, an address latching unit suitable for storing a target address corresponding to a target word line of the plurality of word lines, and a refresh control unit suitable for performing a refresh operation on first to Nth word lines having different address intervals from the target word line based on the target address in response to a smart refresh command, wherein N is a natural number.
摘要翻译：半导体存储器件可以包括具有以预定地址间隔布置的多个字线的存储体，适于存储对应于多个字线的目标字线的目标地址的地址锁存单元，以及刷新控制单元适合于响应于智能刷新命令，基于目标地址，从与目标字线不同的地址间隔的第一至第N字线执行刷新操作，其中N是自然数。

3. 发明申请

US20180061485A1 REFRESH CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING SAME 审中-公开
公开(公告)号：US20180061485A1
公开(公告)日：2018-03-01
申请号：US15804438
申请日：2017-11-06
申请人： SK hynix Inc.
发明人： No-Guen JOO
IPC分类号： G11C11/406
CPC分类号： G11C11/40618 , G11C11/406 , G11C11/40603
摘要： A memory device may include: at least one memory bank; and a control circuit suitable for: refreshing the at least one memory bank through a first refresh operation in response to a refresh command; and refreshing the at least one memory bank through a second refresh operation when an active operation is performed between a current refresh command and a previous refresh command.

4. 发明申请

US20170140811A1 REFRESH CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING SAME 有权
公开(公告)号：US20170140811A1
公开(公告)日：2017-05-18
申请号：US15093418
申请日：2016-04-07
申请人： SK hynix Inc.
发明人： No-Guen JOO
IPC分类号： G11C11/406
CPC分类号： G11C11/40618 , G11C11/406 , G11C11/40603
摘要： A memory device may include: at least one memory bank; and a control circuit suitable for: refreshing the at least one memory bank through a first refresh operation in response to a refresh command; and refreshing the at least one memory bank through a second refresh operation when an active operation is performed between a current refresh command and a previous refresh command.

5. 发明申请

US20160111140A1 SEMICONDUCTOR DEVICE AND METHOD OF DRIVING THE SAME 有权
标题翻译：半导体器件及其驱动方法
公开(公告)号：US20160111140A1
公开(公告)日：2016-04-21
申请号：US14656257
申请日：2015-03-12
申请人： SK hynix Inc.
发明人： No-Guen JOO , Jae-Il KIM
IPC分类号： G11C11/406 , G11C11/408
CPC分类号： G11C11/40611 , G11C11/40615 , G11C11/40618
摘要： A semiconductor device includes a 1st controller suitable for generating refresh control signals for controlling two or more types of refresh operations according to an external refresh signal; and a 2nd controller suitable for controlling a plurality of word lines according to the refresh control signals such that the two or more types of refresh operations are alternately performed a predetermined number of times during a unit refresh period corresponding to the external refresh signal.
摘要翻译：半导体器件包括：适于产生刷新控制信号的第一控制器，用于根据外部刷新信号控制两种或多种类型的刷新操作; 以及适于根据刷新控制信号控制多个字线的第二控制器，使得在对应于外部刷新信号的单元刷新周期期间，两种或更多种类型的刷新操作被交替执行预定次数。

6. 发明申请

US20150380073A1 MEMORY DEVICE 有权
标题翻译：内存设备
公开(公告)号：US20150380073A1
公开(公告)日：2015-12-31
申请号：US14542129
申请日：2014-11-14
申请人： SK hynix Inc.
发明人： No-Guen JOO , Jae-Il KIM
IPC分类号： G11C11/406 , G11C11/4091
CPC分类号： G11C11/406 , G11C11/408 , G11C11/4091
摘要： A memory device includes a counter suitable for counting the number of times that a periodic wave is enabled and generating a code, one or more memory banks each including a plurality of word lines, and one or more measurement blocks corresponding to the memory banks, respectively, and suitable for measuring an active period of an activated word line in a corresponding memory bank among the memory banks, wherein each of the measurement blocks measures the active period of the activated word line based on a first value of the code at an activation starting point of the corresponding memory bank and a current value of the code.
摘要翻译：一种存储装置包括一个计数器，它适用于对周期波被启用的次数进行计数，并产生一个代码，一个或多个存储器组，每个包含多个字线，以及一个或多个对应于存储体的测量块并且适于测量存储体之间的对应存储体中的激活字线的有效周期，其中每个测量块基于激活开始时的代码的第一值来测量激活字线的有效周期点对应的存储体和代码的当前值。

你已经成功收藏专利！

检索式保存成功!

IPRDB