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1. 发明申请

US20080071851A1 Instruction and logic for performing a dot-product operation 审中-公开
标题翻译：执行点阵操作的说明和逻辑
公开(公告)号：US20080071851A1
公开(公告)日：2008-03-20
申请号：US11524852
申请日：2006-09-20
申请人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
发明人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
IPC分类号： G06F7/52
CPC分类号： G06F17/10 , G06F7/48 , G06F7/5443 , G06F9/3001
摘要： Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.
摘要翻译：用于进行点积运算的方法，装置和程序装置。在一个实施例中，一种装置包括执行第一指令的执行资源。响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

2. 发明申请

US20140032624A1 INSTRUCTION AND LOGIC FOR PERFORMING A DOT-PRODUCT OPERATION 审中-公开
标题翻译：执行产品操作的指导和逻辑
公开(公告)号：US20140032624A1
公开(公告)日：2014-01-30
申请号：US14042681
申请日：2013-09-30
申请人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
发明人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
IPC分类号： G06F17/10
CPC分类号： G06F17/10 , G06F7/48 , G06F7/5443 , G06F9/3001
摘要： Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.
摘要翻译：用于执行点积运算的方法，装置和程序装置。在一个实施例中，一种装置包括执行第一指令的执行资源。响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

3. 发明申请

US20140032881A1 INSTRUCTION AND LOGIC FOR PERFORMING A DOT-PRODUCT OPERATION 审中-公开
公开(公告)号：US20140032881A1
公开(公告)日：2014-01-30
申请号：US14042696
申请日：2013-09-30
申请人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
发明人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
IPC分类号： G06F9/30
CPC分类号： G06F17/10 , G06F7/48 , G06F7/5443 , G06F9/3001
摘要： Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

4. 发明申请

US20130290392A1 INSTRUCTION AND LOGIC FOR PERFORMING A DOT-PRODUCT OPERATION 审中-公开
标题翻译：执行产品操作的指导和逻辑
公开(公告)号：US20130290392A1
公开(公告)日：2013-10-31
申请号：US13844366
申请日：2013-03-15
申请人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
发明人： Ronen Zohar , Mark Seconi , Rajesh Parthasarathy , Srinivas Chennupaty , Mark Buxton , Chuck Desylva
IPC分类号： G06F7/48
CPC分类号： G06F17/10 , G06F7/48 , G06F7/5443 , G06F9/3001
摘要： Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.
摘要翻译：用于执行点积运算的方法，装置和程序装置。在一个实施例中，一种装置包括执行第一指令的执行资源。响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

5. 发明申请

US20130046960A1 METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATION 审中-公开
公开(公告)号：US20130046960A1
公开(公告)日：2013-02-21
申请号：US13656636
申请日：2012-10-19
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F9/30
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

6. 发明申请

US20130046959A1 METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATION 有权
标题翻译：用于执行逻辑比较操作的方法和装置
公开(公告)号：US20130046959A1
公开(公告)日：2013-02-21
申请号：US13656634
申请日：2012-10-19
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F9/30
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.
摘要翻译：一种用于在处理器中包括用于对打包或未打包的数据执行逻辑比较和分支支持操作的指令的方法和装置。在一个实施例中，指令解码逻辑解码用于执行单元对包括逻辑比较的打包数据元素进行操作的指令。包括128位打包数据寄存器的寄存器文件存储打包的单精度浮点数（SPFP）和压缩整数数据元素。逻辑比较可以包括SPFP数据元素的比较和整数数据元素的比较，并且设置至少一个位以指示结果。基于这些比较，采取分支支持行动。这种分支支持动作可以包括设置至少一个比特，响应于分支指令又可以由分支单元利用该比特。或者，分支支持动作可以包括分支到指示的目标代码位置。

7. 发明申请

US20130166884A1 METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATIONS 审中-公开
公开(公告)号：US20130166884A1
公开(公告)日：2013-06-27
申请号：US13763598
申请日：2013-02-08
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F9/30
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

8. 发明授权

US08380780B2 Method and apparatus for performing logical compare operations 有权
标题翻译：用于执行逻辑比较操作的方法和装置
公开(公告)号：US08380780B2
公开(公告)日：2013-02-19
申请号：US13082726
申请日：2011-04-08
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F7/50
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first data and a second data. The processor performs logical comparisons on the first and second data. The logical comparisons may be performed on each bit of the first and second data, or may be performed only on certain bits. For at least one embodiment, at least the first data includes packed data elements, and the logical comparisons are performed on the most significant bits of the packed data elements. The logical comparisons may include comparison of the same respective bits of the first and second data, and also includes logical comparisons of bits of the first data with the complement of the corresponding bits of the second data. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting one or more flags, which in turn may be utilized by a branching unit. Alternatively, the branch support actions may include branching to an indicated target code location.
摘要翻译：一种用于在处理器中包括用于对打包或未打包的数据执行逻辑比较和分支支持操作的指令的方法和装置。在一个实施例中，处理器耦合到存储器。存储器中存储有第一数据和第二数据。处理器对第一和第二数据执行逻辑比较。可以对第一和第二数据的每个比特执行逻辑比较，或者可以仅对特定比特执行逻辑比较。对于至少一个实施例，至少第一数据包括打包数据元素，并且对打包数据元素的最高有效位执行逻辑比较。逻辑比较可以包括第一和第二数据的相同各个比特的比较，并且还包括第一数据的比特与第二数据的相应比特的补码的逻辑比较。基于这些比较，采取分支支持行动。这种分支支持动作可以包括设置一个或多个标志，其又可以由分支单元使用。或者，分支支持动作可以包括分支到指示的目标代码位置。

9. 发明申请

US20130166883A1 METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATIONS 审中-公开
公开(公告)号：US20130166883A1
公开(公告)日：2013-06-27
申请号：US13763596
申请日：2013-02-08
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F9/30
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

10. 发明申请

US20110191570A1 Method And Apparatus For Performing Logical Compare Operations 有权
标题翻译：用于执行逻辑比较操作的方法和装置
公开(公告)号：US20110191570A1
公开(公告)日：2011-08-04
申请号：US13082726
申请日：2011-04-08
申请人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark Buxton , Koby Gottlieb
IPC分类号： G06F9/44 , G06F9/32
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first data and a second data. The processor performs logical comparisons on the first and second data. The logical comparisons may be performed on each bit of the first and second data, or may be performed only on certain bits. For at least one embodiment, at least the first data includes packed data elements, and the logical comparisons are performed on the most significant bits of the packed data elements. The logical comparisons may include comparison of the same respective bits of the first and second data, and also includes logical comparisons of bits of the first data with the complement of the corresponding bits of the second data. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting one or more flags, which in turn may be utilized by a branching unit. Alternatively, the branch support actions may include branching to an indicated target code location.
摘要翻译：一种用于在处理器中包括用于对打包或未打包的数据执行逻辑比较和分支支持操作的指令的方法和装置。在一个实施例中，处理器耦合到存储器。存储器中存储有第一数据和第二数据。处理器对第一和第二数据执行逻辑比较。可以对第一和第二数据的每个比特执行逻辑比较，或者可以仅对特定比特执行逻辑比较。对于至少一个实施例，至少第一数据包括打包数据元素，并且对打包数据元素的最高有效位执行逻辑比较。逻辑比较可以包括第一和第二数据的相同各个比特的比较，并且还包括第一数据的比特与第二数据的相应比特的补码的逻辑比较。基于这些比较，采取分支支持行动。这种分支支持动作可以包括设置一个或多个标志，其又可以由分支单元使用。或者，分支支持动作可以包括分支到指示的目标代码位置。

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