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    • 1. 发明授权
    • Method of optimizing land grid array geometry
    • 优化土地网格阵列几何的方法
    • US07841078B2
    • 2010-11-30
    • US11970346
    • 2008-01-07
    • Roger LamWai Mon MaArch F. Nuttall
    • Roger LamWai Mon MaArch F. Nuttall
    • H05K3/30H01L23/495
    • H05K3/0014H05K1/0271H05K3/0058H05K2201/09036H05K2201/10719H05K2201/2009H05K2203/0278Y10T29/49117Y10T29/4913Y10T29/49144Y10T29/49213Y10T29/49218
    • Disclosed is a method, system, and computer program storage product for optimizing land grid array site geometry on an electronic assembly mounting. A first member including at least one convex region is aligned with a first portion of an electronic assembly mounting. A second member is aligned with a second portion of the electronic assembly mounting. The second portion includes at least one concave region corresponding to the convex region of the first portion. The second member includes a dome-shaped region having a predefined geometry. Heat is applied to at least one of the electronic assembly mounting, the first member, and the second member. Pressure is applied to at least one of the first member and the second member to reshape the convex region into a substantially flat surface. Applying pressure also reshapes the concave region into a geometry corresponding to the predefined geometry of the dome-shaped region.
    • 公开了一种用于在电子组件安装件上优化陆地网格阵列位置几何的方法,系统和计算机程序存储产品。 包括至少一个凸起区域的第一构件与电子组件安装件的第一部分对准。 第二构件与电子组件安装件的第二部分对准。 第二部分包括对应于第一部分的凸起区域的至少一个凹入区域。 第二构件包括具有预定几何形状的圆顶形区域。 热量被施加到电子组件安装件,第一构件和第二构件中的至少一个。 将压力施加到第一构件和第二构件中的至少一个,以将凸区域重新形成为基本平坦的表面。 施加压力还将凹区重新形成对应于圆顶形区域的预定几何形状的几何形状。
    • 2. 发明申请
    • LAND GRID ARRAY SITE GEOMETRY FOR ELECTRONIC ASSEMBLIES
    • 电子组装的土地网格阵列几何
    • US20090172941A1
    • 2009-07-09
    • US11970346
    • 2008-01-07
    • Roger LamWai Mon MaArch F. Nuttall
    • Roger LamWai Mon MaArch F. Nuttall
    • H01R43/02H01L21/02
    • H05K3/0014H05K1/0271H05K3/0058H05K2201/09036H05K2201/10719H05K2201/2009H05K2203/0278Y10T29/49117Y10T29/4913Y10T29/49144Y10T29/49213Y10T29/49218
    • Disclosed is a method, system, and computer program storage product for optimizing land grid array site geometry on an electronic assembly mounting. A first member including at least one convex region is aligned with a first portion of an electronic assembly mounting. A second member is aligned with a second portion of the electronic assembly mounting. The second portion includes at least one concave region corresponding to the convex region of the first portion. The second member includes a dome-shaped region having a predefined geometry. Heat is applied to at least one of the electronic assembly mounting, the first member, and the second member. Pressure is applied to at least one of the first member and the second member to reshape the convex region into a substantially flat surface. Applying pressure also reshapes the concave region into a geometry corresponding to the predefined geometry of the dome-shaped region.
    • 公开了一种用于在电子组件安装件上优化陆地网格阵列位置几何的方法,系统和计算机程序存储产品。 包括至少一个凸起区域的第一构件与电子组件安装件的第一部分对准。 第二构件与电子组件安装件的第二部分对准。 第二部分包括对应于第一部分的凸起区域的至少一个凹部区域。 第二构件包括具有预定几何形状的圆顶形区域。 热量被施加到电子组件安装件,第一构件和第二构件中的至少一个。 将压力施加到第一构件和第二构件中的至少一个,以将凸区域重新形成为基本平坦的表面。 施加压力还将凹区重新形成对应于圆顶形区域的预定几何形状的几何形状。
    • 4. 发明授权
    • Method for modifying an electrical connector
    • 修改电连接器的方法
    • US07351115B1
    • 2008-04-01
    • US11623820
    • 2007-01-17
    • Raymond F. Frizzell, Jr.Arch F. Nuttall
    • Raymond F. Frizzell, Jr.Arch F. Nuttall
    • H01R13/502
    • H05K3/225H01R12/712H01R13/514H01R43/205H05K3/222H05K3/308H05K2201/10189H05K2201/10287H05K2201/1059Y10T29/49156
    • A method is provided for modifying an electrical connector that is attached to a printed circuit board. On a wafer module of the electrical connector, a covering material is removed from an attachment area that is located above a signal pathway, and there is removed a connector pin that is connected to the signal pathway. A first end of a wire is attached to the attachment area of the wafer module to electrically connect to the signal pathway. The wire is run through a corresponding through-hole on the printed circuit board and the wafer module is inserted into an empty slot on the electrical connector. A second end of the wire is electrically connected to the printed circuit board or another wafer module. Also provided is an electronic assembly having a wire having a first end attached to a signal pathway of a wafer module of an electrical connector and a second end connected to a printed circuit board or another wafer module.
    • 提供了一种用于修改附接到印刷电路板的电连接器的方法。 在电连接器的晶片模块上,从位于信号通路上方的附接区域移除覆盖材料,并且去除连接到信号通路的连接器引脚。 线的第一端附接到晶片模块的附接区域以电连接到信号路径。 电线穿过印刷电路板上相应的通​​孔,晶片模块插入电连接器上的空槽中。 导线的第二端电连接到印刷电路板或另一个晶片模块。 还提供了一种电子组件,其具有线,其第一端连接到电连接器的晶片模块的信号路径,第二端连接到印刷电路板或另一晶片模块。