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    • 2. 发明授权
    • Internally distributed monitoring system
    • 内部分布式监控系统
    • US4590550A
    • 1986-05-20
    • US509128
    • 1983-06-29
    • John H. EilertArthur L. LevinThomas Julian
    • John H. EilertArthur L. LevinThomas Julian
    • G06F11/34
    • G06F11/3495
    • The disclosure provides an embedded hardware/software monitor for a data processing system. It embeds and distributes a plurality of instrumentation table units (ITUs) within various hardware entities in the system to collect sampled hardware signals local in the hardware entity in which the respective ITU is embedded, e.g. in each CPU, I/O processor, system controller, main storage controller, etc. Instrumentation measurement is controlled centrally in the system. Sampling of the system signals is done periodically at a low-rate relative to the CPU machine cycle rate, and the sampled signal are collected in the ITUs for instrumentation analysis. Sampling pulses are synchronously provided in all ITUs in the system. The ITU collected hardware signals are related to software controlled trace entries made in a trace table (TT) in main storage by each CPU in the system executing tracing and other predetermined instructions. An asynchronous relationship between the TT entries and the ITU entries is bridged by the intervening table, called SAT, located in storage. The SAT entries receive time-of-day (TOD) values also found in associated TT entries to relate them.
    • 本公开提供了一种用于数据处理系统的嵌入式硬件/软件监视器。 它在系统中的各种硬件实体内嵌入和分配多个仪表表单元(ITU),以收集在其中嵌入相应的ITU的硬件实体中本地的采样硬件信号,例如。 在每个CPU中,I / O处理器,系统控制器,主存储控制器等。仪器测量在系统中集中控制。 以相对于CPU机器周期速率的低速率周期性地进行系统信号的采样,采样信号被收集在国际电联中用于仪器分析。 在系统中的所有国际电联中同步提供采样脉冲。 国际电联收集的硬件信号与执行跟踪和其他预定指令的系统中每个CPU在主存储中的跟踪表(TT)中进行的软件控制跟踪条目相关。 TT条目和ITU条目之间的异步关系由位于存储器中的称为SAT的中间表桥接。 SAT条目接收到在相关联的TT条目中找到的时间(TOD)值,以便与之相关联。
    • 3. 发明授权
    • Internal performance monitoring by event sampling
    • 通过事件抽样进行内部绩效监测
    • US4821178A
    • 1989-04-11
    • US896994
    • 1986-08-15
    • Arthur L. LevinDon W. RainDavid J. Thomas
    • Arthur L. LevinDon W. RainDavid J. Thomas
    • G06F11/34G06F9/00
    • G06F11/3495G06F11/348
    • The disclosure provides event-controlled operations for an internal hardware/softward monitor for a processor in a data processing system. It embeds and distributes in each processor at least one instrumentation table unit (ITU) and event detection circuitry to detect events and conditions for collecting event-sampled hardware signals provided in the processor hardware in which the respective ITU is embedded. Instrumentation measurement is controlled centrally in the system. Sampling of the CPU signals for recording in the ITU is done at (or a sub-multiple of) the occurrence rate of the selected event(s) in the processor. The sampled signals are recorded in the ITU. The ITUs of plural processors are asynchronously operated in a system. The event-driven monitoring circuitry may be solely provided in an ITU, or it may be superimposed on a timer-driven internal instrumentation system of the type described in U.S. Pat. No. 4,590,550 in which the ITU is shared between event and timer driven modes of operation. Branch-taken event monitoring is also included in the disclosure.
    • 本公开为数据处理系统中的处理器的内部硬件/软件监视器提供事件控制操作。 它在每个处理器中嵌入和分配至少一个仪表表单元(ITU)和事件检测电路,以检测用于收集在其中嵌入相应的ITU的处理器硬件中提供的事件采样硬件信号的事件和条件。 仪器测量在系统中集中控制。 用于在ITU中记录的CPU信号的采样在处理器中所选择的事件的发生率的(或者是其倍数)下完成。 采样信号被记录在国际电联中。 多个处理器的国际电联在系统中异步运行。 事件驱动的监视电路可以仅在ITU中提供,或者它可以叠加在美国专利No. ITU-T第4,590,550号在事件和定时器驱动的操作模式之间共享ITU。 披露中还包括分支事件监控。
    • 4. 发明授权
    • Efficient trace method adaptable to multiprocessors
    • 高效跟踪方法适用于多处理器
    • US4598364A
    • 1986-07-01
    • US509129
    • 1983-06-29
    • Peter H. GumArthur L. LevinRonald M. SmithJohn H. Wilson
    • Peter H. GumArthur L. LevinRonald M. SmithJohn H. Wilson
    • G06F11/28G06F11/36G06F15/16G06F15/177G06F11/30
    • G06F11/3636
    • The disclosure describes a separate trace table for each CPU in an MP to avoid inter-CPU interference in making trace table entries for explicit and implicit tracing instructions enabled by flag bits in a control register (CR). Explicit tracing entries are made for an enabled explicit tracing instruction. Implicit tracing entries are made for predetermined instructions (when enabled for tracing) which do not have tracing as their primary purpose. A storage operand of the trace instruction contains a disablement field and optionally may contain an enablement-controlling class field to improve the integrity of traceable programs. A time stamp and range of general register contents is provided in each trace table entry for a tracing instruction. The time stamp enables all trace tables in an MP system to be later merged into a single trace table whenever required.
    • 本公开描述了MP中的每个CPU的单独跟踪表,以避免CPU间干扰,从而为通过控制寄存器(CR)中的标志位使能的显式和隐式跟踪指令进行跟踪表条目。 显式跟踪条目用于启用的显式跟踪指令。 针对不具有追踪作为主要目的的预定指令(当跟踪启用时)进行隐式跟踪条目。 跟踪指令的存储操作数包含禁用字段,并且可选地可以包含启用控制类字段以提高可跟踪程序的完整性。 在跟踪指令的每个跟踪表条目中提供时间戳和通用寄存器内容的范围。 时间戳使MP系统中的所有跟踪表稍后在需要时合并到单个跟踪表中。