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1. 发明授权

US5546582A Extension of two phase commit protocol to distributed participants 失效
标题翻译：将两阶段提交协议扩展到分布式参与者
公开(公告)号：US5546582A
公开(公告)日：1996-08-13
申请号：US384484
申请日：1995-02-02
申请人： Roger L. Brockmeyer , Richard Dievendorff , Daniel E. House , Earle H. Jenner , Margaret K. LaBelle , Michael G. Mall , Stuart L. Silen
发明人： Roger L. Brockmeyer , Richard Dievendorff , Daniel E. House , Earle H. Jenner , Margaret K. LaBelle , Michael G. Mall , Stuart L. Silen
IPC分类号： G06F13/00 , G06F9/46 , G06F11/14 , G06F12/00 , G06F15/16 , G06F15/177 , H04L29/08
CPC分类号： G06F17/30377
摘要： An extension of the two phase commit protocol allows distributed participation among physically distant agents independent of the communications mechanism being used in a data processing system. An extra stage of processing is added to the two phase commit protocol called End Phase One Processing (EPOP) which enables a distribution of the coordinator function across systems using any communication mechanism. EPOP is an extra stage in which a participant can receive control. In this extra stage, a participant flows two phase commit protocol sequences to distributed systems. The communication mechanism is used in such a way that it becomes part of a distributed coordinator. The coordinator itself does not need knowledge of other systems. The extra stage of processing is enabled by an operating system service called Enable End Phase One Exit Processing (EEPOEP). EEPOEP causes an extension of two phase commit protocol to be used on the issuing system. In this way, not only distributed databases can be supported, but also distributed users and distributed generic resource managers. A new response, called ABSTAIN, can be used by a resource manager in response to a PREPARE signal from the coordinator. This response from the resource manager to the coordinator indicates that the resource manager wants to continue to be involved with the unit of work two phase commit process but does not want to influence the final decision (i.e., COMMIT or BACKOUT) of the unit of work.
摘要翻译：两阶段提交协议的扩展允许独立于在数据处理系统中使用的通信机制的物理远程代理之间的分布式参与。一个额外的处理阶段被添加到称为终端一处理（EPOP）的两阶段提交协议中，这使得能够使用任何通信机制跨系统分配协调器功能。 EPOP是参与者可以接受控制的额外阶段。在这个额外的阶段，参与者将两阶段提交协议序列流向分布式系统。通信机制的使用方式使其成为分布式协调器的一部分。协调员本身不需要其他系统的知识。处理的额外阶段由称为启用结束一期退出处理（EEPOEP）的操作系统服务启用。 EEPOEP导致在发行系统上使用两阶段提交协议的扩展。这样，不仅可以支持分布式数据库，还可以分布式用户和分布式的通用资源管理器。一个称为ABSTAIN的新响应可以被资源管理器用来响应来自协调器的PREPARE信号。资源管理员对协调者的这种反应表明，资源管理器希望继续参与工作单元两阶段提交过程，但不想影响工作单元的最终决定（即COMMIT或BACKOUT）。

2. 发明授权

US07783920B2 Recovery routine masking and barriers to support phased recovery development 失效
标题翻译：恢复常规掩蔽和支持分阶段恢复开发的障碍
公开(公告)号：US07783920B2
公开(公告)日：2010-08-24
申请号：US11676546
申请日：2007-02-20
申请人： Michael G. Mall , Bruce Mealey
发明人： Michael G. Mall , Bruce Mealey
IPC分类号： G06F11/00
CPC分类号： G06F11/1482 , G06F11/0706 , G06F11/0793
摘要： A method, computer program product, and data processing system for providing optional exception recovery features in operating system kernel code are disclosed. In a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service pushes the address of the designated recovery routine, context, and re-entry point information corresponding to the segment to a recovery stack. An additional “footprint” region is also allocated on the recovery stack and used to store other state information needed for recovery. A mask value or barrier count value is also stored on the recovery stack to allow recovery to be disabled for non-recoverable routines.
摘要翻译：公开了一种在操作系统内核代码中提供可选异常恢复功能的方法，计算机程序产品和数据处理系统。在优选实施例中，主线代码段可以通过调用为此目的提供的内核服务来指定该段的恢复例程。内核服务将对应于该段的指定的恢复例程，上下文和重入点信息的地址推送到恢复堆栈。另外的“占用空间”区域也分配在恢复堆栈上，用于存储恢复所需的其他状态信息。掩码值或屏障计数值也存储在恢复堆栈中，以允许对不可恢复例程进行恢复。

3. 发明授权

US5493661A Method and system for providing a program call to a dispatchable unit's base space 失效
标题翻译：用于向可分派单元的基础空间提供程序调用的方法和系统
公开(公告)号：US5493661A
公开(公告)日：1996-02-20
申请号：US847555
申请日：1992-03-06
申请人： Alan I. Alpert , Carl E. Clark , Jeffrey A. Frey , Michael G. Mall
发明人： Alan I. Alpert , Carl E. Clark , Jeffrey A. Frey , Michael G. Mall
IPC分类号： G06F9/40 , G06F9/46 , G06F12/10 , G06F12/00
CPC分类号： G06F12/109
摘要： A method and system for providing a PROGRAM CALL to a dispatchable unit's base space is described herein. A program call to a dispatchable unit's (PC to DU) base space bit is added to each entry-table entry in order to determine whether a PROGRAM CALL to a base space is to be made. Should the bit indicate that a PROGRAM CALL to a dispatchable unit's base space is to be made, then in one embodiment, the base address space number-second-table entry origin (BASTEO) and base address space number (BASN) stored in the dispatchable unit control table (DUCT) are used in identifying the base space and accessing associated control information for the identified base space. In another embodiment, the BASN stored in the DUCT is used in ASN translation to identify the base space and access the associated control information for the base space.
摘要翻译：本文描述了一种用于向可分派单元的基础空间提供PROGRAM CALL的方法和系统。为了确定是否对基本空间进行PROGRAM CALL，将向可分派单元（PC到DU）基地址位的程序调用被添加到每个条目表条目。如果该位指示对可调度单元的基本空间进行PROGRAM呼叫，则在一个实施例中，存储在可分发单元的基址空间中的基地址空间号码 - 第二表入口源（BASTEO）和基地址空间号（BASN）单位控制表（DUCT）用于识别基础空间并访问所识别的基础空间的相关控制信息。在另一个实施例中，存储在DUCT中的BASN用于ASN转换，以识别基本空间并访问相关联的基本空间的控制信息。

4. 发明授权

US5423013A System for addressing a very large memory with real or virtual addresses using address mode registers 失效
标题翻译：使用地址模式寄存器寻址具有实际或虚拟地址的非常大的存储器的系统
公开(公告)号：US5423013A
公开(公告)日：1995-06-06
申请号：US754810
申请日：1991-09-04
申请人： Richard I. Baum , Brent A. Carlson , Moon J. Kim , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
发明人： Richard I. Baum , Brent A. Carlson , Moon J. Kim , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
IPC分类号： G06F9/32 , G06F9/355 , G06F12/02 , G06F12/06 , G06F12/10 , G06F12/08
CPC分类号： G06F9/342 , G06F12/0292 , G06F12/0623 , G06F9/32 , G06F2212/206
摘要： Allows instructions and data to be located in any one or more of plural sections of a large-size real memory of a data processing system. Any memory section is located by concatenating a conventional small real/absolute address with an address extender used with conventional small-size memory. A Central Processor Extended Address Mode (CPEAM) register content indicates the location of extenders in an AR(s), ASTE(s), STE(s) or PTE(s) for use by a central processor or I/O operations. An Input-Output Extended Address Mode (IOEAM) register content indicates the location of the extenders in ORB(s), CCW(s) or IDAW(s) for use by I/O operations. A compatible mode sets the content to zero for either or both of the CPEAM and IOEAM if either or both is not to be used.
摘要翻译：允许指令和数据位于数据处理系统的大尺寸实际存储器的多个部分中的任何一个或多个中。任何存储器部分通过将传统的小实际/绝对地址与传统的小尺寸存储器使用的地址扩展器连接来定位。中央处理器扩展地址模式（CPEAM）寄存器内容指示AR（s），ASTE，STE（s）或PTE的扩展器的位置，供中央处理器或I / O操作使用。输入输出扩展地址模式（IOEAM）寄存器内容指示扩展器在ORB（s），CCW（s）或IDAW中的位置，供I / O操作使用。如果不使用任何一个或两个，则兼容模式将CPEAM和IOEAM中的一个或两个设置为零。

5. 发明授权

US5023773A Authorization for selective program access to data in multiple address spaces 失效
标题翻译：授权对多个地址空间中的数据进行选择性程序访问
公开(公告)号：US5023773A
公开(公告)日：1991-06-11
申请号：US154740
申请日：1988-02-10
申请人： Richard I. Baum , Terry L. Borden , Justin R. Butwell , Carl E. Clark , Alan G. Ganek , James Lum , Michael G. Mall , David R. Page , Kenneth E. Plambeck , Casper A. Scalzi , Richard J. Schmalz
发明人： Richard I. Baum , Terry L. Borden , Justin R. Butwell , Carl E. Clark , Alan G. Ganek , James Lum , Michael G. Mall , David R. Page , Kenneth E. Plambeck , Casper A. Scalzi , Richard J. Schmalz
IPC分类号： G06F12/08 , G06F9/46 , G06F12/10 , G06F12/14 , G06F21/24
CPC分类号： G06F9/468 , G06F12/1483
摘要： A program authorization mechanism for authorizing access to an address space in the main memory of a computer system by a program being run under a multiple address space facility. An access-list entry is associated with each address space, each access-list entry being designated by an access-list-entry token contained in an access register. Each access-list entry includes a private indicator which indicates if the associated address space can be accessed by all programs from this access-list entry or if the associated address space can only be accessed by an authorized program. For program to be authorized, an extended authorization index in a control register must match an access-list extended authorization index in the access-list entry, or the extended authorization index value must be authorized in an authority table associated with the address space. An instruction for testing a given extended authorization index for a given access-list-entry is also disclosed.

6. 发明授权

US08136111B2 Managing execution of mixed workloads in a simultaneous multi-threaded (SMT) enabled system 有权
标题翻译：在同时支持多线程（SMT）的系统中管理混合工作负载的执行
公开(公告)号：US08136111B2
公开(公告)日：2012-03-13
申请号：US11426814
申请日：2006-06-27
申请人： Michael G. Mall , James B. Moody , Suresh E. Warrier
发明人： Michael G. Mall , James B. Moody , Suresh E. Warrier
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , G06F9/3851 , G06F2209/5018
摘要： A SMT enabled processor system, having multiple processors each activated to interleave execution of multiple hardware threads on each processor, for ST workload, includes a kernel. The kernel of the SMT enabled processor system facilitates construction of an exclusive set of processors to simulate an ST mode for handling the tasks of the ST workload, wherein the ST workload runs more efficiently on single threaded processors. The kernel schedules the ST workload on the exclusive set of processors by selecting one hardware thread per processor within said exclusive set of processors to handle a separate one of the tasks of the ST workload, while requiring the remaining hardware threads per processor within the exclusive set to idle. The ST workload is executed on the SMT enabled processor system as if the exclusive set of processors run in ST mode, but without actually removing the remaining idle hardware threads per processor within the exclusive set of processors.
摘要翻译：具有多个处理器的SMT启用处理器系统包括一个内核，每个处理器每个被激活以交织每个处理器上的多个硬件线程的执行，用于ST工作负载。支持SMT的处理器系统的内核便于构建独特的一组处理器来模拟用于处理ST工作负载任务的ST模式，其中ST工作负载在单线程处理器上更有效地运行。内核通过在所述独占处理器集合中选择一个处理器中的每个处理器的一个硬件线程来调度独占处理器上的ST工作负载，以处理ST工作负载的任务中的单独一个，同时要求在独占集合内的每个处理器的剩余硬件线程闲置 ST工作负载在启用SMT的处理器系统上执行，就好像独立的处理器集合以ST模式运行，但并不实际上除去独占处理器集中的每个处理器的剩余空闲硬件线程。

7. 发明授权

US5163096A Storage protection utilizing public storage key control 失效
标题翻译：存储保护利用公共存储钥匙控制
公开(公告)号：US5163096A
公开(公告)日：1992-11-10
申请号：US710875
申请日：1991-06-06
申请人： Carl E. Clark , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
发明人： Carl E. Clark , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
IPC分类号： G06F12/14 , G06F21/24
CPC分类号： G06F12/1491
摘要： Provides three access levels of storage key protection, comprising a supervisory level (key 0), an intermediate level of non-public and non-supervisory keys (keys 1-8, 10-15), and an unique public level (key 9). The program routines operating with a supervisory-level access key can access both the public level and the intermediate level of storage blocks. Although a program routine operating with an access key in the intermediary access level cannot access any supervisory level storage block, it can access any block assigned a public level storage key, as well as any storage block assigned the respective intermediate level key. One or more third-level public storage keys (PSKs) may be provided. A program access key using one of the PSK values can only access blocks having the same PSK value, and it cannot access blocks having any other key value.
摘要翻译：提供存储密钥保护的三个访问级别，包括监控级别（密钥0），非公共和非监督密钥（密钥1-8,10-15）的中间级别和唯一的公共级别（密钥9）。使用监控级访问密钥操作的程序例程可以访问存储块的公共级和中级级别。虽然以中间访问级别中的访问密钥操作的程序例程不能访问任何监督级存储块，但是它可以访问分配了公共级存储密钥的任何块以及分配给各个中间级密钥的任何存储块。可以提供一个或多个第三级公共存储密钥（PSK）。使用PSK值之一的程序访问密钥只能访问具有相同PSK值的块，并且它不能访问具有任何其他密钥值的块。

8. 发明授权

US07562260B2 Method and system for performing recovery of a single-threaded queue 失效
标题翻译：执行单线程队列恢复的方法和系统
公开(公告)号：US07562260B2
公开(公告)日：2009-07-14
申请号：US11397842
申请日：2006-04-04
申请人： Michael G. Mall
发明人： Michael G. Mall
IPC分类号： G06F11/00
CPC分类号： G06F9/546 , G06F2209/548
摘要： A method, system and computer program product for performing recovery of a single-threaded queue are disclosed. The method includes scanning a set of elements of the single-threaded queue to detect a cycle containing a first element, and, in response to detecting the cycle, determining a size of the cycle in terms of a number of elements contained the cycle. A second element of the set of elements of the single-threaded queue is located, which second element is previous to the first element by a number of elements equivalent to the cycle. An element causing the cycle is located by performing a detailed element scan starting at the second element and the single-threaded queue is recovered by storing an end-of-queue value in a forward link of the element causing the cycle.
摘要翻译：公开了一种用于执行单线程队列恢复的方法，系统和计算机程序产品。该方法包括扫描单线程队列的一组元素以检测包含第一元素的周期，并且响应于检测到该周期，根据包含循环的元素的数量来确定周期的大小。位于单线程队列的一组元素中的第二个元素，该第二个元素在第一个元素之前由多个相当于该循环的元素组成。通过执行从第二个元素开始的详细元素扫描来定位引起该周期的元素，并且通过在引起该周期的元素的前向链路中存储队列结束值来恢复单线程队列。

9. 发明申请

US20080201604A1 Kernel Error Recovery Disablement and Shared Recovery Routine Footprint Areas 失效
标题翻译：内核错误恢复禁用和共享恢复常规足迹区域
公开(公告)号：US20080201604A1
公开(公告)日：2008-08-21
申请号：US11676536
申请日：2007-02-20
申请人： Michael G. Mall , Bruce Mealey
发明人： Michael G. Mall , Bruce Mealey
IPC分类号： G06F11/08
CPC分类号： G06F11/0721 , G06F9/44505 , G06F11/0793
摘要： A method, computer program product, and data processing system for providing optional failure recovery features in operating system kernel code are disclosed. In accordance with a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel service allocates a “footprint” region on the recovery stack for storing state information arising from the execution of the recovery-enabled code. In the event of an exception, a recovery manager routine uses information from the recovery stack to recover from the exception. Recovery may be disabled altogether for performance purposes by way of boot-time patching to disable the use of the recovery stack and to allow state information to be written to a static “scratchpad” area, which unlike the recovery stack, is allowed to be overwritten, its contents being ignored.
摘要翻译：公开了一种用于在操作系统内核代码中提供可选故障恢复功能的方法，计算机程序产品和数据处理系统。根据优选实施例，主线代码段可以通过调用为此目的提供的内核服务来指定该段的恢复例程。内核服务在恢复堆栈上分配“足迹”区域，用于存储由启用恢复的代码执行而产生的状态信息。在发生异常的情况下，恢复管理器例程使用恢复堆栈中的信息从异常中恢复。恢复可以通过引导时修补方式完全禁用，以禁用恢复堆栈的使用，并允许将状态信息写入到与恢复堆栈不同的静态“暂存区”区域，这被允许被覆盖，其内容被忽略。

10. 发明申请

US20070300227A1 MANAGING EXECUTION OF MIXED WORKLOADS IN A SIMULTANEOUS MULTI-THREADED (SMT) ENABLED SYSTEM 有权
标题翻译：在同时多线程（SMT）启用系统中管理混合工作负载的执行
公开(公告)号：US20070300227A1
公开(公告)日：2007-12-27
申请号：US11426814
申请日：2006-06-27
申请人： Michael G. Mall , James B. Moody , Suresh E. Warrier
发明人： Michael G. Mall , James B. Moody , Suresh E. Warrier
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , G06F9/3851 , G06F2209/5018
摘要： A method, system, and program are provided for managing execution of mixed workloads in a simultaneous multi-threaded (SMT) enabled system. In one embodiment, in a SMT enabled processor system, having multiple processors each activated to interleave execution of multiple hardware threads on each processor, for ST workload, the kernel of the SMT enabled processor system facilitates construction of an exclusive set of processors to simulate an ST mode for handling the tasks of the ST workload, wherein the ST workload runs more efficiently on single threaded processors. The kernel schedules the ST workload on the exclusive set of processors by selecting one hardware thread per processor within said exclusive set of processors to handle a separate one of the tasks of the ST workload, while requiring the remaining hardware threads per processor within the exclusive set to idle. As a result, the ST workload is executed on the SMT enabled processor system as if the exclusive set of processors run in ST mode, but without actually deactivating the remaining idle hardware threads per processor within the exclusive set of processors.
摘要翻译：提供了一种方法，系统和程序，用于在同时支持多线程（SMT）的系统中管理混合工作负载的执行。在一个实施例中，在具有SMT功能的处理器系统中，具有多个处理器，每个处理器被激活以交织每个处理器上的多个硬件线程的执行，对于ST工作负载，启用SMT的处理器系统的内核便于构建一组独占的处理器来模拟 ST模式，用于处理ST工作负载的任务，其中ST工作负载在单线程处理器上更有效地运行。内核通过在所述独占处理器集合中选择一个处理器中的每个处理器的一个硬件线程来调度独占处理器上的ST工作负载，以处理ST工作负载的任务中的单独一个，同时要求在独占集合内的每个处理器的剩余硬件线程闲置因此，在SMT启用的处理器系统上执行ST工作负载，就好像排它的处理器集合以ST模式运行，但是不排除在独占处理器集合内的每个处理器剩余的空闲硬件线程。

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