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1. 发明授权

US5228046A Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature 失效
标题翻译：容错计算机存储器系统和采用双级错误校正和检测功能的组件
公开(公告)号：US5228046A
公开(公告)日：1993-07-13
申请号：US790797
申请日：1991-11-12
申请人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter
发明人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter
IPC分类号： G06F11/00 , G06F11/10
CPC分类号： G06F11/1052 , G06F11/1008
摘要： In a memory system comprising a plurality of memory units each of which possesses unit-level error correction capabilities and each of which are tied to a system level error correction function, memory reliability is enhanced by providing a mechanism for disabling the unit-level error correction capability, for example, in response to the occurrence of an uncorrectable error in one of the memory units. This counter-intuitive approach which disables an error correction function nonetheless enhances overall memory system reliability since it enables the employment of the complement/recomplement algorithm which depends upon the presence of reproducible errors for proper operation. Thus, chip level error correction systems, which are increasingly desirable at high packaging densities, are employed in a way which does not interfere with system level error correction methods.
摘要翻译：在包括多个存储器单元的存储器系统中，每个存储器单元具有单位级纠错能力，并且每个存储单元都与系统级错误校正功能相关联，通过提供用于禁用单位级错误校正的机制来增强存储器可靠性能力，例如，响应于在一个存储器单元中发生不可校正的错误。这种禁用纠错功能的反直觉方法仍然提高了整体存储系统的可靠性，因为它可以使用补充/重新补充算法，这取决于是否存在可重复的错误以进行正确的操作。因此，在高封装密度下越来越需要的芯片级误差校正系统采用不干扰系统级误差校正方法的方式。

2. 发明授权

US5058115A Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature 失效
标题翻译：故障容错计算机存储系统和组件采用双层错误校正和锁定功能检测
公开(公告)号：US5058115A
公开(公告)日：1991-10-15
申请号：US322255
申请日：1989-03-10
申请人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter , Tin-Chee Lo
发明人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter , Tin-Chee Lo
IPC分类号： G06F12/16 , G06F11/10
CPC分类号： G06F11/1052 , G06F11/1008
摘要： In a memory system comprising a plurality of memory units each of which possesses unit-level error correction capabilities and each of which are tied to a system level error correction function, memory reliability is enhanced by providing means for fixing the output of one of the memory units at a fixed value in response to the occurrence of an uncorrectable error in one of the memory units. This counter-intuitive approach to the generation of forced hard errors nonetheless enhances overall memory system reliability since it enables the employment of the complement/recomplement algorithm which depends upon the presence of reproducible errors for proper operation. Thus, clip level error correction systems, which are increasingly desirable at high packaging densities, are employed in a way which does not interfere with system level error correction methods.

3. 发明授权

US5533036A Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature 失效
标题翻译：容错计算机存储器系统和采用双级错误校正和检测功能的组件
公开(公告)号：US5533036A
公开(公告)日：1996-07-02
申请号：US486628
申请日：1995-06-07
申请人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter
发明人： Robert M. Blake , Douglas C. Bossen , Chin-Long Chen , John A. Fifield , Howard L. Kalter
IPC分类号： G06F11/00 , G06F11/10
CPC分类号： G06F11/1052 , G06F11/1008
摘要： In a memory system comprising a plurality of memory units each of which possesses unit-level error correction capabilities and each of which are tied to a system level error correction function, memory reliability is enhanced by providing means for disabling the unit-level error correction capability, for example, in response to the occurrence of an uncorrectable error in one of the memory units. This counter-intuitive approach which disables an error correction function nonetheless enhances overall memory system reliability since it enables the employment of the complement/recomplement algorithm which depends upon the presence of reproducible errors for proper operation. Thus, chip level error correction systems, which are increasingly desirable at high packaging densities, are employed in a way which does not interfere with system level error correction methods.
摘要翻译：在包括多个存储器单元的存储器系统中，每个存储器单元具有单位级错误校正能力，并且每个存储器单元都与系统级错误校正功能相关联，通过提供用于禁用单元级错误校正能力的装置来增强存储器可靠性例如，响应于在一个存储器单元中出现不可校正的错误。这种禁用纠错功能的反直觉方法仍然提高了整体存储系统的可靠性，因为它可以使用补充/重新补充算法，这取决于是否存在可重复的错误以进行正确的操作。因此，在高封装密度下越来越需要的芯片级误差校正系统采用不干扰系统级误差校正方法的方式。

4. 发明授权

US5552591A Presence/absence bar code 失效
标题翻译：存在/不存在条形码
公开(公告)号：US5552591A
公开(公告)日：1996-09-03
申请号：US21298
申请日：1993-02-22
申请人： Douglas C. Bossen , Chin-Long Chen , Frederick H. Dill , Douglas S. Goodman , Mu-Yue Hsiao , Paul V. McCann , James M. Mulligan , Ricky A. Rand
发明人： Douglas C. Bossen , Chin-Long Chen , Frederick H. Dill , Douglas S. Goodman , Mu-Yue Hsiao , Paul V. McCann , James M. Mulligan , Ricky A. Rand
IPC分类号： G06K1/12 , G06K7/016 , G06K7/10 , G06K19/06
CPC分类号： G06K7/10861 , G06K1/126 , G06K19/06028 , G06K7/0166 , G06K2019/06253
摘要： A single width bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear centimeter, an important consideration in semiconductor manufacturing wherein space on the chips and the wafer is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.
摘要翻译：提供了具有固有的自身时钟特性的单宽度条形码，以便在非常大规模的集成电路制造工艺中的半导体晶片的识别中特别有用。即使面对相对高的扫描速度变化，这里描述的代码是鲁棒的，可靠的和高度可读的。这些代码在每个线性厘米的字符表示方面也是令人满意的，这在半导体制造中是重要的考虑因素，其中芯片和晶片上的空间是非常重要的。另外，本发明的一个优选实施例在代码符号序列中显示相邻条之间的最大空格数的最小数目。

5. 发明授权

US06675341B1 Extended error correction for SEC-DED codes with package error detection ability 失效
标题翻译：具有封装错误检测能力的SEC-DED代码的扩展错误校正
公开(公告)号：US06675341B1
公开(公告)日：2004-01-06
申请号：US09442435
申请日：1999-11-17
申请人： Chin-Long Chen , Douglas C. Bossen
发明人： Chin-Long Chen , Douglas C. Bossen
IPC分类号： H03M1300
CPC分类号： H03M13/19 , G06F11/1028 , H03M13/11
摘要： An apparatus and method is provided for correcting data words resulting from a package fail within a memory array in which coded data is divided into a plurality of multi-bit packages of b bits each. The coded data comprises n-bit words with r error correcting code bits and n-r data bits. The invention is capable of correcting one package which has suffered at least one hard failure. The invention correcting exploits single error correcting (SEC)-and double error detecting (DED) codes, requiring no additional check bits, which give a syndrome when the data word has suffered an error coming from at least one error in a package.
摘要翻译：提供了一种装置和方法，用于在编码数据被分成多个b位的多位数据包的存储器阵列中校正由封装故障引起的数据字。编码数据包括具有r个纠错码位和n-r个数据位的n位字。本发明能够校正已遭受至少一次硬故障的一个包装。本发明的校正利用单纠错（SEC）和双重错误检测（DED）代码，不需要额外的校验位，当数据字遭受到来自封装中的至少一个错误的错误时，该错误校正位发生错误。

6. 发明授权

US5521709A Continuous barcode marking system 失效
标题翻译：连续条码打标系统
公开(公告)号：US5521709A
公开(公告)日：1996-05-28
申请号：US57357
申请日：1993-05-05
申请人： Douglas C. Bossen , Chin-Long Chen , Fuad E. Doany , Mu-Yue Hsiao , Ricky A. Rand , Ralf J. Terbruggen
发明人： Douglas C. Bossen , Chin-Long Chen , Fuad E. Doany , Mu-Yue Hsiao , Ricky A. Rand , Ralf J. Terbruggen
IPC分类号： B41J2/44 , G06K1/12 , G06K15/22 , H04N1/23 , B41J25/24 , G01D9/00 , G06K7/10
CPC分类号： G06K1/126 , G06K15/22 , Y10S235/90
摘要： A method and apparatus is provided for producing single width barcodes in a continuous, serpentine pattern. This pattern provides continuity of operation for laser marking instruments and thereby results in the formation of more uniform and higher quality barcode indicia. The use of a continuous serpentine pattern also increases the speed at which the code may be written onto a substrate. This marking method is particularly appropriate for use in marking a wide variety of materials including semiconductors, metals, plastics and ceramics.
摘要翻译：提供了一种用于以连续的蛇形图案生产单个宽度条形码的方法和装置。这种图案为激光打标仪器提供连续的操作，从而形成更均匀和更高质量的条形码标记。使用连续的蛇形图案也增加了代码可以写入基板的速度。该标记方法特别适用于标记各种材料，包括半导体，金属，塑料和陶瓷。

7. 发明授权

US5161163A Method and apparatus for providing error correction to symbol level codes 失效
标题翻译：用于向符号级代码提供纠错的方法和装置
公开(公告)号：US5161163A
公开(公告)日：1992-11-03
申请号：US741021
申请日：1991-08-06
申请人： Douglas C. Bossen , Chin-Long Chen , Mu-Yue Hsiao
发明人： Douglas C. Bossen , Chin-Long Chen , Mu-Yue Hsiao
IPC分类号： G06K19/14 , H03M13/07
CPC分类号： G06K19/14 , H03M13/07
摘要： An error correction coding system employs a single check symbol from an arbitrary sequence of information symbols to provide single error correction at the symbol level. The sequence of information symbols may in fact also be arbitrarily long. The coding system of the present invention provides both a method and apparatus for encoding the check symbol and a method and apparatus for error correction based upon the single coded symbol character. The system is particularly applicable for use in conjunction with bar code recognition systems but is in fact applicable to a broad range of coding systems, including optical character recognition and ordinary alphanumeric codes. The system is also extendable to any system employing an odd number of code symbols that may be present in a single character position.
摘要翻译：纠错编码系统采用来自任意信息符号序列的单个检查符号，以在符号级提供单个纠错。信息符号的序列实际上也可以是任意长的。本发明的编码系统提供了一种用于对该校验符号进行编码的方法和装置以及用于基于该单个编码符号字符进行纠错的方法和装置。该系统特别适用于与条形码识别系统结合使用，但实际上适用于广泛的编码系统，包括光学字符识别和普通字母数字代码。该系统还可以扩展到采用可能存在于单个字符位置中的奇数个代码符号的任何系统。

8. 发明授权

US5380998A Single width bar code with end code providing bidirectionality 失效
标题翻译：单宽条形码，带终端代码提供双向性
公开(公告)号：US5380998A
公开(公告)日：1995-01-10
申请号：US072260
申请日：1993-06-03
申请人： Douglas C. Bossen , Chin-Long Chen , Mu-Yue Hsiao , James M. Mulligan
发明人： Douglas C. Bossen , Chin-Long Chen , Mu-Yue Hsiao , James M. Mulligan
IPC分类号： G06K1/12 , G06K7/10 , G06K19/06
CPC分类号： G06K19/06028 , G06K2019/06253
摘要： A single width bar code is appended with an end mark which includes a blank interval and a bar. The resulting bar code is bidirectional and inherently self clocking so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described are robust, reliable, and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear measurements, an important consideration in semiconductor manufacturing wherein space on chips and wafers is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.
摘要翻译：单个宽度条形码附加结尾标记，其中包括空白间隔和条形。所得到的条形码是双向的并且固有地自我计时，以便在非常大规模的集成电路制造过程中的半导体晶片的识别中特别有用。所描述的代码是稳健，可靠和高度可读的，即使在扫描速度相对较高的变化的情况下。代码在每个线性测量的字符表示方面也是令人满意的，这在半导体制造中是重要的考虑因素，其中芯片和晶片上的空间是非常重要的。另外，本发明的一个优选实施例在代码符号序列中显示相邻条之间的最大空格数的最小数目。

9. 发明授权

US4319357A Double error correction using single error correcting code 失效
标题翻译：使用单纠错码双纠错
公开(公告)号：US4319357A
公开(公告)日：1982-03-09
申请号：US103633
申请日：1979-12-14
申请人： Douglas C. Bossen
发明人： Douglas C. Bossen
IPC分类号： G06F11/10 , G06F12/16
CPC分类号： G06F11/1048 , G06F11/1024
摘要： A single error correcting double error detecting (SEC/DED) error correcting code for a memory is used to correct one fixed error and one transitory error in a data word stored in the memory. The erroneous data word and syndrome generated therefrom by the error correcting code circuitry are saved while the memory location of the flawed word is checked to determine the location of the one fixed error using a ancillatory error correction technique. A syndrome is then generated for the word assuming only a single fixed error in the location determined using the ancillatory technique. Thereafter, the generated and saved syndromes are exclusive OR'd together to obtain another syndrome locating the position of the transitory error. With both errors located, the word is corrected by inverting the erroneous data bits.
摘要翻译：用于存储器的单个纠错双错误检测（SEC / DED）纠错码用于校正存储在存储器中的数据字中的一个固定错误和一个暂时错误。由错误校正码电路产生的错误数据字和校正子被保存，同时检查有缺陷的字的存储器位置，以使用辅助纠错技术确定一个固定误差的位置。然后，对于假设在使用辅助技术确定的位置中仅存在单个固定误差的单词，生成一个综合征。此后，生成和保存的综合征被排列在一起以获得定位临时错误位置的另一种综合征。在两个错误位置中，通过反转错误的数据位来纠正该字。

10. 发明授权

US4461001A Deterministic permutation algorithm 失效
标题翻译：确定性置换算法
公开(公告)号：US4461001A
公开(公告)日：1984-07-17
申请号：US362925
申请日：1982-03-29
申请人： Douglas C. Bossen , Mu-Yue Hsiao
发明人： Douglas C. Bossen , Mu-Yue Hsiao
IPC分类号： G06F12/16 , G06F11/10 , G11C29/00 , G06F11/00
CPC分类号： G11C29/88 , G06F11/1024
摘要： Swapping of bits between different words of a memory is accomplished by reference to data on bad bits in the memory. This data controls address inputs to each bit in a memory word so that any word with multiple uncorrectable data is changed to a correctable data word by placing one or more of the bad bits in the word into another word of the memory. The swapping is done by an exclusionary process which deselects certain combinations of addresses thereby limiting the selection process to other combinations. The process can involve categorizing of failures in accordance with type and performing algorithm operations which identify combinations of bit addresses that would result in combining the failures so that there are more errors in any memory word than would be correctable by the error correction code monitoring the memory.
摘要翻译：通过参考存储器中不良位的数据来实现存储器的不同字之间的位的交换。该数据控制存储器字中每个位的地址输入，使得具有多个不可校正数据的任何字通过将该字中的一个或多个坏位置换为存储器的另一个字来改变为可校正数据字。交换是通过排除过程来完成的，其取消选择某些地址组合，从而将选择过程限制到其他组合。该过程可以包括根据类型进行故障分类和执行算法操作，其识别将导致组合故障的位地址的组合，使得在任何存储器字中存在比通过监视存储器的纠错码可校正的更多的错误。

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