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2. 发明授权

US4769637A Video display control circuit arrangement 失效
标题翻译：视频显示控制电路布置
公开(公告)号：US4769637A
公开(公告)日：1988-09-06
申请号：US802226
申请日：1985-11-26
申请人： Ned C. Forrester , Robert C. Rose , Thomas C. Furlong
发明人： Ned C. Forrester , Robert C. Rose , Thomas C. Furlong
IPC分类号： G09G5/00 , G06F3/153 , G09G5/14 , G09G5/34 , G09G1/16
CPC分类号： G09G5/346
摘要： The present circuit arrangement is principally directed to scrolling of a region or regions on a video display and includes a bit map memory, at least one address generation and control signal circuitry chip, one or more data signal path circuitry chips, timing circuitry and logic circuitry interconnecting the foregoing various sections of circuitry. The present arrangement functions to refresh, scroll and update during each horizontal scan, in response to a plurality of timing cycles, with every other cycle being a refresh cycle and the intervening cycles being either scroll or update cycles. During a refresh cycle there is a burst of signals read from memory and transmitted to a shift register feeding the video screen to effect refreshing a section of the screen. At the same time those signals are used to refresh the memory. During the alternate cycles (between refresh cycles) there may be a burst of signals from the signal path circuitry chip to write information into the bit map memory at some new address to effect scrolling. Instead of performing scrolling in the alternate cycles, information may be erased from a region. In the alternative there may be a burst of signals from an information source transmitted to the bit map memory to effect updating (i.e. writing new data information into the memory). The foregoing arrangement permits the entire bit map memory to be rewritten during the period required for one vertical scan of the video display device which in turn enables the system to provide rapid smooth scrolling and continued sequential addressing of the memory.
摘要翻译：本电路装置主要针对视频显示器上的区域或区域的滚动，并且包括位图存储器，至少一个地址生成和控制信号电路芯片，一个或多个数据信号路径电路芯片，定时电路和逻辑电路互连电路的前述各个部分。本布置用于响应于多个定时周期在每个水平扫描期间刷新，滚动和更新，其中每隔一个周期是刷新周期，并且中间周期是滚动或更新周期。在刷新周期期间，存储从存储器读取的信号的一串信号，并发送到移位寄存器，该移位寄存器馈送视频屏幕以实现刷新屏幕的一部分。同时，这些信号用于刷新内存。在替代周期期间（在刷新周期之间），可能存在来自信号路径电路芯片的信号脉冲串，以在某些新地址将信息写入位图存储器以实现滚动。代替在替代周期中执行滚动，可以从区域中擦除信息。在替代方案中，可能存在来自发送到位图存储器的信息源的信号突发以实现更新（即，将新的数据信息写入存储器）。上述布置允许在视频显示设备的一次垂直扫描所需的周期期间重写整个位图存储器，这又使得系统能够提供快速平滑滚动和继续顺序寻址存储器。

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