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    • 6. 发明授权
    • Insulating micro-structure and method of manufacturing same
    • 绝缘微结构及其制造方法相同
    • US06797589B2
    • 2004-09-28
    • US10322990
    • 2002-12-18
    • Scott G. AdamsScott A. Miller
    • Scott G. AdamsScott A. Miller
    • H01L2176
    • H01L21/76229B81B3/0086B81B2203/033B81C1/00126B81C2201/0178H01L21/31612H01L21/31662H01L21/76208
    • A method of manufacturing an insulating micro-structure by etching a plurality of trenches in a silicon substrate and filling said trenches with insulating materials. The trenches are etched and then oxidized until completely or almost completely filled with silicon dioxide. Additional insulating material is then deposited as necessary to fill any remaining trenches, thus forming the structure. When the top of the structure is metallized, the insulating structure increases voltage resistance and reduces the capacitive coupling between the metal and the silicon substrate. Part of the silicon substrate underlying the structure is optionally removed further to reduce the capacitive coupling effect. Hybrid silicon-insulator structures can be formed to gain the effect of the benefits of the structure in three-dimensional configurations, and to permit metallization of more than one side of the structure.
    • 通过蚀刻硅衬底中的多个沟槽并用绝缘材料填充所述沟槽来制造绝缘微结构的方法。 蚀刻沟槽,然后氧化直到完全或几乎完全充满二氧化硅。 然后根据需要沉积额外的绝缘材料以填充任何剩余的沟槽,从而形成结构。 当结构的顶部被金属化时,绝缘结构增加了电阻并降低了金属和硅衬底之间的电容耦合。 可选地,进一步去除结构底层的硅衬底的一部分以降低电容耦合效应。 可以形成混合硅 - 绝缘体结构以获得三维结构中结构的益处的效果,并且允许结构多于一侧的金属化。