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1. 发明申请

US20110167318A1 READING METHOD OF A MEMORY DEVICE WITH EMBEDDED ERROR-CORRECTING CODE AND MEMORY DEVICE WITH EMBEDDED ERROR-CORRECTING CODE 有权
标题翻译：具有嵌入式错误修正代码的存储器件和带有嵌入式错误校正代码的存储器件的读取方法
公开(公告)号：US20110167318A1
公开(公告)日：2011-07-07
申请号：US13047678
申请日：2011-03-14
申请人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
IPC分类号： G06F11/10
CPC分类号： G06F11/1076 , G06F11/1068 , G06F11/141 , G11B20/18
摘要： A reading method for a memory device with error-correcting encoding envisages the steps of: carrying out a first reading of a plurality of memory locations (A0, A1, . . . , ALS-1) to generate a first recovered string (S1), and performing a first decoding attempt using the first recovered string (S1). When the first decoding attempt fails, the memory locations are read at least one second time, and at least one second recovered string (S2-SN) is generated, On the basis of a comparison between the first recovered string (S1) and the second recovered string (S2-SN), a modified string (SM) is generated, in which erasures (X) are located, and at least one second decoding attempt is carried out using the modified string (SM).
摘要翻译：具有纠错编码的存储器件的读取方法设想的步骤是：执行多个存储器位置（A0，A1，...，ALS-1）的第一读取以产生第一恢复串（S1），并且使用第一恢复串执行第一解码尝试（S1）。当第一解码尝试失败时，至少读取一次存储器位置，并且生成至少一个第二恢复串（S2-SN）。基于第一恢复串（S1）与第二恢复串恢复字符串（S2-SN），生成修改字符串（SM），其中存在擦除（X），并且使用修改字符串（SM）执行至少一个第二解码尝试。

2. 发明申请

US20080104477A1 Method for performing error corrections of digital information codified as a symbol sequence 有权
标题翻译：用于执行编码为符号序列的数字信息的纠错的方法
公开(公告)号：US20080104477A1
公开(公告)日：2008-05-01
申请号：US12001294
申请日：2007-12-10
申请人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
发明人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/1575 , H03M13/13 , H03M13/15 , H03M13/19
摘要： A method and system for making error corrections on digital information coded as symbol sequences, for example digital information stored in electronic memory systems or transmitted from and to these systems is described, provides the transmission of sequences incorporating a portion of error corrector code allowing the sequence which is more probably the original transmitted through the calculation of an error syndrome using a parity matrix to be restored when received. Advantageously according to embodiments of the invention, the error code incorporated in the original sequence belongs to a non Boolean group.
摘要翻译：描述了一种用于对编码为符号序列的数字信息进行纠错的方法和系统，例如存储在电子存储器系统中或从这些系统发送的数字信息或从这些系统发送和传送到这些系统的数字信息，提供包含一部分误差校正码的序列的传输，这更可能是通过使用在接收时要恢复的奇偶校验矩阵的误差校正子的计算来传送的。有利地，根据本发明的实施例，并入原始序列中的错误代码属于非布尔组。

3. 发明授权

US07328397B2 Method for performing error corrections of digital information codified as a symbol sequence 有权
公开(公告)号：US07328397B2
公开(公告)日：2008-02-05
申请号：US10805168
申请日：2004-03-19
申请人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
发明人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
IPC分类号： H03M13/00
CPC分类号： H03M13/1575 , H03M13/13 , H03M13/15 , H03M13/19
摘要： A method and system for making error corrections on digital information coded as symbol sequences, for example digital information stored in electronic memory systems or transmitted from and to these systems is described, provides the transmission of sequences incorporating a portion of error corrector code allowing the sequence which is more probably the original transmitted through the calculation of an error syndrome using a parity matrix to be restored when received.Advantageously according to embodiments of the invention, the error code incorporated in the original sequence belongs to a non Boolean group.

4. 发明申请

US20070234164A1 Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code 有权
标题翻译：具有嵌入式纠错码的存储器件的读取方法和具有嵌入式纠错码的存储器件
公开(公告)号：US20070234164A1
公开(公告)日：2007-10-04
申请号：US11713376
申请日：2007-03-01
申请人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
IPC分类号： G06F11/00 , G01R31/28
CPC分类号： G06F11/1076 , G06F11/1068 , G06F11/141 , G11B20/18
摘要： A reading method for a memory device with error-correcting encoding envisages the steps of: carrying out a first reading of a plurality of memory locations (A0, A1, . . . , ALS−1) to generate a first recovered string (S1), and performing a first decoding attempt using the first recovered string (S1). When the first decoding attempt fails, the memory locations are read at least one second time, and at least one second recovered string (S2-SN) is generated. On the basis of a comparison between the first recovered string (S1) and the second recovered string (S2-SN), a modified string (SM) is generated, in which erasures (X) are located, and at least one second decoding attempt is carried out using the modified string (SM).
摘要翻译：具有纠错编码的存储器件的读取方法设想的步骤是：执行多个存储器位置（A 0，A 1，...，ALS-1）的第一读取以产生第一恢复串 S1），并且使用第一恢复串执行第一解码尝试（S1）。当第一解码尝试失败时，至少读取一次存储器位置，并产生至少一个第二恢复字符串（S 2 -SN）。基于第一恢复字符串（S 1）和第二恢复字符串（S 2 -SN）之间的比较，生成修饰字符串（SM），其中存在消息（X），并且至少一个第二使用修改的串（SM）进行解码尝试。

5. 发明授权

US08966335B2 Method for performing error corrections of digital information codified as a symbol sequence 有权
标题翻译：用于执行编码为符号序列的数字信息的纠错的方法
公开(公告)号：US08966335B2
公开(公告)日：2015-02-24
申请号：US12001294
申请日：2007-12-10
申请人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
发明人： Massimiliano Lunelli , Rino Micheloni , Roberto Ravasio , Alessia Marelli
IPC分类号： H03M13/00 , H03M13/19 , H03M13/13 , H03M13/15
CPC分类号： H03M13/1575 , H03M13/13 , H03M13/15 , H03M13/19
摘要： A method and system for making error corrections on digital information coded as symbol sequences, for example digital information stored in electronic memory systems or transmitted from and to these systems is described, provides the transmission of sequences incorporating a portion of error corrector code allowing the sequence which is more probably the original transmitted through the calculation of an error syndrome using a parity matrix to be restored when received. Advantageously according to embodiments of the invention, the error code incorporated in the original sequence belongs to a non Boolean group.
摘要翻译：描述了一种用于对编码为符号序列的数字信息进行纠错的方法和系统，例如存储在电子存储器系统中或从这些系统发送的数字信息或从这些系统发送和传送到这些系统的数字信息，提供包含一部分误差校正码的序列的传输，这更可能是通过使用在接收时要恢复的奇偶校验矩阵的误差校正子的计算来传送的。有利地，根据本发明的实施例，并入原始序列中的错误代码属于非布尔组。

6. 发明授权

US08347201B2 Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code 有权
标题翻译：具有嵌入式纠错码的存储器件的读取方法和具有嵌入式纠错码的存储器件
公开(公告)号：US08347201B2
公开(公告)日：2013-01-01
申请号：US13047678
申请日：2011-03-14
申请人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
IPC分类号： G06F7/02 , H03M13/00
CPC分类号： G06F11/1076 , G06F11/1068 , G06F11/141 , G11B20/18
摘要： A reading method for a memory device with error-correcting encoding envisages the steps of: carrying out a first reading of a plurality of memory locations (A0, A1, . . . , ALS-1) to generate a first recovered string (S1), and performing a first decoding attempt using the first recovered string (S1). When the first decoding attempt fails, the memory locations are read at least one second time, and at least one second recovered string (S2-SN) is generated. On the basis of a comparison between the first recovered string (S1) and the second recovered string (S2-SN), a modified string (SM) is generated, in which erasures (X) are located, and at least one second decoding attempt is carried out using the modified string (SM).
摘要翻译：具有纠错编码的存储器件的读取方法设想的步骤是：执行多个存储器位置（A0，A1，...，ALS-1）的第一读取以产生第一恢复串（S1），并且使用第一恢复串执行第一解码尝试（S1）。当第一解码尝试失败时，至少读取一次存储器位置，并产生至少一个第二恢复字符串（S2-SN）。基于第一恢复串（S1）和第二恢复串（S2-SN）之间的比较，生成修改串（SM），其中存在擦除（X），并且至少一个第二解码尝试使用修改后的字符串（SM）进行。

7. 发明授权

US07908543B2 Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code 有权
标题翻译：具有嵌入式纠错码的存储器件的读取方法和具有嵌入式纠错码的存储器件
公开(公告)号：US07908543B2
公开(公告)日：2011-03-15
申请号：US11713376
申请日：2007-03-01
申请人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Valeria Intini , Roberto Ravasio , Rino Micheloni
IPC分类号： H03M13/00
CPC分类号： G06F11/1076 , G06F11/1068 , G06F11/141 , G11B20/18
摘要： A reading method for a memory device with error-correcting encoding envisages the steps of: carrying out a first reading of a plurality of memory locations (A0, A1, . . . , ALS−1) to generate a first recovered string (S1), and performing a first decoding attempt using the first recovered string (S1). When the first decoding attempt fails, the memory locations are read at least one second time, and at least one second recovered string (S2-SN) is generated. On the basis of a comparison between the first recovered string (S1) and the second recovered string (S2-SN), a modified string (SM) is generated, in which erasures (X) are located, and at least one second decoding attempt is carried out using the modified string (SM).
摘要翻译：具有纠错编码的存储器件的读取方法设想的步骤是：执行多个存储器位置（A0，A1，...，ALS-1）的第一读取以产生第一恢复串（S1），并且使用第一恢复串执行第一解码尝试（S1）。当第一解码尝试失败时，至少读取一次存储器位置，并产生至少一个第二恢复字符串（S2-SN）。基于第一恢复串（S1）和第二恢复串（S2-SN）之间的比较，生成修改串（SM），其中存在擦除（X），并且至少一个第二解码尝试使用修改后的字符串（SM）进行。

8. 发明申请

US20080065937A1 NAND FLASH MEMORY DEVICE WITH ECC PROTECTED RESERVED AREA FOR NON-VOLATILE STORAGE OF REDUNDANCY DATA 审中-公开
标题翻译：具有ECC保护区域的NAND闪存存储器件，用于非易失存储冗余数据
公开(公告)号：US20080065937A1
公开(公告)日：2008-03-13
申请号：US11854685
申请日：2007-09-13
申请人： Rino Micheloni , Roberto Ravasio , Alessia Marelli
发明人： Rino Micheloni , Roberto Ravasio , Alessia Marelli
IPC分类号： G11C29/04
CPC分类号： G11C29/82 , G06F11/1068 , G11C29/24 , G11C2029/0411
摘要： Basic redundancy information is non-volatily stored in a reserved area of an addressable area of a memory array, and is copied to volatile storage therein at every power-on of the memory device. The unpredictable though statistically inevitable presence of failed array elements in such a reserved area of the memory array corrupts the basic redundancy information established during the test-on wafer (EWS) phase of the fabrication process. This increases the number of rejects, and lowers the yield of the fabrication process. This problem is addressed by writing the basic redundancy data in the reserved area of the array with an ECC technique using a certain error correction code. The error correction code may be chosen among majority codes 3, 5, 7, 15 and the like, or the Hamming code for 1, 2, 3 or more errors, as a function of the fail probability of a memory cell as determined by the EWS phase during fabrication.
摘要翻译：基本冗余信息被非挥发地存储在存储器阵列的可寻址区域的保留区域中，并且在存储器件的每次上电时复制到其中的易失性存储器。在存储器阵列的这种保留区域中，不可预测的，不可避免的存在故障阵列元件会破坏在制造过程的测试晶片（EWS）阶段期间建立的基本冗余信息。这增加了废品的数量，降低了制造工艺的产量。通过使用特定的纠错码通过ECC技术将阵列的保留区域中的基本冗余数据写入该问题来解决该问题。可以在多数代码3,5,7,15等之中选择纠错码，或者对于1,2,3或更多个错误，可以选择Hamming代码作为存储器单元的故障概率的函数，如由 EWS相制造期间。

9. 发明申请

US20060010363A1 Method and system for correcting low latency errors in read and write non volatile memories, particularly of the flash type 审中-公开
标题翻译：用于校正读写非易失性存储器，特别是闪存类型的低延迟误差的方法和系统
公开(公告)号：US20060010363A1
公开(公告)日：2006-01-12
申请号：US11173896
申请日：2005-06-30
申请人： Alessia Marelli , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Roberto Ravasio , Rino Micheloni
IPC分类号： H03M13/00
CPC分类号： H03M13/1555 , H03M13/152 , H03M13/6561
摘要： A method for correcting errors in multilevel memories, both of the NAND and of the NOR type provides the use of a BCH correction code made parallel by means of a coding and decoding architecture allowing the latency limits of prior art sequential solutions to be overcome. The method provides a processing with a first predetermined parallelism for the coding step, a processing with a second predetermined parallelism for the syndrome calculation and a processing with a third predetermined parallelism for calculating the error position, each parallelism being defined by a respective integer number being independent from the others.
摘要翻译：用于校正多电平存储器中的错误的方法，NAND和NOR类型都提供使用通过编码和解码架构并行制作的BCH校正码，从而可以克服现有技术顺序解决方案的等待时间限制。该方法提供用于编码步骤的第一预定并行度的处理，用于校正子计算的第二预定并行性的处理和用于计算错误位置的第三预定并行度的处理，每个并行性由相应整数定义为独立于其他人。

10. 发明申请

US20060005109A1 Method and system for correcting errors in electronic memory devices 审中-公开
标题翻译：用于校正电子存储器件中的错误的方法和系统
公开(公告)号：US20060005109A1
公开(公告)日：2006-01-05
申请号：US11169497
申请日：2005-06-29
申请人： Alessia Marelli , Roberto Ravasio , Rino Micheloni
发明人： Alessia Marelli , Roberto Ravasio , Rino Micheloni
IPC分类号： H03M13/00
CPC分类号： H03M13/152 , H03M13/1575 , H03M13/3707 , H03M13/6502
摘要： A method and system for correcting errors in multilevel memories is based upon using a combination of a BCH correction code and a Hamming correction code. The BCH correction code is used for correcting multiple errors, and the Hamming correction code is used for correcting single errors. The Hamming correction code reduces the use of the decoding blocks for the BCH correction codes, which are computationally intensive.
摘要翻译：用于校正多电平存储器中的错误的方法和系统基于使用BCH校正码和汉明校正码的组合。 BCH校正码用于校正多个错误，汉明校正码用于校正单个错误。汉明校正码减少了用于计算密集型的BCH校正码的解码块的使用。

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