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    • 7. 发明授权
    • Method for fabricating a semiconductor device
    • 半导体器件的制造方法
    • US07163887B2
    • 2007-01-16
    • US10924847
    • 2004-08-25
    • Hiroshi KudoKoichiro Inazawa
    • Hiroshi KudoKoichiro Inazawa
    • H01L21/4763
    • H01L21/76811H01L21/31138H01L21/76807
    • A method for fabricating a semiconductor device that prevents the occurrence of bowing and thickness reduction in a dual damascene method. As shown in FIG. 2(B), silicon nitride etching is performed on a semiconductor device in process of fabrication which has a section shown in FIG. 2(A). As a result, part of a copper film is oxidized and changes into oxide. Moreover, a CFx deposit is formed on it. By performing organic insulating film etching by the use of hydrogen plasma in FIG. 2(C), however, the oxide is deoxidized to copper and the CFx deposit is converted into a volatile compound and is removed.
    • 一种制造半导体器件的方法,该半导体器件防止在双镶嵌方法中产生弯曲和厚度减小。 如图所示。 如图2(B)所示,在具有图2所示部分的制造工艺中对半导体器件进行氮化硅蚀刻。 2(A)。 结果,部分铜膜被氧化并变成氧化物。 此外,在其上形成CF x x沉积物。 通过在图1中使用氢等离子体进行有机绝缘膜蚀刻。 然而,如图2(C)所示,氧化物脱氧成铜,将CF>矿沉积物转化为挥发性化合物并除去。
    • 9. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US07679144B2
    • 2010-03-16
    • US11938441
    • 2007-11-12
    • Hiroshi KudoKenji Ishikawa
    • Hiroshi KudoKenji Ishikawa
    • H01L27/088H01L21/00H01L21/84
    • H01L27/1104H01L23/485H01L27/0207H01L27/11H01L2924/0002H01L2924/00
    • The semiconductor device includes a silicon substrate, a device isolation insulating film dividing an active region of the silicon substrate into plural pieces, a gate electrode formed on the active region, a source/drain region which is formed in the active region on both sides of the gate electrode, and which constitutes a MOS transistor of an SRAM memory cell with the gate electrode, an interlayer insulating film formed over each of the active region and the device isolation insulating film, a first hole which is formed in the interlayer isolation insulating film, and which commonly overlaps with two adjacent active regions and the device isolation insulating film between the active regions, and a first conductive plug which is formed in the first hole, and which electrically connects the two active regions.
    • 半导体器件包括硅衬底,将硅衬底的有源区分成多个部件的器件隔离绝缘膜,形成在有源区上的栅电极,形成在有源区的两侧的有源区中的源/漏区 并且构成具有栅电极的SRAM存储单元的MOS晶体管,形成在有源区和器件隔离绝缘膜之上的层间绝缘膜,形成在层间隔离绝缘膜中的第一孔 并且其通常与有源区域之间的两个相邻的有源区和器件隔离绝缘膜重叠,并且形成在第一孔中并且电连接两个有源区的第一导电插塞。