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1. 发明申请

US20080237728A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080237728A1
公开(公告)日：2008-10-02
申请号：US11976964
申请日：2007-10-30
申请人： Riichiro Mitsuhashi , Kota Oikawa , Osullivan Barry , Stefan Kubicek
发明人： Riichiro Mitsuhashi , Kota Oikawa , Osullivan Barry , Stefan Kubicek
IPC分类号： H01L27/092 , H01L21/3205
CPC分类号： H01L27/0922 , H01L21/28088 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： A semiconductor device includes: a p-type active region and an n-type active region which are formed in a semiconductor substrate; a first MISFET including a first gate insulating film formed on the p-type active region and a first gate electrode formed on the first gate insulating film and including a first electrode formation film containing a metal element; and a second MISFET including a second gate insulating film formed on the n-type active region and a second gate electrode formed on the second gate insulating film and including a second electrode formation film. The second electrode formation film contains the same metal element as the first electrode formation film and has an oxygen content higher than the first electrode formation film.
摘要翻译：半导体器件包括：形成在半导体衬底中的p型有源区和n型有源区; 第一MISFET，包括形成在p型有源区上的第一栅极绝缘膜和形成在第一栅极绝缘膜上的第一栅极，并且包括含有金属元素的第一电极形成膜; 以及包括形成在所述n型有源区上的第二栅极绝缘膜和形成在所述第二栅极绝缘膜上并包括第二电极形成膜的第二栅电极的第二MISFET。第二电极形成膜包含与第一电极形成膜相同的金属元素，并且具有高于第一电极形成膜的氧含量。

2. 发明申请

US20090184376A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090184376A1
公开(公告)日：2009-07-23
申请号：US12358188
申请日：2009-01-22
申请人： Hag-Ju Cho , Anabela Veloso , HongYu Yu , Stefan Kubicek , Shou-Zen Chang
发明人： Hag-Ju Cho , Anabela Veloso , HongYu Yu , Stefan Kubicek , Shou-Zen Chang
IPC分类号： H01L27/092 , H01L21/28
CPC分类号： H01L21/823857 , H01L21/823462 , H01L27/088 , H01L27/092 , H01L29/513
摘要： A dual work function semiconductor device and method for fabricating the same are disclosed. In one aspect, a device includes a first and second transistor on a first and second substrate region. The first and second transistors include a first gate stack having a first work function and a second gate stack having a second work function respectively. The first and second gate stack each include a host dielectric, a gate electrode comprising a metal layer, and a second dielectric capping layer therebetween. The second gate stack further has a first dielectric capping layer between the host dielectric and metal layer. The metal layer is selected to determine the first work function. The first dielectric capping layer is selected to determine the second work function.
摘要翻译：公开了一种双功能半导体器件及其制造方法。一方面，一种器件包括在第一和第二衬底区域上的第一和第二晶体管。第一和第二晶体管包括分别具有第一功函数的第一栅极堆叠和具有第二功函数的第二栅极堆叠。第一和第二栅极堆叠各自包括主电介质，包括金属层的栅电极和它们之间的第二电介质覆盖层。第二栅极堆叠还在主介质和金属层之间具有第一介电覆盖层。选择金属层以确定第一功函数。选择第一介电覆盖层以确定第二功函数。

3. 发明授权

US08313993B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08313993B2
公开(公告)日：2012-11-20
申请号：US12358188
申请日：2009-01-22
申请人： Hag-Ju Cho , Anabela Veloso , HongYu Yu , Stefan Kubicek , Shou-Zen Chang
发明人： Hag-Ju Cho , Anabela Veloso , HongYu Yu , Stefan Kubicek , Shou-Zen Chang
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462 , H01L27/088 , H01L27/092 , H01L29/513
摘要： A dual work function semiconductor device and method for fabricating the same are disclosed. In one aspect, a device includes a first and second transistor on a first and second substrate region. The first and second transistors include a first gate stack having a first work function and a second gate stack having a second work function respectively. The first and second gate stack each include a host dielectric, a gate electrode comprising a metal layer, and a second dielectric capping layer therebetween. The second gate stack further has a first dielectric capping layer between the host dielectric and metal layer. The metal layer is selected to determine the first work function. The first dielectric capping layer is selected to determine the second work function.
摘要翻译：公开了一种双功能半导体器件及其制造方法。一方面，一种器件包括在第一和第二衬底区域上的第一和第二晶体管。第一和第二晶体管包括分别具有第一功函数的第一栅极堆叠和具有第二功函数的第二栅极堆叠。第一和第二栅极堆叠各自包括主电介质，包括金属层的栅电极和它们之间的第二电介质覆盖层。第二栅极堆叠还在主介质和金属层之间具有第一介电覆盖层。选择金属层以确定第一功函数。选择第一介电覆盖层以确定第二功函数。

4. 发明申请

US20100219481A1 METHOD FOR MANUFACTURING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF 审中-公开
标题翻译：制造双功能半导体器件的半导体器件及其半导体器件的制造方法
公开(公告)号：US20100219481A1
公开(公告)日：2010-09-02
申请号：US12684803
申请日：2010-01-08
申请人： Joshua Tseng , Yasutoshi Okuno , Lars-Ake Ragnarsson , Tom Schram , Stefan Kubicek , Thomas Y. Hoffmann , Naohisa Sengoku
发明人： Joshua Tseng , Yasutoshi Okuno , Lars-Ake Ragnarsson , Tom Schram , Stefan Kubicek , Thomas Y. Hoffmann , Naohisa Sengoku
IPC分类号： H01L27/092 , H01L21/28
摘要： A method for manufacturing a dual work function device is disclosed. In one aspect, the process includes a first and second region in a substrate. The method includes forming a first transistor in the first region which has a first work function. Subsequently, a second transistor is formed in the second region having a different work function. The process of forming the first transistor includes providing a first gate dielectric stack having a first gate dielectric layer and a first gate dielectric capping layer on the first gate dielectric layer, performing a thermal treatment to modify the first gate dielectric stack, the modified first gate dielectric stack defining the first work function, providing a first metal gate electrode layer on the modified first gate dielectric stack, and patterning the first metal gate electrode layer and the modified first gate dielectric stack.
摘要翻译：公开了一种用于制造双功能功能装置的方法。在一个方面，该方法包括在基底中的第一和第二区域。该方法包括在具有第一功能的第一区域中形成第一晶体管。随后，在具有不同功函数的第二区域中形成第二晶体管。形成第一晶体管的过程包括提供在第一栅极介电层上具有第一栅极介电层和第一栅极介电覆盖层的第一栅极电介质堆叠，执行热处理以修改第一栅极电介质堆叠，修改的第一栅极限定第一功函数的电介质叠层，在修改的第一栅极电介质堆叠上提供第一金属栅极电极层，以及对第一金属栅极电极层和修改的第一栅极电介质堆叠进行构图。

5. 发明申请

US20080096383A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH MULTIPLE DIELECTRICS 审中-公开
标题翻译：用多个电介质制造半导体器件的方法
公开(公告)号：US20080096383A1
公开(公告)日：2008-04-24
申请号：US11874443
申请日：2007-10-18
申请人： Howard Tigelaar , Stefan Kubicek , HongYu Yu
发明人： Howard Tigelaar , Stefan Kubicek , HongYu Yu
IPC分类号： H01L23/48 , H01L21/02
CPC分类号： H01L21/823462 , H01L21/823857 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device with at least a first dielectric material and a second dielectric material is disclosed. In one aspect, the method comprises providing a first dielectric material on a substrate. The method further comprises providing a patterned sacrificial layer covering the first dielectric material in at least a first region of the substrate. The method further comprises providing a second dielectric material covering the patterned sacrificial layer in the first region and covering the first dielectric material in at least a second region, the second region being different from the first region. The method further comprises patterning the second dielectric material such that the patterned second dielectric material covers the first dielectric material in the second region but not the patterned sacrificial layer in the first region. The method further comprises removing the patterned sacrificial material.
摘要翻译：公开了一种制造具有至少第一介电材料和第二介电材料的半导体器件的方法。一方面，该方法包括在基底上提供第一介电材料。该方法还包括在衬底的至少第一区域中提供覆盖第一电介质材料的图案化牺牲层。该方法还包括提供覆盖第一区域中的图案化牺牲层并在至少第二区域中覆盖第一介电材料的第二电介质材料，第二区域与第一区域不同。该方法还包括对第二电介质材料进行图案化，使得图案化的第二电介质材料覆盖第二区域中的第一介电材料，但不覆盖第一区域中的图案化牺牲层。该方法还包括去除图案化的牺牲材料。

6. 发明申请

US20080191286A1 Methods for manufacturing a CMOS device with dual dielectric layers 审中-公开
标题翻译：制造具有双电介质层的CMOS器件的方法
公开(公告)号：US20080191286A1
公开(公告)日：2008-08-14
申请号：US11972601
申请日：2008-01-10
申请人： Shou-Zen Chang , Hong Yu Yu , Anabela Veloso , Rita Vos , Stefan Kubicek , Serge Biesemans , Raghunath Singanamalla , Anne Lauwers , Bart Onsia
发明人： Shou-Zen Chang , Hong Yu Yu , Anabela Veloso , Rita Vos , Stefan Kubicek , Serge Biesemans , Raghunath Singanamalla , Anne Lauwers , Bart Onsia
IPC分类号： H01L27/00 , H01L21/8238
CPC分类号： H01L21/823857 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L29/785
摘要： The present disclosure provides a dual workfunction semiconductor device and a method for manufacturing a dual workfunction semiconductor device. The method comprises providing a device on a first region and a device on a second region of a substrate. According to embodiments described herein, the method includes providing a dielectric layer onto the first and second region of the substrate, the dielectric layer on the first region being integrally deposited with the dielectric layer on the second region, and providing a gate electrode on top of the dielectric layer on both the first and second regions, the gate electrode on the first region being integrally deposited with the gate electrode on the second region. The method further includes changing the workfunction of the device on the first region by providing a capping layer onto the first region between the dielectric layer and the gate electrode, and changing the workfunction of the device on the second region by including species at the interface between the dielectric layer and the electrode.
摘要翻译：本公开提供了一种双功能半导体器件和用于制造双功能半导体器件的方法。该方法包括在第一区域上提供器件和在衬底的第二区域上提供器件。根据本文所述的实施例，该方法包括在基板的第一和第二区域上提供介电层，第一区域上的电介质层与第二区域上的电介质层整体沉积，并且在所述第一区域和所述第二区域上的所述电介质层，所述第一区域上的所述栅电极与所述第二区域上的所述栅极电极整体地沉积。该方法还包括通过在介电层和栅电极之间的第一区域上设置覆盖层来改变第一区域上的器件的功函数，以及通过在第二区域上的界面处包括物质来改变第二区域上的器件的功函数介电层和电极。

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