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    • 7. 发明授权
    • Rapid thermal annealing of doped polycrystalline silicon structures formed in a single-wafer cluster tool
    • 在单晶片集成工具中形成的掺杂多晶硅结构的快速热退火
    • US06204198B1
    • 2001-03-20
    • US09447174
    • 1999-11-22
    • Aditi D. BanerjeeDouglas E. MercerRick L. Wise
    • Aditi D. BanerjeeDouglas E. MercerRick L. Wise
    • H01L2131
    • H01L21/28035
    • An embodiment of the instant invention is a method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a doped polycrystalline silicon layer insulatively disposed over the semiconductor substrate; and subjecting the doped polycrystalline silicon layer to a temperature of around 700 to 1100 C. in an oxidizing ambient for a period of around 5 to 120 seconds. Preferably, the oxidizing ambient is comprised of: O2,O3, NO, N2O, H2O, and any combination thereof. The temperature is, preferably, around 950 to 1050 C. (more preferably around 1000 C.). The step of subjecting the doped polycrystalline silicon layer to a temperature of around 700 to 1100 C. in an oxidizing ambient for a period of around 5 to 120 seconds, preferably, forms an oxide layer on the polycrystalline silicon layer, which has a thickness which is, preferably, greater than the thickness of a native oxide layer. More preferably, it has a thickness which is greater than 3 nm (more preferably greater than 2 nm). In an alternative embodiment, the thickness of the oxide layer is less than 20 nm (more preferably, less than 10 nm thick).
    • 本发明的一个实施例是一种在半导体衬底上制造电子器件的方法,该方法包括以下步骤:形成绝缘地设置在半导体衬底上的掺杂多晶硅层; 并在氧化环境中将掺杂的多晶硅层经受约700至1100℃的温度约5至120秒的时间。 优选地,氧化环境包括:O 2,O 3,NO,N 2 O,H 2 O及其任何组合。 温度优选为950〜1050℃左右(更优选为1000℃左右)。 在氧化环境中将掺杂多晶硅层的温度约为700〜1100℃的温度进行约5〜120秒的时间,优选在多晶硅层上形成氧化物层,其厚度为 优选地大于天然氧化物层的厚度。 更优选地,其厚度大于3nm(更优选大于2nm)。 在替代实施例中,氧化物层的厚度小于20nm(更优选小于10nm厚)。