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1. 发明授权

US6067206A Method and apparatus to compensate for servo wedge rotational offset after a head switch 失效
标题翻译：磁头开关后补偿伺服楔形旋转偏移的方法和装置
公开(公告)号：US6067206A
公开(公告)日：2000-05-23
申请号：US972655
申请日：1997-11-18
申请人： Richard W. Hull , David B. Joan , Charles R. Patton, III , Vafa James Rakshani , Charles W. Simmons
发明人： Richard W. Hull , David B. Joan , Charles R. Patton, III , Vafa James Rakshani , Charles W. Simmons
IPC分类号： G11B5/48 , G11B5/55 , G11B5/596 , G11B21/08
CPC分类号： G11B5/59688 , G11B5/5534 , G11B5/5565 , G11B5/59627 , G11B5/59644 , G11B5/59655
摘要： A disk drive controller having a microprocessor and a sampled signal head positioning system measures and stores the relative rotational offsets between heads arranged in a stacked relationship and respective servo wedges on different disk surfaces. The offsets are stored in a table and subsequently applied to a servo wedge detection circuit to ensure that a next sequential wedge is detected after a head switch.
摘要翻译：具有微处理器和采样信号头定位系统的磁盘驱动器控制器测量和存储在堆叠关系中布置的磁头之间的相对旋转偏移和在不同磁盘表面上的各个伺服楔。偏移量存储在表格中，随后应用于伺服楔形检测电路，以确保在头部开关之后检测到下一个顺序的楔形物。

2. 发明授权

US06519104B1 Computer system comprising a host connected to a disk drive employing read channel IC with common port for data and servo 有权
标题翻译：计算机系统包括连接到采用具有用于数据和伺服的公共端口的读取通道IC的磁盘驱动器的主机
公开(公告)号：US06519104B1
公开(公告)日：2003-02-11
申请号：US10084819
申请日：2002-02-28
申请人： Robert L. Cloke , David P. Turner , Richard W. Hull , Vafa James Rakshani
发明人： Robert L. Cloke , David P. Turner , Richard W. Hull , Vafa James Rakshani
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/5965 , G11B20/10009 , G11B20/10037 , G11B20/1217 , G11B20/1258 , G11B20/1403 , G11B27/3027 , G11B2020/10888 , G11B2020/1232 , G11B2020/1267 , G11B2020/1275 , G11B2020/1282 , G11B2020/1287 , G11B2020/1292 , G11B2220/20 , G11B2220/2516
摘要： A computer system is disclosed comprising a host connected to a disk drive, the disk drive comprising a disk having a disk surface. The disk drive further includes a controller and a channel integrated circuit chip. The controller includes a controller port. The channel integrated circuit chip includes an input for receiving a time-multiplexed analog read signal. The time-multiplexed analog read signal is processed to generate data symbols representing recovered servo data and recovered user data. The channel integrated circuit chip includes a channel port for transferring both the recovered servo data and the recovered user data. The disk drive further includes a communication bus connected between the channel port and the controller port. The channel port transfers both the recovered servo data and the recovered user data to the communication bus. The communication bus transfers both the recovered servo data and the recovered user data to the controller port.
摘要翻译：公开了一种包括连接到磁盘驱动器的主机的计算机系统，该磁盘驱动器包括具有磁盘表面的磁盘。磁盘驱动器还包括控制器和通道集成电路芯片。控制器包括一个控制器端口。信道集成电路芯片包括用于接收时分复用的模拟读取信号的输入端。处理时分复用模拟读取信号以产生表示恢复的伺服数据和恢复的用户数据的数据符号。通道集成电路芯片包括用于传送恢复的伺服数据和恢复的用户数据的通道端口。磁盘驱动器还包括连接在通道端口和控制器端口之间的通信总线。通道端口将恢复的伺服数据和恢复的用户数据传送到通信总线。通信总线将恢复的伺服数据和恢复的用户数据传送到控制器端口。

3. 发明授权

US06487032B1 Computer system comprising a host connected to a disk drive employing state variable trap registers for providing stored servo and user data state variables to sampled-data channel 有权
标题翻译：计算机系统包括连接到采用状态变量陷阱寄存器的磁盘驱动器的主机，用于向采样数据信道提供存储的伺服和用户数据状态变量
公开(公告)号：US06487032B1
公开(公告)日：2002-11-26
申请号：US10083745
申请日：2002-02-25
申请人： Robert L. Cloke , Vafa James Rakshani , Richard W. Hull , David P. Turner
发明人： Robert L. Cloke , Vafa James Rakshani , Richard W. Hull , David P. Turner
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/5965 , G11B20/10009 , G11B20/10037 , G11B20/1217 , G11B20/1258 , G11B20/1403 , G11B27/3027 , G11B2020/10888 , G11B2020/1232 , G11B2020/1267 , G11B2020/1275 , G11B2020/1282 , G11B2020/1287 , G11B2020/1292 , G11B2220/20 , G11B2220/2516
摘要： A computer system is disclosed comprising a host connected to a disk drive, the disk drive comprising a disk surface having a plurality of tracks arranged in an embedded servo format including servo track segments for storing servo data and data track segments for storing user data. The disk drive includes a read element operative during a user-data read operation for reading data from the disk surface to produce a time-multiplexed analog read signal that during a revolution of the disk represents analog read servo data during each of a first set of time intervals and represents analog read user data during each of a second set of time intervals. The disk drive includes a sampled signal processing circuit that generates a servo state variable while processing the time-multiplexed read signal during the first servo time interval and a user data state variable while processing the time-multiplexed read signal during the first user data time interval. The disk drive includes a servo state variable trap register for storing the servo state variable at the end of the first servo time interval. The disk drive includes a data state variable trap register for storing the user data state variable at the end of the first user data time interval. The disk drive includes a control circuit for providing the stored servo state variable to the sampled signal processing circuit at the beginning of the second servo time interval. The control circuit provides the stored user data state variable to the sampled signal processing circuit at the beginning of the second user data time interval.
摘要翻译：公开了一种计算机系统，包括连接到磁盘驱动器的主机，磁盘驱动器包括具有以嵌入式伺服格式布置的多个磁道的磁盘表面，包括用于存储伺服数据的伺服磁道段和用于存储用户数据的数据磁道段。磁盘驱动器包括在用户数据读取操作期间操作用于从盘表面读取数据的读取元件，以产生时间复用的模拟读取信号，该时间复用模拟读取信号在盘的转动期间代表模拟读取伺服数据，每个第一组时间间隔，并且在第二组时间间隔中的每一个期间表示模拟读取用户数据。磁盘驱动器包括采样信号处理电路，其在第一伺服时间间隔期间处理时间复用的读取信号和在第一用户数据时间间隔期间处理时间复用的读取信号的用户数据状态变量时产生伺服状态变量。磁盘驱动器包括伺服状态变量陷阱寄存器，用于在第一伺服时间间隔结束时存储伺服状态变量。磁盘驱动器包括用于在第一用户数据时间间隔结束时存储用户数据状态变量的数据状态变量陷阱寄存器。磁盘驱动器包括控制电路，用于在第二伺服时间间隔开始时将所存储的伺服状态变量提供给采样信号处理电路。控制电路在第二用户数据时间间隔开始时将采集的用户数据状态变量提供给采样信号处理电路。

4. 发明授权

US06278568B1 Disk drive employing read channel IC with common port for data and servo 有权
标题翻译：磁盘驱动器采用带通用端口的读通道IC，用于数据和伺服
公开(公告)号：US06278568B1
公开(公告)日：2001-08-21
申请号：US09223475
申请日：1998-12-30
申请人： Robert L. Cloke , Richard W. Hull , Vafa James Rakshani , David P. Turner
发明人： Robert L. Cloke , Richard W. Hull , Vafa James Rakshani , David P. Turner
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/5965 , G11B20/10009 , G11B20/10037 , G11B20/1217 , G11B20/1258 , G11B20/1403 , G11B27/3027 , G11B2020/10888 , G11B2020/1232 , G11B2020/1267 , G11B2020/1275 , G11B2020/1282 , G11B2020/1287 , G11B2020/1292 , G11B2220/20 , G11B2220/2516
摘要： A disk drive includes a disk having a disk surface. The disk surface has a plurality of tracks arranged in an embedded servo format including servo track segments for storing servo data and data track segments for storing user data. Data from the disk surface is read to produce a time-multiplexed analog read signal that during a revolution of the disk represents analog read servo data during each of a first set of time intervals and represents analog read user data during each of a second set of time intervals. The disk drive further includes a controller and a channel integrated circuit chip. The controller includes a controller port. The channel integrated circuit chip includes an input for receiving the time-multiplexed analog read signal. The time-multiplexed analog read signal is processed to generate data symbols representing recovered servo data and recovered user data. The channel integrated circuit chip includes a channel port for transferring both the recovered servo data and the recovered user data. The disk drive further includes a communication bus connected between the channel port and the controller port. The channel port transfers both the recovered servo data and the recovered user data to the communication bus. The communication bus transfers both the recovered servo data and the recovered user data to the controller port.
摘要翻译：磁盘驱动器包括具有盘表面的盘。磁盘表面具有以嵌入式伺服格式布置的多个磁道，包括用于存储伺服数据的伺服磁道段和用于存储用户数据的数据磁道段。读取来自磁盘表面的数据以产生时间复用的模拟读取信号，其在盘的转动期间表示在第一组时间间隔期间的每一个中的模拟读取伺服数据，并且在第二组时间间隔。磁盘驱动器还包括控制器和通道集成电路芯片。控制器包括一个控制器端口。信道集成电路芯片包括用于接收时间复用的模拟读取信号的输入端。处理时分复用模拟读取信号以产生表示恢复的伺服数据和恢复的用户数据的数据符号。通道集成电路芯片包括用于传送恢复的伺服数据和恢复的用户数据的通道端口。磁盘驱动器还包括连接在通道端口和控制器端口之间的通信总线。通道端口将恢复的伺服数据和恢复的用户数据传送到通信总线。通信总线将恢复的伺服数据和恢复的用户数据传送到控制器端口。

5. 发明授权

US06178056B1 Disk drive employing state variable trap registers for providing stored servo and user data state variables to sampled-data channel 有权
标题翻译：采用状态变量陷阱寄存器的磁盘驱动器，用于向采样数据通道提供存储的伺服和用户数据状态变量
公开(公告)号：US06178056B1
公开(公告)日：2001-01-23
申请号：US09293487
申请日：1999-04-15
申请人： Robert Leslie Cloke , Richard W. Hull , Vafa James Rakshani , David Price Turner
发明人： Robert Leslie Cloke , Richard W. Hull , Vafa James Rakshani , David Price Turner
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/5965 , G11B20/10009 , G11B20/10037 , G11B20/1217 , G11B20/1258 , G11B20/1403 , G11B27/3027 , G11B2020/10888 , G11B2020/1232 , G11B2020/1267 , G11B2020/1275 , G11B2020/1282 , G11B2020/1287 , G11B2020/1292 , G11B2220/20 , G11B2220/2516
摘要： A disk drive includes a disk surface having a plurality of tracks arranged in an embedded servo format including servo track segments for storing servo data and data track segments for storing user data. The disk drive includes a read element operative during a user-data read operation for reading data from the disk surface to produce a time-multiplexed analog read signal that during a revolution of the disk represents analog read servo data during each of a first set of time intervals and represents analog read user data during each of a second set of time intervals. The disk drive includes a sampled signal processing circuit that generates a servo state variable while processing the time-multiplexed read signal during the first servo time interval and a user data state variable while processing the time-multiplexed read signal during the first user data time interval. The disk drive includes a servo state variable trap register for storing the servo state variable at the end of the first servo time interval. The disk drive includes a data state variable trap register for storing the user data state variable at the end of the first user data time interval. The disk drive includes a control circuit for providing the stored servo state variable to the sampled signal processing circuit at the beginning of the second servo time interval. The control circuit provides the stored user data state variable to the sampled signal processing circuit at the beginning of the second user data time interval.
摘要翻译：磁盘驱动器包括具有以嵌入式伺服格式布置的多个磁道的磁盘表面，包括用于存储伺服数据的伺服磁道段和用于存储用户数据的数据磁道段。磁盘驱动器包括在用户数据读取操作期间操作用于从盘表面读取数据的读取元件，以产生时间复用的模拟读取信号，该时间复用模拟读取信号在盘的转动期间代表模拟读取伺服数据，每个第一组时间间隔，并且在第二组时间间隔中的每一个期间表示模拟读取用户数据。磁盘驱动器包括采样信号处理电路，其在第一伺服时间间隔期间处理时间复用的读取信号和在第一用户数据时间间隔期间处理时间复用的读取信号的用户数据状态变量时产生伺服状态变量。磁盘驱动器包括伺服状态变量陷阱寄存器，用于在第一伺服时间间隔结束时存储伺服状态变量。磁盘驱动器包括用于在第一用户数据时间间隔结束时存储用户数据状态变量的数据状态变量陷阱寄存器。磁盘驱动器包括控制电路，用于在第二伺服时间间隔开始时将所存储的伺服状态变量提供给采样信号处理电路。控制电路在第二用户数据时间间隔开始时将采集的用户数据状态变量提供给采样信号处理电路。

6. 发明授权

US08374225B2 Voice/data/RF integrated circuit 有权
标题翻译：语音/数据/射频集成电路
公开(公告)号：US08374225B2
公开(公告)日：2013-02-12
申请号：US11641999
申请日：2006-12-19
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Hooman Darabi , Frederic Christian Marc Hayem , Claude G. Hayek , Vafa James Rakshani , Nelson R. Sollenberger , Yossi Cohen
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Hooman Darabi , Frederic Christian Marc Hayem , Claude G. Hayek , Vafa James Rakshani , Nelson R. Sollenberger , Yossi Cohen
IPC分类号： H04B1/38 , H04L5/16
CPC分类号： H04W64/00 , H04B1/406 , H04M1/253
摘要： A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the baseband processing module, the RF section, and with off-chip circuits.
摘要翻译：语音数据RF IC包括基带处理模块，RF部分和接口模块。基带处理模块将出站语音信号转换为出站语音符号流，将入站语音符号流转换为入站语音信号，将出站数据转换为出站数据符号流，并将入站数据符号流转换为入站数据。 RF部分将进入的RF语音信号转换成入站语音符号流，将出站的语音符号流转换成出站的RF语音信号，将入站的RF数据信号转换成入站数据符号流，并将出站的数据符号流转换成出站RF数据信号。接口模块提供基带处理模块，RF部分和片外电路之间的耦合。

7. 发明授权

US08311929B2 IC with mixed mode RF-to-baseband interface 有权
标题翻译： IC具有混合模式RF到基带接口
公开(公告)号：US08311929B2
公开(公告)日：2012-11-13
申请号：US11888840
申请日：2007-08-02
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Claude G. Hayek , Frederic Christian Marc Hayem , Vafa James Rakshani , Hooman Darabi
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Claude G. Hayek , Frederic Christian Marc Hayem , Vafa James Rakshani , Hooman Darabi
IPC分类号： G06Q40/00
CPC分类号： H04B17/309
摘要： An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is operable to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.
摘要翻译：集成电路（IC）包括至少一个基带部分，至少一个射频（RF）部分和接口模块。所述接口模块可操作以将所述至少一个基带部分耦合到所述至少一个RF部分，其中所述接口模块包括模拟接口模块和数字接口模块。

8. 发明授权

US08171323B2 Integrated circuit with modular dynamic power optimization architecture 有权
标题翻译：具有模块化动态功耗优化架构的集成电路
公开(公告)号：US08171323B2
公开(公告)日：2012-05-01
申请号：US12166065
申请日：2008-07-01
申请人： Vafa James Rakshani , Musaravakkam Samaram Krishnan
发明人： Vafa James Rakshani , Musaravakkam Samaram Krishnan
IPC分类号： G06F1/00 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3287 , G06F1/3296 , Y02D10/171 , Y02D10/172
摘要： A system and method for regulating power consumption within an integrated circuit (IC) with a modular design. The IC is designed so that any one distinct functional module within the IC utilizes only transistors with a substantially same or similar critical voltage level, which may for example be the threshold voltage of the transistors. Consequently, the supply voltage delivered to each functional modules can be lowered to the minimum voltage necessary to enable the transistors within the module to operate. Similarly, modules within the IC may be designed with transistors which share a common value for a substrate bias voltage or a clock speed, or with a combination of common values for several electrical factors. In this way, it is possible to reduce power consumption by fine-tuning the voltages supplied to (or clock speeds driving) specific modules, in a way which is custom-tuned to each module.
摘要翻译：一种用于通过模块化设计调整集成电路（IC）内功耗的系统和方法。 IC被设计成使得IC内的任何不同的功能模块仅使用具有基本上相同或相似的临界电压电平的晶体管，其可以例如是晶体管的阈值电压。因此，传递到每个功能模块的电源电压可以降低到使模块内的晶体管工作所需的最小电压。类似地，IC内的模块可以被设计成具有共享用于衬底偏置电压或时钟速度的公共值的晶体管，或者用于几个电因素的公共值的组合。以这种方式，可以以对每个模块进行定制的方式微调提供给（或时钟速度驱动）特定模块的电压来降低功耗。

9. 发明授权

US07929939B2 Multi-mode cellular IC memory management 有权
标题翻译：多模式蜂窝IC内存管理
公开(公告)号：US07929939B2
公开(公告)日：2011-04-19
申请号：US12056493
申请日：2008-03-27
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Hooman Darabi , Vafa James Rakshani , Claude G. Hayek
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Hooman Darabi , Vafa James Rakshani , Claude G. Hayek
IPC分类号： H04B1/28
CPC分类号： H04B1/406
摘要： An RFIC includes first and second RF sections, first and second PHY processing modules, first and second upper layer processing modules, and memory. When the RFIC is in a first receive mode, the first RF section, the first PHY processing module, and the first upper layers processing module convert a first inbound RF signal into a first inbound audio signal in accordance with a first wireless communication protocol. When the RFIC is in a second receive mode, the second RF section, the second PHY processing module, and the second upper layers processing module convert a second inbound RF signal into a second inbound audio signal in accordance with a second wireless communication protocol. The memory stores the first and second inbound audio signals. The first PHY processing module retrieves, based on the receive mode, the first or second inbound audio signal from the memory and converts the first or second inbound audio signal into a first or second inbound analog audio signal.
摘要翻译： RFIC包括第一和第二RF部分，第一和第二PHY处理模块，第一和第二上层处理模块以及存储器。当RFIC处于第一接收模式时，第一RF部分，第一PHY处理模块和第一上层处理模块根据第一无线通信协议将第一入站RF信号转换成第一入站音频信号。当RFIC处于第二接收模式时，第二RF部分，第二PHY处理模块和第二上层处理模块根据第二无线通信协议将第二入站RF信号转换成第二入站音频信号。存储器存储第一和第二入站音频信号。第一PHY处理模块基于接收模式检索来自存储器的第一或第二入站音频信号，并将第一或第二入站音频信号转换为第一或第二入站模拟音频信号。

10. 发明申请

US20080146186A1 On-chip baseband-to-RF interface and applications thereof 有权
标题翻译：片上基带到RF接口及其应用
公开(公告)号：US20080146186A1
公开(公告)日：2008-06-19
申请号：US11641915
申请日：2006-12-19
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
IPC分类号： H04B1/28
CPC分类号： H04B1/3833 , H04B1/406 , H04W4/18
摘要： An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.
摘要翻译：片上基带到RF接口包括接收/发送部分，控制部分和时钟部分。接收/发送部分处于接收模式时，将来自RF电路的入站符号流提供给基带处理模块，并且当处于发送模式时，将来自基带处理模块的出站符号流提供给RF电路。控制部分提供基带处理模块和RF电路之间的控制通信路径。时钟部分提供基带处理模块和RF电路之间的时钟通信路径。

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