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1. 发明授权

US06650768B1 Using time resolved light emission from VLSI circuit devices for navigation on complex systems 失效
标题翻译：使用VLSI电路设备的时间分辨光发射在复杂系统上进行导航
公开(公告)号：US06650768B1
公开(公告)日：2003-11-18
申请号：US09026288
申请日：1998-02-19
申请人： Richard James Evans , Jeffrey Alan Kash , Daniel Ray Knebel , Phillip J Nigh , Pia Naoko Sanda , James Chen-Hsiang Tsang , David Paul Vallett
发明人： Richard James Evans , Jeffrey Alan Kash , Daniel Ray Knebel , Phillip J Nigh , Pia Naoko Sanda , James Chen-Hsiang Tsang , David Paul Vallett
IPC分类号： G06K900
CPC分类号： G01R31/311
摘要： A system and method for determining the location of a particular device on an integrated circuit chip is described. The system and method utilize apparatus for detecting the emission of light during switching events of devices in the circuit during the circuit's processing of an input calculated to actuate the device whose location is desired. Light emissions from the circuit can be temporally and spatially indexed so as to allow deduction, in combination with the a priori knowledge of the logical operation of the circuit, of the location of the desired element. In another embodiment of the invention, a series of images of the circuit can be accumulated, representing the circuit's response to a series of different input signals, each input signal being designed to result in the switching of the desired element. The series of images can be compared to determine the location of the desired element. Also in accordance with the invention, the elements to be located can be either actual functional circuit elements, or fiducials added to the chip for test purposes.
摘要翻译：描述用于确定集成电路芯片上的特定装置的位置的系统和方法。该系统和方法利用在电路处理计算出的驱动所需位置的装置的输入的处理期间检测电路中装置的切换事件期间发光的装置。来自电路的光发射可以在时间上和空间上被索引，以便结合对电路的逻辑操作的先验知识来扣除所需元件的位置。在本发明的另一个实施例中，可以累积电路的一系列图像，表示电路对一系列不同输入信号的响应，每个输入信号被设计成导致期望元件的切换。可以比较一系列图像以确定所需元素的位置。同样根据本发明，待设置的元件可以是实际的功能电路元件，或者为了测试目的添加到芯片的基准。

2. 发明授权

US06304668B1 Using time resolved light emission from VLSI circuit devices for navigation on complex systems 失效
公开(公告)号：US06304668B1
公开(公告)日：2001-10-16
申请号：US09026288
申请日：1998-02-19
申请人： Richard James Evans , Jeffrey Alan Kash , Daniel Ray Knebel , Phillip J Nigh , Pia Naoko Sanda , James Chen-Hsiang Tsang , David Paul Vallett
发明人： Richard James Evans , Jeffrey Alan Kash , Daniel Ray Knebel , Phillip J Nigh , Pia Naoko Sanda , James Chen-Hsiang Tsang , David Paul Vallett
IPC分类号： G06K900
摘要： A system and method for determining the location of a particular device on an integrated circuit chip is described. The system and method utilize apparatus for detecting the emission of light during switching events of devices in the circuit during the circuit's processing of an input calculated to actuate the device whose location is desired. Light emissions from the circuit can be temporally and spatially indexed so as to allow deduction, in combination with the a priori knowledge of the logical operation of the circuit, of the location of the desired element. In another embodiment of the invention, a series of images of the circuit can be accumulated, representing the circuit's response to a series of different input signals, each input signal being designed to result in the switching of the desired element. The series of images can be compared to determine the location of the desired element. Also in accordance with the invention, the elements to be located can be either actual functional circuit elements, or fiducials added to the chip for test purposes.

3. 发明授权

US06172512B2 Image processing methods for the optical detection of dynamic errors in integrated circuits 失效
标题翻译：集成电路动态误差光学检测的图像处理方法
公开(公告)号：US06172512B2
公开(公告)日：2001-01-09
申请号：US09026287
申请日：1998-02-19
申请人： Richard James Evans , David Frank Heidel , Jeffrey Alan Kash , Daniel Ray Knebel , James Chen-Hsiang Tsang
发明人： Richard James Evans , David Frank Heidel , Jeffrey Alan Kash , Daniel Ray Knebel , James Chen-Hsiang Tsang
IPC分类号： G01R31302
CPC分类号： G01R31/311
摘要： Methods for the ready identification of dynamic defects using switching induced light emission from CMOS gates in complex integrated circuits such as microprocessors are described. The rapid increase in the complexity of logic circuits means that practical gate level identification of the sources of dynamic errors will require methods other than the gate by gate tracing of every possible path taken by a given set of instructions. The methods described here are based on the ability of picosecond imaging circuit analysis to detect the switching activity of every gate of a complex circuit in a single, passive measurement, and the ability of data processing today to compare large two- and three-dimensional files.
摘要翻译：描述了使用诸如微处理器的复杂集成电路中的来自CMOS门的切换感应发光来准确识别动态缺陷的方法。逻辑电路的复杂性的快速增加意味着动态误差源的实际门电平识别将需要通过栅极跟踪除了由给定的一组指令采取的每个可能路径之外的方法的方法。这里描述的方法是基于皮秒成像电路分析在单个被动测量中检测复杂电路的每个门的开关活动的能力，以及当今数据处理能力来比较大的二维和三维文件的能力。

4. 发明授权

US06239469B1 Method for fabrication of silicon on insulator substrates 失效
标题翻译：硅绝缘体基板制造方法
公开(公告)号：US06239469B1
公开(公告)日：2001-05-29
申请号：US09677059
申请日：2000-09-29
申请人： Ronald Jay Bolam , Richard James Evans , Anthony Michael Palagonia
发明人： Ronald Jay Bolam , Richard James Evans , Anthony Michael Palagonia
IPC分类号： H01L2701
CPC分类号： H01L21/76264 , H01L21/76272 , H01L21/76283
摘要： A method for forming a silicon on insulator region on a single crystal silicon substrate, comprising the steps of: forming a first dielectric region in a silicon substrate by etching, deposition, and chemical-mechanical polishing; forming a single crystal layer on the substrate by polysilicon deposition and re-growth or epitaxial growth; removing portions of the single crystal layer to produce silicon islands that are fully on the first dielectric region; and filling in the spaces between the silicon islands with a second dielectric, by deposition and chemical-mechanical-polish, that overlaps peripheral portions of the first dielectric. Additional steps subdivide the fully isolated silicon on insulator regions by etching trenches in the islands and backfilling with a third dielectric, by deposition and chemical-mechanical-polish.
摘要翻译：一种在单晶硅衬底上形成绝缘体上硅区域的方法，包括以下步骤：通过蚀刻，沉积和化学机械抛光在硅衬底中形成第一电介质区域; 通过多晶硅沉积和再生长或外延生长在衬底上形成单晶层; 去除单晶层的部分以产生完全在第一介电区域上的硅岛; 以及通过与第一电介质的外围部分重叠的沉积和化学机械抛光来填充硅岛之间的空间与第二电介质。附加步骤通过蚀刻岛中的沟槽并通过沉积和化学机械抛光来用第三电介质回填来细分绝缘体上的完全隔离的区域。

5. 发明授权

US06194253B1 Method for fabrication of silicon on insulator substrates 失效
标题翻译：硅绝缘体基板制造方法
公开(公告)号：US06194253B1
公开(公告)日：2001-02-27
申请号：US09167693
申请日：1998-10-07
申请人： Ronald Jay Bolam , Richard James Evans , Anthony Michael Palagonia
发明人： Ronald Jay Bolam , Richard James Evans , Anthony Michael Palagonia
IPC分类号： H01L2100
CPC分类号： H01L21/76264 , H01L21/76272 , H01L21/76283
摘要： A method for forming a silicon on insulator region on a single crystal silicon substrate, comprising the steps of: forming a first dielectric region in a silicon substrate by etching, deposition, and chemical-mechanical polishing; forming a single crystal layer on the substrate by polysilicon deposition and re-growth or epitaxial grownth; removing portions of the single crystal layer to produce silicon islands that are fully on the first dielectric region; and filling in the spaces between the silicon islands with a second dielectric, by deposition and chemical-mechanical-polish, that overlaps peripheral portions of the first dielectric. Additional steps sub-divide the fully isolated silicon on insulator regions by etching trenches in the islands and backfilling with a third dielectric, by deposition and chemical-mechanical-polish.
摘要翻译：一种在单晶硅衬底上形成绝缘体上硅区域的方法，包括以下步骤：通过蚀刻，沉积和化学机械抛光在硅衬底中形成第一电介质区域; 通过多晶硅沉积和再生长或外延生长在衬底上形成单晶层; 去除单晶层的部分以产生完全在第一介电区域上的硅岛; 以及通过与第一电介质的外围部分重叠的沉积和化学机械抛光来填充硅岛之间的空间与第二电介质。额外的步骤通过蚀刻岛中的沟槽并通过沉积和化学机械抛光将第三电介质回填分隔绝缘体上绝缘体上的绝缘体区域。

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