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1. 发明授权

US4631748A Electronic handheld translator having miniature electronic speech synthesis chip 失效
标题翻译：具有微型电子语音合成芯片的电子手持翻译器
公开(公告)号：US4631748A
公开(公告)日：1986-12-23
申请号：US351844
申请日：1982-02-24
申请人： Paul S. Breedlove , James H. Moore , George L. Brantingham , Richard H. Wiggins, Jr.
发明人： Paul S. Breedlove , James H. Moore , George L. Brantingham , Richard H. Wiggins, Jr.
IPC分类号： G09B7/04 , G10L13/08 , G10L19/00 , G10L5/00
CPC分类号： G10L19/00 , G09B7/04 , G10L13/08
摘要： An electronic handheld talking translator including a speech synthesis integrated circuit device. The speech synthesis integrated circuit device includes a digital filter, a voiced/unvoiced excitation circuit, a speech parameter interpolator, an input parameter decoder, a digital-to-analog converter, a speaker and associated timing circuits. A non-volatile memory stores digital data representative of the correct spellings of selected words in a foreign language and the model vocal tract control data necessary to control the speech synthesis circuit in a manner to cause the selected words to be audibly pronounced by the translator.
摘要翻译：一种包括语音合成集成电路装置的电子手持通话翻译器。语音合成集成电路装置包括数字滤波器，有声/无声激励电路，语音参数内插器，输入参数解码器，数模转换器，扬声器和相关的定时电路。非易失性存储器存储表示外语中所选择的单词的正确拼写的数字数据和以使得所选择的单词被翻译器听得见的方式来控制语音合成电路所需的模型声道控制数据。

2. 发明授权

US4468805A Variable frame length data converter for a speech synthesis circuit 失效
标题翻译：用于语音合成电路的可变帧长数据转换器
公开(公告)号：US4468805A
公开(公告)日：1984-08-28
申请号：US310661
申请日：1981-10-13
申请人： Richard H. Wiggins, Jr. , George L. Brantingham
发明人： Richard H. Wiggins, Jr. , George L. Brantingham
IPC分类号： G09B7/04 , G10L13/08 , G10L19/00 , G10L1/00
CPC分类号： G10L19/00 , G09B7/04 , G10L13/08
摘要： A speech synthesis circuit is provided with a variable frame length data converter and the speech synthesizer is preferably integrated on an integrated circuit chips. The variable frame length data converter reduces the amount of data required to synthesizer human speech at a given quality level. Preferably, a full frame of data includes, a pitch parameter, an energy parameter, a repeat bit and a plurality of speech coefficients. Each parameter or coefficient has a preselected length, but each frame has a variable number of parameters or coefficients associated therewith. The parameters and coefficients are encoded and a particular code of the pitch parameter indicates that the speech is to be unvoiced. An unvoiced frame includes fewer coefficients that a voiced frame and the converter detects this particular pitch parameter and automatically sets the unsent coefficients to zero. The converter also detects the state of the repeat bit for controlling the synthesizing to use the coefficients received during the previous frame as the coefficient to be used to generate speech in response to the present frame. In this embodiment, when the repeat bit comes up, new pitch and energy parameters are inputted therewith. Further, the converters preferably detects particular codes in the energy parameter for determining when a pause occurs or when the last frame of data has been sent.
摘要翻译：语音合成电路设置有可变帧长数据转换器，语音合成器最好集成在集成电路芯片上。可变帧长数据转换器减少在给定质量水平下合成人类语音所需的数据量。优选地，全帧数据包括音调参数，能量参数，重复位和多个语音系数。每个参数或系数具有预选长度，但是每个帧具有可变数目的参数或与其相关联的系数。参数和系数被编码，并且音调参数的特定代码指示语音将被清音。无声帧包括更少的系数，有声帧和转换器检测该特定音调参数并且将未发送的系数自动设置为零。转换器还检测用于控制合成的重复位的状态，以使用在前一帧期间接收到的系数作为响应于当前帧而用于生成语音的系数。在本实施例中，当重复位出现时，输入新的节距和能量参数。此外，转换器优选地检测能量参数中的特定代码，以确定何时发生暂停或何时发送最后一帧数据。

3. 发明授权

US4970659A Learning aid or game having miniature electronic speech synthesis chip 失效
标题翻译：学习辅助或游戏具有微型电子语音合成芯片
公开(公告)号：US4970659A
公开(公告)日：1990-11-13
申请号：US214787
申请日：1988-07-01
申请人： Paul S. Breedlove , James H. Moore , George L. Brantingham , Richard H. Wiggins, Jr.
发明人： Paul S. Breedlove , James H. Moore , George L. Brantingham , Richard H. Wiggins, Jr.
IPC分类号： G09B7/04 , G10L13/04 , G10L19/00
CPC分类号： G10L19/00 , G09B7/04 , G10L13/047
摘要： An electronic hand-held, talking learning aid is disclosed. The learning aid includes a MOS speech synthesizer chip having an active surface area on the order of 45,000 square mils. The disclosed speech synthesizer chip includes a digital lattice filter, a voiced/unvoiced excitation circuit, a speech parameter interpolator, an input parameter decoder, a digital-to-analog converter and associated timing circuits. The learning aid is also provided with a microprocessor which functions as a controller for controlling the operation of the unit. A small speaker is driven by the digital-to-analog converter on the speech synthesis chip and a keyboard and display device are strobed by the microprocessor controller. Features include modes in which a speech synthesizer recites instructions or questions to the operator who must properly respond.
摘要翻译：公开了一种电子手持通话学习辅助。学习辅助功能包括MOS语音合成器芯片，其具有约45,000平方密度的有效表面积。所公开的语音合成器芯片包括数字网格滤波器，有声/无声激励电路，语音参数内插器，输入参数解码器，数模转换器和相关定时电路。学习辅助装置还具有用作控制单元的操作的控制器的微处理器。小型扬声器由语音合成芯片上的数模转换器驱动，键盘和显示设备由微处理器控制器选通。功能包括语音合成器向必须正确响应的操作员背诵说明或问题的模式。

4. 发明授权

US4344148A System using digital filter for waveform or speech synthesis 失效
标题翻译：系统使用数字滤波器进行波形或语音合成
公开(公告)号：US4344148A
公开(公告)日：1982-08-10
申请号：US124174
申请日：1980-02-25
申请人： George L. Brantingham , Richard H. Wiggins, Jr.
发明人： George L. Brantingham , Richard H. Wiggins, Jr.
IPC分类号： G06F17/10 , G10L13/04 , G10L19/06 , H03H17/02 , H03H17/04 , G06F15/34 , G10L1/00
CPC分类号： H03H17/0285 , G10L13/047 , H03H17/04 , G10L19/06
摘要： A system using a digital filter for generating complex waveforms, such as human speech. The filter has a multiplier, an adder coupled to the output of the multiplier and various delay circuits coupled to the output of the adder. A latch memory is coupled to the output of one of the delay circuits. Switching circuits are provided for the output of the delay and the latch memory to inputs of the multiplier and the adder to selected times. Coefficients of the filter are preferably stored in a memory coupled to another input of the multiplier. The excitation signal is coupled to the adder in one embodiment and to the multiplier in another embodiment.
摘要翻译：一种使用数字滤波器产生复杂波形的系统，如人类语音。滤波器具有乘法器，耦合到乘法器的输出的加法器和耦合到加法器的输出的各种延迟电路。锁存存储器耦合到延迟电路之一的输出端。提供开关电路用于将延迟和锁存存储器输出到乘法器和加法器的选择时间的输入。滤波器的系数优选地存储在耦合到乘法器的另一个输入的存储器中。激励信号在一个实施例中耦合到加法器，在另一个实施例中耦合到乘法器。

5. 发明授权

US4331836A Speech synthesis integrated circuit device 失效
标题翻译：语音合成集成电路设备
公开(公告)号：US4331836A
公开(公告)日：1982-05-25
申请号：US95180
申请日：1979-11-16
申请人： Richard H. Wiggins, Jr. , George L. Brantingham
发明人： Richard H. Wiggins, Jr. , George L. Brantingham
IPC分类号： G09B7/04 , G10L13/04 , G10L19/00 , H03H17/04 , G10L1/00
CPC分类号： H03H17/04 , G09B7/04 , G10L13/047 , G10L19/00
摘要： A system incorporating an integrated circuit device or chip which digitally synthesizes human speech using a linear predictive filter. The linear predictive filter comprises a single filter stage only which contains a single multiplier for selectively multiplying a plurality of coefficients, initiating the multiplication of one coefficient at a time, by using a feedback loop with multiplexing techniques so as to input multiplexed signals to the multiplier--as contrasted to a cascade of filter stages. Thus, the single multiplier of the linear predictive filter is utilized repetitively to provide the calculations required. The system also includes a memory for storage of digital filter coefficients, a controller for selectively accessing the coefficients, and a speaker for generating audible sounds.
摘要翻译：一种结合使用线性预测滤波器数字地合成人类语音的集成电路装置或芯片的系统。线性预测滤波器仅包括单个滤波器级，其包含用于选择性地乘以多个系数的单个乘法器，通过使用具有复用技术的反馈回路来启动一次系数的乘法，以便将多路复用信号输入到乘法器 - 与级联的滤波器级相反。因此，线性预测滤波器的单个乘法器被重复使用以提供所需的计算。该系统还包括用于存储数字滤波器系数的存储器，用于选择性地访问系数的控制器和用于产生可听见的声音的扬声器。

6. 发明授权

US4304964A Variable frame length data converter for a speech synthesis circuit 失效
标题翻译：用于语音合成电路的可变帧长数据转换器
公开(公告)号：US4304964A
公开(公告)日：1981-12-08
申请号：US901392
申请日：1978-04-28
申请人： Richard H. Wiggins, Jr. , George L. Brantingham
发明人： Richard H. Wiggins, Jr. , George L. Brantingham
IPC分类号： G09B5/04 , A63F9/18 , G09B5/06 , G09B7/02 , G09B7/04 , G10L11/00 , G10L13/00 , G10L13/08 , G10L19/00 , G10L19/04 , G10L19/06 , H01L21/822 , H01L27/04 , G10L1/00
CPC分类号： G10L19/00 , G09B7/04 , G10L13/08
摘要： A speech synthesis circuit is provided with a variable frame length data converter and the speech synthesizer is preferably integrated on an integrated circuit chips. The variable frame length data converter reduces the amount of data required to synthesizer human speech at a given quality level. Preferably, a full frame of data includes, a pitch parameter, an energy parameter, a repeat bit and a plurality of speech coefficients. Each parameter or coefficient has a preselected length, but each frame has a variable number of parameters or coefficients associated therewith. The parameters and coefficients are encoded and a particular code of the pitch parameter indicates that the speech is to be unvoiced. An unvoiced frame includes fewer coefficients that a voiced frame and the converter detects this particular pitch parameter and automatically sets the unsent coefficients to zero. The converter also detects the state of the repeat bit for controlling the synthesizing to use the coefficients received during the previous frame as the coefficient to be used to generate speech in response to the present frame. In this embodiment, when the repeat bit comes up, new pitch and energy parameters are inputted therewith. Further, the converters preferably detects particular codes in the energy parameter for determining when a pause occurs or when the last frame of data has been sent.
摘要翻译：语音合成电路设置有可变帧长数据转换器，语音合成器最好集成在集成电路芯片上。可变帧长数据转换器减少在给定质量水平下合成人类语音所需的数据量。优选地，全帧数据包括音调参数，能量参数，重复位和多个语音系数。每个参数或系数具有预选长度，但是每个帧具有可变数目的参数或与其相关联的系数。参数和系数被编码，并且音调参数的特定代码指示语音将被清音。无声帧包括更少的系数，有声帧和转换器检测该特定音调参数并且将未发送的系数自动设置为零。转换器还检测用于控制合成的重复位的状态，以使用在前一帧期间接收到的系数作为响应于当前帧而用于生成语音的系数。在本实施例中，当重复位出现时，输入新的节距和能量参数。此外，转换器优选地检测能量参数中的特定代码，以确定何时发生暂停或何时发送最后一帧数据。

7. 发明授权

US4234761A Method of communicating digital speech data and a memory for storing such data 失效
标题翻译：传送数字语音数据的方法和存储这种数据的存储器
公开(公告)号：US4234761A
公开(公告)日：1980-11-18
申请号：US916989
申请日：1978-06-19
申请人： Richard H. Wiggins, Jr. , George L. Brantingham
发明人： Richard H. Wiggins, Jr. , George L. Brantingham
IPC分类号： H03M7/42 , H04B1/66 , G11C13/00 , G10L1/08
CPC分类号： H04B1/66 , H03M7/42
摘要： A method of communicating Digital Speech Data to a speech synthesis circuit. The data is compressed to on the order of 1000-1200 bits, per second for normal human speech. The speech synthesis circuit utilizes linear predictive coding techniques for producing high quality speech or other sounds.The data is preferably stored in a memory which is coupled to the speech synthesis circuit. The data has variable frame lengths; in the disclosed embodiment, four different frame lengths are described having frame lengths from four bits to forty-nine bits. The memory stores the variable frame length data and communicates the same to the speech synthesis circuit in response to certain control signals.
摘要翻译：一种将数字语音数据传送到语音合成电路的方法。对于正常的人类语音，数据被压缩到每秒1000-1200位。语音合成电路利用线性预测编码技术来产生高质量的语音或其他声音。数据优选地存储在耦合到语音合成电路的存储器中。数据具有可变的帧长度; 在所公开的实施例中，描述了具有从四位到四十九位的帧长度的四种不同的帧长度。存储器存储可变帧长度数据，并响应于某些控制信号将其传送到语音合成电路。

8. 发明授权

US4209844A Lattice filter for waveform or speech synthesis circuits using digital logic 失效
标题翻译：用于使用数字逻辑的波形或语音合成电路的晶格滤波器
公开(公告)号：US4209844A
公开(公告)日：1980-06-24
申请号：US905328
申请日：1978-05-12
申请人： George L. Brantingham , Richard H. Wiggins, Jr.
发明人： George L. Brantingham , Richard H. Wiggins, Jr.
IPC分类号： G06F17/10 , G10L13/04 , G10L19/06 , H03H17/02 , H03H17/04 , G06F15/34 , G10L1/00
CPC分类号： G10L13/047 , H03H17/0285 , H03H17/04 , G10L19/06
摘要： A digital filter of the type which may be used in circuits for generating complex waveforms, such as human speech. The filter has a multiplier, an adder coupled to the output of the multiplier and various delay circuits coupled to the output of the adder. A latch memory is coupled to the output of one of the delay circuits. Switching circuits are provided for the output of the delay and the latch memory to inputs of the multiplier and the adder to selected times. Coefficients of the filter are preferably stored in a memory coupled to another input of the multiplier. The excitation signal is coupled to the adder in one embodiment and to the multiplier in another embodiment. In either embodiment, the digital filter may be implemented on a single integrated circuit chip.
摘要翻译：一种可用于产生复杂波形的电路中的类型的数字滤波器，例如人类语音。滤波器具有乘法器，耦合到乘法器的输出的加法器和耦合到加法器的输出的各种延迟电路。锁存存储器耦合到延迟电路之一的输出端。提供开关电路用于将延迟和锁存存储器输出到乘法器和加法器的选择时间的输入。滤波器的系数优选地存储在耦合到乘法器的另一个输入的存储器中。激励信号在一个实施例中耦合到加法器，在另一个实施例中耦合到乘法器。在任一实施例中，数字滤波器可以在单个集成电路芯片上实现。

9. 发明授权

US4209836A Speech synthesis integrated circuit device 失效
标题翻译：语音合成集成电路设备
公开(公告)号：US4209836A
公开(公告)日：1980-06-24
申请号：US901393
申请日：1978-04-28
申请人： Richard H. Wiggins, Jr. , George L. Brantingham
发明人： Richard H. Wiggins, Jr. , George L. Brantingham
IPC分类号： G09B7/04 , G10L13/04 , G10L19/00 , H03H17/04 , G06F15/34 , G01L1/08
CPC分类号： H03H17/04 , G09B7/04 , G10L13/047 , G10L19/00
摘要： Disclosed is an integrated circuit device or chip which digitally synthesizes human speech using a linear predictive filter. This device may be implemented using conventional processing techniques. For instance, when implemented in conventional P-channel MOS technology, the disclosed device or chip has an active area of approximately 45,000 square mils.
摘要翻译：公开了使用线性预测滤波器数字地合成人类语音的集成电路装置或芯片。该装置可以使用常规处理技术来实现。例如，当在常规P沟道MOS技术中实现时，所公开的器件或芯片的有效面积约为45,000平方密耳。

10. 发明授权

US5083113A Inductive coupled object identification system and method 失效
标题翻译：电感耦合对象识别系统及方法
公开(公告)号：US5083113A
公开(公告)日：1992-01-21
申请号：US472699
申请日：1990-01-31
申请人： Christopher Slawinski , Richard A. Houghton , George L. Brantingham
发明人： Christopher Slawinski , Richard A. Houghton , George L. Brantingham
IPC分类号： G06K7/08
CPC分类号： G06K7/086
摘要： An inductive coupled object identification system (FIGS. 2a and 2b) uses inductive coupling to detect and identify objects. Each object includes an object resonance circuit (LT/CT) with a unique object resonance frequency. Base electronics (50) includes an inductive-coupling base coil (L1) coupled to an oscillator circuit (60). To detect an object, the oscillator circuit continually sends START pulses to the base coil. When an object is proximate to the base coil, a START pulse is inductively coupled to the object resonance circuit, causing it to resonate at the object resonance frequency. This resonance condition is detected by the oscillator circuit, which outputs an oscillation signal FREQ at the object resonance frequency. Frequency counting logic (70) is used to determine the object resonance frequency, allowing a microcomputer (80) to identify the object. Two embodiments of the object identification system are described: a dynamic embodiment (FIGS. 1a and 1b) in which ball-shaped objects (10) are dropped into a bowl (13) through a single base coil (L1) in the rim of the bowl, and a static embodiment (FIGS. 1c and 1d) in which ring-shaped objects (20) are placed over a post (23) incorporating multiple base coils (L1-L5). For the static embodiment, the multiple base coils are multiplexed by a base coil selector circuit (FIG. 2b, 100).

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