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1. 发明授权

US07507608B2 IGBT with amorphous silicon transparent collector 有权
标题翻译： IGBT与非晶硅透明集电极
公开(公告)号：US07507608B2
公开(公告)日：2009-03-24
申请号：US11297571
申请日：2005-12-08
申请人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
发明人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
IPC分类号： H01L21/332
CPC分类号： H01L29/66333 , H01L29/0834 , H01L29/7395
摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.
摘要翻译：形成在浮动区硅晶片中的非穿通IGBT的集电极或阳极由沉积在超薄晶片的背表面上的P掺杂非晶硅层形成。在形成底部结构之前，在晶片的顶表面上形成DMOS结构。在非晶硅层上形成背接触。不需要合金步骤来激活由P型非晶硅限定的阳极。

2. 发明授权

US07005702B1 IGBT with amorphous silicon transparent collector 有权
公开(公告)号：US07005702B1
公开(公告)日：2006-02-28
申请号：US09566219
申请日：2000-05-05
申请人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
发明人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66333 , H01L29/0834 , H01L29/7395
摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

3. 发明申请

US20060094179A1 IGBT with amorphous silicon transparent collector 有权
公开(公告)号：US20060094179A1
公开(公告)日：2006-05-04
申请号：US11297571
申请日：2005-12-08
申请人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
发明人： Richard Francis , Chiu Ng , Hamilton Lu , Ranadeep Dutta
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L29/66333 , H01L29/0834 , H01L29/7395
摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

4. 发明授权

US06627961B1 Hybrid IGBT and MOSFET for zero current at zero voltage 有权
标题翻译：用于零电压零电流的混合IGBT和MOSFET
公开(公告)号：US06627961B1
公开(公告)日：2003-09-30
申请号：US09565151
申请日：2000-05-05
申请人： Richard Francis , Ranadeep Dutta , Chiu Ng , Peter Wood
发明人： Richard Francis , Ranadeep Dutta , Chiu Ng , Peter Wood
IPC分类号： H01L2972
CPC分类号： H01L29/7395
摘要： A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television tube deflection coil. The device is formed by a copacked discrete IGBT die and power MOSFET die in which the ratio of the MOSFET die area is preferably about 25% that of the IGBT. Alternatively, the IGBT and MOSFET can be integrated into the same die, with the IGBT and MOSFET elements alternating laterally with one another and overlying respective P+ injection regions and N+ contact regions respectively on the bottom of the die. The MOSFET and IGBT elements are preferably spaced apart by a distance of about 1 minority carrier length (50-100 microns for a 1500 volt device).
摘要翻译：高压MOS电容半导体器件具有大致线性的MOSFET型正向电流与低电压时的正向电压特性以及IGBT的高电流，低正向下降能力。该装置特别适用于电视机管偏转线圈的控制晶体管。该器件由共模封装的分立IGBT管芯和功率MOSFET管芯形成，其中MOSFET管芯面积的比率优选为IGBT的约25％。或者，IGBT和MOSFET可以集成到相同的管芯中，其中IGBT和MOSFET元件彼此横向交替并且分别叠置在管芯底部上的相应的P +注入区域和N +接触区域。 MOSFET和IGBT元件优选地间隔开约1个少数载流子长度（对于1500伏装置为50-100微米）的距离。

5. 发明申请

US20070096167A1 Trench IGBT with depletion stop layer 有权
标题翻译：具有耗尽阻挡层的沟槽IGBT
公开(公告)号：US20070096167A1
公开(公告)日：2007-05-03
申请号：US11265489
申请日：2005-11-02
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L29/80 , H01L31/112
CPC分类号： H01L29/0834 , H01L29/456 , H01L29/66348 , H01L29/7397
摘要： A very low VCEON non punch through trench IGBT built-in non-epitaxial float zone silicon has a depletion stop layer structure added to its bottom surface.
摘要翻译：一个非常低的非穿孔式IGBT内置的非外延浮区硅具有向其底表面添加的耗尽阻挡层结构。

6. 发明授权

US06242288B1 Anneal-free process for forming weak collector 有权
标题翻译：用于形成弱收集器的无退火工艺
公开(公告)号：US06242288B1
公开(公告)日：2001-06-05
申请号：US09565928
申请日：2000-05-05
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L21332
CPC分类号： H01L29/66333 , H01L21/26513 , H01L21/324
摘要： The collector (anode) of a non punch through IGBT formed in a float zone silicon monocrystaline wafer is formed with a DMOS top structure and is thereafter ground at its bottom surface to a less than 250 micron thickness. A shallow P type implant is then made in the bottom surface and the wafer is then heated in vacuum to about 400° C. for about 30 to 60 seconds to remove moisture and other contaminants from the bottom surface. An aluminum layer is then sputtered on the bottom surface, followed by other metals to form the bottom electrode. No activation anneal is necessary to activate the weak collector junction.
摘要翻译：形成在浮动区硅单晶晶片中的非穿通IGBT的集电极（阳极）形成有DMOS顶部结构，然后在其底表面处研磨至小于250微米厚度。然后在底表面中制造浅P型植入物，然后将晶片在真空中加热至约400℃约30至60秒，以从底部表面除去水分和其它污染物。然后将铝层溅射在底表面上，随后溅射其它金属以形成底部电极。不需要激活退火来激活弱集电极结。

7. 发明授权

US07956419B2 Trench IGBT with depletion stop layer 有权
标题翻译：具有耗尽阻挡层的沟槽IGBT
公开(公告)号：US07956419B2
公开(公告)日：2011-06-07
申请号：US11265489
申请日：2005-11-02
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L23/62
CPC分类号： H01L29/0834 , H01L29/456 , H01L29/66348 , H01L29/7397
摘要： A very low VCEON non punch through trench IGBT built-in non-epitaxial float zone silicon has a depletion stop layer structure added to its bottom surface.
摘要翻译：非常低的VCEON非穿通沟槽IGBT内置非外延浮区硅在其底表面上添加有耗尽阻挡层结构。

8. 发明授权

US07485920B2 Process to create buried heavy metal at selected depth 有权
标题翻译：在选定深度创建埋藏重金属的过程
公开(公告)号：US07485920B2
公开(公告)日：2009-02-03
申请号：US10288696
申请日：2002-11-04
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L29/02
CPC分类号： H01L29/66136 , H01L21/221 , H01L21/263 , H01L21/26506 , H01L29/167 , H01L29/32 , H01L29/66333
摘要： Semiconductor devices having recombination centers comprised of well-positioned heavy metals. At least one lattice defect region within the semiconductor device is first created using particle beam implantation. Use of particle beam implantation positions the lattice defect region(s) with high accuracy in the semiconductor device. A heavy metal implantation treatment of the device is applied. The lattice defects created by the particle beam implantation act as gettering sites for the heavy metal implantation. Thus, after the creation of lattice defects and heavy metal diffusion, the heavy metal atoms are concentrated in the well-positioned lattice defect region(s).
摘要翻译：具有复合中心的半导体器件由良好定位的重金属构成。首先使用粒子束注入产生半导体器件内的至少一个晶格缺陷区域。使用粒子束注入在半导体器件中高精度地定位晶格缺陷区域。应用该装置的重金属植入处理。通过粒子束注入产生的晶格缺陷作为重金属注入的吸杂位置。因此，在形成晶格缺陷和重金属扩散之后，重金属原子集中在良好定位的晶格缺陷区域中。

9. 发明授权

US06707111B2 Hydrogen implant for buffer zone of punch-through non EPI IGBT 有权
标题翻译：用于穿通非EPI IGBT缓冲区的氢注入
公开(公告)号：US06707111B2
公开(公告)日：2004-03-16
申请号：US10217988
申请日：2002-08-13
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L2362
CPC分类号： H01L29/456 , H01L21/26506 , H01L21/28512 , H01L29/1095 , H01L29/32 , H01L29/66333 , H01L29/7395 , H01L2924/0002 , H01L2924/00
摘要： An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N+ buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N+ contact region in silicon to permit a good ohmic contact to the silicon for any type device.
摘要翻译：使用氢气注入在薄的（小于250微米厚）的浮动区硅晶片中形成IGBT，以在晶片的底部形成N +缓冲层。在晶片的底部形成弱阳极。可以使用单个氢植入物或逐渐变浅的深度和增加剂量的多个氢植入物在扩散的浮动区晶片中形成植入物。该工艺也可以用于在硅中形成N +接触区域，以允许任何类型的器件对硅进行良好的欧姆接触。

10. 发明授权

US06603153B2 Fast recovery diode and method for its manufacture 有权
公开(公告)号：US06603153B2
公开(公告)日：2003-08-05
申请号：US09862017
申请日：2001-05-21
申请人： Richard Francis , Chiu Ng
发明人： Richard Francis , Chiu Ng
IPC分类号： H01L29861
CPC分类号： H01L29/66136 , H01L29/0619 , H01L29/32 , H01L29/872 , Y10S257/91
摘要： A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.

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