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1. 发明申请

US20060010276A1 Isolation of input/output adapter direct memory access addressing domains 审中-公开
标题翻译：输入/输出适配器的隔离直接存储器访问寻址域
公开(公告)号：US20060010276A1
公开(公告)日：2006-01-12
申请号：US10887522
申请日：2004-07-08
申请人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
发明人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
IPC分类号： G06F13/14
CPC分类号： G06F13/4027 , G06F13/28
摘要： Method, apparatus and system for isolating input/output adapter Direct Memory Access addressing domains in a data processing system. The data processing system includes a plurality of input/output adapters, and access to a memory of the data processing system by the plurality of input/output adapters is controlled by functionality in a host bridge that connects the plurality of input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
摘要翻译：在数据处理系统中隔离输入/输出适配器直接存储器访问寻址域的方法，装置和系统。数据处理系统包括多个输入/输出适配器，并且通过多个输入/输出适配器对数据处理系统的存储器的访问由将多个输入/输出适配器连接到主机的主机桥中的功能来控制数据处理系统的系统总线，从而允许在主桥外部使用低成本，行业标准交换机和桥接器。

2. 发明申请

US20060010277A1 Isolation of input/output adapter interrupt domains 审中-公开
标题翻译：输入/输出适配器中断域的隔离
公开(公告)号：US20060010277A1
公开(公告)日：2006-01-12
申请号：US10887525
申请日：2004-07-08
申请人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
发明人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
IPC分类号： G06F13/24 , G06F13/14
CPC分类号： G06F13/24 , G06F13/32
摘要： Method, apparatus and system for isolating input/output adapter interrupt domains in a data processing system. The data processing system includes a plurality of input/output adapters, and isolation of interrupt resources available to the input/output adapters is controlled by functionality in a host bridge that connects the plurality of input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
摘要翻译：用于在数据处理系统中隔离输入/输出适配器中断域的方法，装置和系统。数据处理系统包括多个输入/输出适配器，并且输入/输出适配器可用的中断资源的隔离由主机桥中的功能控制，主桥将多个输入/输出适配器连接到数据处理的系统总线系统，从而允许在主桥外部使用低成本，行业标准交换机和桥接器。

3. 发明申请

US20060026327A1 Isolation of input/output adapter traffic class/virtual channel and input/output ordering domains 失效
标题翻译：输入/输出适配器流量类/虚拟通道和输入/输出排序域的隔离
公开(公告)号：US20060026327A1
公开(公告)日：2006-02-02
申请号：US10902611
申请日：2004-07-29
申请人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
发明人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
IPC分类号： G06F13/36
CPC分类号： G06F13/126
摘要： Method, apparatus and system for controlling input/output adapter data flow operations in a data processing system that includes at least one of a traffic class mechanism in conjunction with virtual channel resources so as to be able to associate Load/Store and DMA flows to/from an input/output adapter, and a relaxed ordering mechanism for associating a relaxed ordering bit to Load/Store operations to an input/output adapter. Functionality for controlling the input/output adapter data flow is provided in a host bridge that connects the input/output adapter to a system bus of the data processing system.
摘要翻译：用于控制数据处理系统中的输入/输出适配器数据流操作的方法，装置和系统，该数据处理系统包括结合虚拟信道资源的业务类机制中的至少一个，以便能够将加载/存储和DMA流关联到/ 以及用于将放松的排序位与加载/存储操作相关联的输入/输出适配器的放松排序机制。用于控制输入/输出适配器数据流的功能在将输入/输出适配器连接到数据处理系统的系统总线的主机桥中提供。

4. 发明申请

US20060010355A1 Isolation of input/output adapter error domains 有权
标题翻译：输入/输出适配器错误域的隔离
公开(公告)号：US20060010355A1
公开(公告)日：2006-01-12
申请号：US10887524
申请日：2004-07-08
申请人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
发明人： Richard Arndt , Patrick Buckland , Gregory Nordstrom , Steven Thurber
IPC分类号： G06F11/00
CPC分类号： G06F11/2736
摘要： Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
摘要翻译：用于在数据处理系统中隔离输入/输出适配器错误域的方法，装置和系统。在一个输入/输出适配器中发生的错误与数据处理系统的其他输入/输出适配器隔离，主机桥中的功能将输入/输出适配器连接到数据处理系统的系统总线，从而允许使用低成本，行业标准交换机和主桥外部的桥梁。

5. 发明申请

US20070260768A1 STALLING OF DMA OPERATIONS IN ORDER TO DO MEMORY MIGRATION USING A MIGRATION IN PROGRESS BIT IN THE TRANSLATION CONTROL ENTRY MECHANISM 有权
标题翻译：在翻译控制输入机制中使用进位转移进行存储器迁移的DMA操作的存储
公开(公告)号：US20070260768A1
公开(公告)日：2007-11-08
申请号：US11279906
申请日：2006-04-17
申请人： Carl Bender , Patrick Buckland , Steven Thurber , Adalberto Yanes
发明人： Carl Bender , Patrick Buckland , Steven Thurber , Adalberto Yanes
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F12/1081
摘要： A mechanism for temporarily stalling selected Direct Memory Access (DMA) operations in a physical I/O adapter in order to permit migration of data between physical pages that are subject to access by the physical I/O adapter. When a request for a DMA to a physical page in system memory is received from an input/output adapter, a migration in progress (MIP) bit in a translation control entry (TCE) pointing to the physical page is examined, wherein the MIP bit indicates whether migration of the physical page referenced in the TCE to another location in system memory is currently in progress. If the MIP bit indicates a migration of the physical page is in progress, the DMA from the input/output adapter is temporarily stalled while other DMA operations from other input/output adapters to other physical pages in system memory are allowed to continue.
摘要翻译：暂时停止物理I / O适配器中选定的直接内存访问（DMA）操作的机制，以便允许在物理I / O适配器访问的物理页之间迁移数据。当从输入/输出适配器接收到对系统存储器中的物理页面的DMA的请求时，检查指向物理页面的翻译控制条目（TCE）中正在进行的迁移（MIP）位，其中MIP位指示TCE中引用的物理页面迁移到系统内存中的另一个位置是否正在进行中。如果MIP位指示物理页面的迁移正在进行，则来自输入/输出适配器的DMA将暂时停止，而允许从其他输入/输出适配器到系统内存中其他物理页面的其他DMA操作继续。

6. 发明申请

US20060281630A1 AUTONOMIC RECOVERY FROM HARDWARE ERRORS IN AN INPUT/OUTPUT FABRIC 有权
标题翻译：自动恢复输入/输出织物中的硬件错误
公开(公告)号：US20060281630A1
公开(公告)日：2006-12-14
申请号：US11466290
申请日：2006-08-22
申请人： David Bailey , Trung Nguyen , Gregory Nordstrom , Kanisha Patel , Steven Thurber
发明人： David Bailey , Trung Nguyen , Gregory Nordstrom , Kanisha Patel , Steven Thurber
IPC分类号： B01J27/24
CPC分类号： G06F11/0793 , G06F11/0712 , G06F11/0745
摘要： An apparatus, program product and method propagate errors detected in an IO fabric element from an IO fabric that is used to couple a plurality of endpoint IO resources to processing elements in a computer. In particular, such errors are propagated to the endpoint IO resources affected by the IO fabric element in connection with recovering from the errors in the IO fabric element. By doing so, a device driver or other program code used to access each affected IO resources may be permitted to asynchronously recover from the propagated error in its associated IO resource, and often without requiring the recovery from the error in the IO fabric element to wait for recovery to be completed for each of the affected IO resources. In addition, an IO fabric may be dynamically configured to support both recoverable and non-recoverable endpoint IO resources. In particular, IO fabric elements within an IO fabric may be dynamically configured to enable machine check signaling in such IO fabric elements in response to detection that an endpoint IO resource is non-recoverable in nature. The IO fabric elements that are dynamically configured as such are disposed within a hardware path that is defined between the non-recoverable resource and a processor that accesses the non-recoverable resource.
摘要翻译：装置，程序产品和方法将用于将多个端点IO资源耦合到计算机中的处理元件的IO架构在IO结构元素中检测到的错误传播。特别地，这些错误被传播到由IO结构元素影响的端点IO资源以及从IO结构元素中的错误的恢复。通过这样做，可以允许用于访问每个受影响的IO资源的设备驱动程序或其他程序代码从其关联的IO资源中的传播错误异步恢复，并且通常不需要从IO架构元素中的错误中恢复以等待以便为每个受影响的IO资源完成恢复。此外，IO结构可以动态配置为支持可恢复和不可恢复的端点IO资源。特别地，IO结构中的IO结构元素可以被动态地配置成使得在这种IO结构元素中的机器检查信令能够响应于端点IO资源在本质上是不可恢复的检测。被动态地配置的IO结构元素被布置在在不可恢复资源和访问不可恢复资源的处理器之间定义的硬件路径中。

7. 发明申请

US20050182788A1 Architecture and method for managing the sharing of logical resources among separate partitions of a logically partitioned computer system 失效
标题翻译：用于管理逻辑分区计算机系统的单独分区之间的逻辑资源共享的架构和方法
公开(公告)号：US20050182788A1
公开(公告)日：2005-08-18
申请号：US10777724
申请日：2004-02-12
申请人： Richard Arndt , Bruce Mealey , Steven Thurber
发明人： Richard Arndt , Bruce Mealey , Steven Thurber
IPC分类号： G06F9/455 , G06F9/46 , G06F9/50 , G06F17/00
CPC分类号： G06F9/45533 , G06F9/45541 , G06F9/5077
摘要： A mechanism is provided for sharing resources among logical partitions in a logical partitioned data processing system and for managing the changes to resources in such a way that the sharing operating systems are able to handle the various transitions in a graceful manner. Four hypervisor functions plus a specific return code manage the granting of access of resources owned by one partition to another (client) partition, accepting of granted resources by client partitions, returning of granted resources by client partitions, and rescinding of access by the owning partition. These four hypervisor functions are invoked either explicitly by the owning and client partitions or automatically by the hypervisor in response to partition termination. The hypervisor functions provide the needed infrastructure to manage the sharing of logical resources among partitions.
摘要翻译：提供了一种机制，用于在逻辑分区数据处理系统中的逻辑分区之间共享资源，并且以这样的方式管理对资源的改变，使得共享操作系统能够以优雅的方式处理各种转换。四个管理程序功能加上特定的返回代码管理一个分区所拥有的资源到另一个（客户端）分区的授权，客户端分区接受授予的资源，客户机分区返回授权资源，以及由所拥有的分区撤销访问。这四个虚拟机管理程序功能由拥有和客户机分区明确地调用，或者由管理程序自动地响应于分区终止而调用。管理程序功能提供所需的基础设施来管理分区之间逻辑资源的共享。

8. 发明申请

US20070260769A1 Computer-implemented method, apparatus, and computer program product for managing DMA write page faults using a pool of substitute pages 有权
标题翻译：计算机实现的方法，设备和计算机程序产品，用于使用替代页面池管理DMA写页错误
公开(公告)号：US20070260769A1
公开(公告)日：2007-11-08
申请号：US11390790
申请日：2006-03-28
申请人： Richard Arndt , Steven Thurber
发明人： Richard Arndt , Steven Thurber
IPC分类号： G06F13/28
CPC分类号： G06F11/141 , G06F12/08 , G06F12/1081
摘要： A computer-implemented method, apparatus, and computer program product are disclosed for managing DMA write page faults using a pool of substitute pages. The computer system's platform resolves a DMA write page fault for a page that is dedicated to an I/O adapter. The I/O adapter attempts to write DMA data to the page. A determination is made that the page is unavailable for writing. The DMA data is then written to data locations in a substitute page that was selected from the pool of substitute pages. A flag is then set in a flag location for each one of the data locations. The flag locations correspond to the data locations. When a flag is set, the flag indicates that DMA write data is present in the data location that corresponds to that flag's flag location.
摘要翻译：公开了一种计算机实现的方法，装置和计算机程序产品，用于使用替代页面池来管理DMA写页错误。计算机系统的平台解决了专用于I / O适配器的页面的DMA写入页错误。 I / O适配器尝试将DMA数据写入页面。确定页面无法写入。然后将DMA数据写入从替代页面池中选择的替代页面中的数据位置。然后将标志设置在每个数据位置的标志位置。标志位置对应于数据位置。当标志置位时，标志表示DMA数据存在于该标志位置对应的数据位置。

9. 发明申请

US20050055470A1 DMA windowing in an LPAR environment using device arbitration level to allow multiple IOAs per terminal bridge 有权
标题翻译：使用设备仲裁级别在LPAR环境中DMA窗口，以允许每个终端桥接多个IOA
公开(公告)号：US20050055470A1
公开(公告)日：2005-03-10
申请号：US10953920
申请日：2004-09-29
申请人： Richard Arndt , Danny Neal , Steven Thurber
发明人： Richard Arndt , Danny Neal , Steven Thurber
IPC分类号： G06F13/28 , G06F3/00
CPC分类号： G06F13/28
摘要： A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus. The terminal bridge can examine the grant signals from the arbiter to the IOAs, to determine which set of range registers is to be used.
摘要翻译：用于防止在逻辑分区的数据处理系统中由操作系统（OS）映像使用的输入/输出（I / O）适配器的方法，系统和装置从分配给另一个OS映像的存储器位置获取或破坏数据在数据处理系统内提供。虚拟机管理程序防止在直接存储器访问（DMA）操作期间通过分配每个输入/输出适配器一个I / O范围的逻辑分区之一和分配给其他逻辑分区的存储器位置之间的输入/输出适配器之间的数据传输总线DMA地址。 I / O适配器（IOA）通过终端桥连接到PCI主机桥。单个终端桥可以支持多个IOA，在这种情况下，每个终端桥具有多组范围寄存器，每个范围寄存器与其所连接的IOA中的相应一个相关联。提供了一个仲裁器，其选择一个输入/输出适配器来使用PCI总线。终端桥可以检查从仲裁器到IOA的授权信号，以确定要使用哪个范围寄存器组。

10. 发明申请

US20070165596A1 Creation and management of routing table for PCI bus address based routing with integrated DID 审中-公开
标题翻译：基于PCI总线地址的路由表的创建和管理，集成了DID
公开(公告)号：US20070165596A1
公开(公告)日：2007-07-19
申请号：US11334678
申请日：2006-01-18
申请人： William Boyd , Douglas Freimuth , William Holland , Steven Hunter , Renato Recio , Steven Thurber , Madeline Vega
发明人： William Boyd , Douglas Freimuth , William Holland , Steven Hunter , Renato Recio , Steven Thurber , Madeline Vega
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： G06F13/4022 , H04L45/00 , H04L45/54
摘要： A method is provided for creating and managing tables for routing packets through an environment that includes multiple hosts and shared PCI switches and adapters. A Destination Identification (DID) field in the PBA is appended to a transaction packet dispatched through the PCI switches, wherein a particular DID is associated with a particular host or system image, and thus identifies the physical or virtual end point of its packet. In one embodiment, packets are routed through PCI switches in a distributed computer system comprising multiple root nodes, wherein each root node includes one or more hosts. The embodiment includes the step of creating a table or like data structure in a specified one of the switches. When a particular host of one of the root nodes becomes connected to the specified switch, a PCI Configuration Master (PCM), residing in one of the root nodes, is operated to enter a destination identifier or DID into the table. The DID is then appended as an address component, to packets directed through the specified switch from the particular host to one of the adapters. The destination identifier is also used to determine that a PCI packet, routed through the specified switch from one of the adapters, is intended for the particular root node.
摘要翻译：提供了一种创建和管理表以通过包括多个主机和共享PCI交换机和适配器的环境路由数据包的方法。 PBA中的目的地标识（DID）字段附加到通过PCI交换机分派的事务分组，其中特定的DID与特定主机或系统映像相关联，并且因此标识其分组的物理或虚拟终点。在一个实施例中，分组通过包括多个根节点的分布式计算机系统中的PCI交换机路由，其中每个根节点包括一个或多个主机。该实施例包括在指定的一个开关中创建表或类似数据结构的步骤。当一个根节点的特定主机连接到指定的交换机时，驻留在其中一个根节点的PCI配置主机（PCM）被操作以在表中输入目的地标识符或DID。然后，将DID作为地址组件附加到通过指定的交换机从特定主机引导到其中一个适配器的数据包。目的地标识符还用于确定通过指定交换机从其中一个适配器路由的PCI数据包是针对特定根节点的。

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