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1. 发明授权

US06493821B1 Recovery from writeback stage event signal or micro-branch misprediction using instruction sequence number indexed state information table 失效
标题翻译：使用指令序列号索引状态信息表从回写阶段事件信号或微分支错误预测中恢复
公开(公告)号：US06493821B1
公开(公告)日：2002-12-10
申请号：US09094027
申请日：1998-06-09
申请人： Reynold V. D'Sa , Robert F. Krick , Rebecca E. Hebda , Alan B. Kyker
发明人： Reynold V. D'Sa , Robert F. Krick , Rebecca E. Hebda , Alan B. Kyker
IPC分类号： G06F938
CPC分类号： G06F9/30174 , G06F9/3863
摘要： A pipelined microprocessor is provided. The pipelined microprocessor includes a writeback stage which signals an event and sends a sequence number of an instruction which had the event. The event may be, for example, a fault, a trap or a branch misprediction. The pipelined microprocessor further includes a decode stage which stores recovering state information for respective instructions and is responsive to the writeback stage signaling the event by using the sequence number to access the stored information to retrieve recovery state information of the instruction which had the event. The recovery state information may include, for example, a pointer to a next linear instruction, a pointer to a branch target instruction, a branch prediction, or an instruction source. Event recovery micro-code determines a next instruction to execute using the recovery state information, the next instruction being executed after a machine recovery.
摘要翻译：提供流水线微处理器。流水线微处理器包括回写阶段，其向事件发信号并发送具有该事件的指令的序列号。事件可能是例如故障，陷阱或分支错误预测。流水线微处理器还包括解码级，其存储相应指令的恢复状态信息，并且响应于写回级，通过使用序列号来访问存储的信息以检索具有该事件的指令的恢复状态信息来发信号通知该事件。恢复状态信息可以包括例如指向下一个线性指令的指针，指向分支目标指令的指针，分支预测或指令源。事件恢复微码确定使用恢复状态信息执行的下一条指令，下一条指令在机器恢复后执行。

2. 发明授权

US07334115B1 Detection, recovery and prevention of bogus branches 失效
标题翻译：检测，恢复和预防假枝
公开(公告)号：US07334115B1
公开(公告)日：2008-02-19
申请号：US09608512
申请日：2000-06-30
申请人： Reynold V. D'Sa , Alan B. Kyker , Slade A. Morgan , Rebecca E. Hebda , Richard A. Weier , Robert F. Krick
发明人： Reynold V. D'Sa , Alan B. Kyker , Slade A. Morgan , Rebecca E. Hebda , Richard A. Weier , Robert F. Krick
IPC分类号： G06F9/30
CPC分类号： G06F9/3842 , G06F9/3017 , G06F9/3808 , G06F9/3861
摘要： The present invention provides for a method and apparatus for the detection and prevention of and recovery from bogus branch predictions in a microprocessor. Micro-ops, decoded from a macro instruction, are stored in a decoded micro-op cache. Branch prediction logic determines whether a branch is bogus or not. If the branch taken was determined to be bogus, the present invention causes the micro-ops which descend from the original bogus branch micro-op instruction to be flagged and subsequently moved to the back-end of the processor for retirement. Further, the branch prediction logic (the branch prediction logic storage buffer) is updated as to what the actual direction of the branch was. In this manner then, bogus branches are detected, recovered from and further prevented.
摘要翻译：本发明提供了一种用于检测和预防微处理器中的虚假分支预测和恢复的方法和装置。从宏指令解码的微操作被存储在解码的微操作高速缓存中。分支预测逻辑确定分支是否为假。如果所采取的分支被确定为假的，则本发明使得从原始虚假分支微操作指令下降的微操作被标记并随后移动到处理器的后端退休。此外，分支预测逻辑（分支预测逻辑存储缓冲器）被更新为分支的实际方向是什么。以这种方式，则检测到虚假的分支，从中进一步预防和恢复。

3. 发明授权

US07321963B2 System and method for storing immediate data 失效
公开(公告)号：US07321963B2
公开(公告)日：2008-01-22
申请号：US10773848
申请日：2004-02-05
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F9/318 , G06F9/28
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.

4. 发明授权

US07114057B2 System and method for storing immediate data 失效
公开(公告)号：US07114057B2
公开(公告)日：2006-09-26
申请号：US09984525
申请日：2001-10-30
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F9/318 , G06F9/28
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.

5. 发明授权

US07730281B2 System and method for storing immediate data 失效
标题翻译：用于存储即时数据的系统和方法
公开(公告)号：US07730281B2
公开(公告)日：2010-06-01
申请号：US11974995
申请日：2007-10-17
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F9/318 , G06F9/28
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.
摘要翻译：一种包含存储在存储介质上的指令的物品。该指令包括存储操作码信号的操作码字段和存储操作数信号的操作数字段。操作数在存储在操作数字段之前被压缩。

6. 发明申请

US20080133894A1 System and method for storing immediate data 失效
标题翻译：用于存储即时数据的系统和方法
公开(公告)号：US20080133894A1
公开(公告)日：2008-06-05
申请号：US11974995
申请日：2007-10-17
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F9/30
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.
摘要翻译：一种包含存储在存储介质上的指令的物品。该指令包括存储操作码信号的操作码字段和存储操作数信号的操作数字段。操作数在存储在操作数字段之前被压缩。

7. 发明授权

US06711669B2 System and method for storing immediate data 失效
标题翻译：用于存储即时数据的系统和方法
公开(公告)号：US06711669B2
公开(公告)日：2004-03-23
申请号：US10339571
申请日：2003-01-10
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F900
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.
摘要翻译：一种包含存储在存储介质上的指令的物品。该指令包括存储操作码信号的操作码字段和存储操作数信号的操作数字段。操作数在存储在操作数字段之前被压缩。

8. 发明授权

US06338132B1 System and method for storing immediate data 有权
标题翻译：用于存储即时数据的系统和方法
公开(公告)号：US06338132B1
公开(公告)日：2002-01-08
申请号：US09223299
申请日：1998-12-30
申请人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
发明人： Alan B. Kyker , Per Hammarlund , Chan Lee , Robert F. Krick , Hitesh Ahuja , William Alexander , Joseph Rohlman
IPC分类号： G06F900
CPC分类号： G06F9/30178 , G06F9/30156 , G06F9/3016 , G06F9/30167
摘要： An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an operand signal. The operand is compressed prior to being stored in the operand field.
摘要翻译：一种包含存储在存储介质上的指令的物品。该指令包括存储操作码信号的操作码字段和存储操作数信号的操作数字段。操作数在存储在操作数字段之前被压缩。

9. 发明授权

US6018786A Trace based instruction caching 失效
标题翻译：基于跟踪的指令缓存
公开(公告)号：US6018786A
公开(公告)日：2000-01-25
申请号：US956375
申请日：1997-10-23
申请人： Robert F. Krick , Glenn J. Hinton , Michael D. Upton , David J. Sager , Chan W. Lee
发明人： Robert F. Krick , Glenn J. Hinton , Michael D. Upton , David J. Sager , Chan W. Lee
IPC分类号： G06F9/32 , G06F9/38 , G06F12/08 , G06F9/26 , G06F12/00
CPC分类号： G06F9/3808 , G06F12/0875 , G06F9/3802 , G06F9/3836
摘要： A cache memory is constituted with a data array and control logic. The data array includes a number of data lines, and the control logic operates to store a number of trace segments of instructions in the data lines, including trace segments that span multiple data lines. In one embodiment, each trace segment includes one or more trace segment members having one or more instructions, with each trace segment member occupying one data line, and the data lines of a multi-line trace segment being sequentially associated (logically). Retrieval of the trace segment members of a multi-line trace segment is accomplished by first locating the data line storing the first trace segment member of the trace segment, and then successively locating the remaining data lines storing the remaining trace segment members based on the data lines' logical sequential associations.
摘要翻译：高速缓冲存储器由数据阵列和控制逻辑构成。数据阵列包括许多数据线，并且控制逻辑操作以在数据线中存储多条迹线段，包括跨越多个数据线的迹线段。在一个实施例中，每个跟踪段包括具有一个或多个指令的一个或多个跟踪段成员，每个跟踪段成员占据一个数据线，并且多行跟踪段的数据线被顺序地相关联（逻辑地）。通过首先定位存储跟踪段的第一跟踪段成员的数据线，然后基于数据连续定位存储剩余跟踪段成员的剩余数据线，来检索多行跟踪段的跟踪段成员行的逻辑顺序关联。

10. 发明授权

US5931930A Processor that indicates system bus ownership in an upgradable multiprocessor computer system 失效
标题翻译：在可升级的多处理器计算机系统中指示系统总线所有权的处理器
公开(公告)号：US5931930A
公开(公告)日：1999-08-03
申请号：US723667
申请日：1996-09-30
申请人： Robert F. Krick , Roshan J. Fernando
发明人： Robert F. Krick , Roshan J. Fernando
IPC分类号： G06F15/16 , G06F9/52 , G06F13/24 , G06F15/177 , G06F13/00 , G06F9/46 , G06F15/00
CPC分类号： G06F13/24
摘要： A computer system is disclosed having a processor with a type input pin that indicates whether the processor is coupled as an OEM processor a single processor or a dual processor computer system or as an upgrade processor in the dual processor computer system. The processor includes an upgrade/OEM output pin coupled to transfer an upgrade/OEM signal over a system bus if the type input pin indicates the OEM processor. The upgrade/OEM signal indicates whether the OEM processor or the upgrade processor is a bus owner of the system bus.
摘要翻译：公开了一种具有处理器的计算机系统，该处理器具有类型输入引脚，其指示该处理器是否作为OEM处理器耦合到单处理器或双处理器计算机系统，或作为双处理器计算机系统中的升级处理器。处理器包括升级/ OEM输出引脚，如果类型输入引脚指示OEM处理器，则该引脚耦合以通过系统总线传输升级/ OEM信号。升级/ OEM信号指示OEM处理器或升级处理器是系统总线的总线所有者。

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