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    • 1. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08053300B2
    • 2011-11-08
    • US11841817
    • 2007-08-20
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • H01L21/8238
    • H01L21/823857H01L21/823462
    • A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
    • 半导体器件包括半导体衬底,形成在衬底上的nMISFET,nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极,并由选自Ti,Zr,Hf, Ta,Sc,Y,镧系元素和锕系和选自所述一种金属元素的硼化物,硅化物和锗化合物的一种,以及形成在所述衬底上的pMISFET,所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成,第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成,绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。
    • 2. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20100171184A1
    • 2010-07-08
    • US12654490
    • 2009-12-22
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • H01L27/092
    • H01L21/823857H01L21/823462
    • A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
    • 半导体器件包括半导体衬底,形成在衬底上的nMISFET,nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极,并由选自Ti,Zr,Hf, Ta,Sc,Y,镧系元素和锕系和选自所述一种金属元素的硼化物,硅化物和锗化合物的一种,以及形成在所述衬底上的pMISFET,所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成,第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成,绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。
    • 7. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20090166749A1
    • 2009-07-02
    • US12233055
    • 2008-09-18
    • Reika ICHIHARAYoshinori TsuchiyaHiroki TanakaMasahiko YoshikiMasato Koyama
    • Reika ICHIHARAYoshinori TsuchiyaHiroki TanakaMasahiko YoshikiMasato Koyama
    • H01L27/092H01L21/8238
    • H01L21/823835H01L21/823842
    • A semiconductor device includes n- and p-type semiconductor regions separately formed on a substrate, an interlayer insulator formed on the substrate and having first and second trenches formed to reach the n- and p-type regions. There are further included first and second gate insulators formed inside of the first and second trenches, a first metal layer formed inside of the first trench via the first gate insulator, a second metal layer formed in a thickness of 1 monolayer or more and 1.5 nm or less inside of the second trench via the second gate insulator, a third metal layer formed on the second metal layer and containing at least one of a simple substance, a nitride, a carbide and an oxide of at least one metal element of alkaline earth metal elements and group III elements, first and second source/drain regions formed on the n- and p-type regions.
    • 半导体器件包括分别形成在衬底上的n型和p型半导体区,形成在衬底上的层间绝缘体,并且具有形成为达到n型和p型区的第一和第二沟槽。 还包括形成在第一和第二沟槽内的第一和第二栅极绝缘体,经由第一栅极绝缘体形成在第一沟槽内部的第一金属层,形成为厚度为1单层或更多和1.5nm的第二金属层 或更少的内部经由所述第二栅极绝缘体,形成在所述第二金属层上并且包含至少一种碱土金属元素的单质,氮化物,碳化物和氧化物中的至少一种的第三金属层 金属元素和III族元素,形成在n型和p型区上的第一和第二源/漏区。
    • 10. 发明申请
    • Semiconductor Device
    • 半导体器件
    • US20070296043A1
    • 2007-12-27
    • US11841757
    • 2007-08-20
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • Reika IchiharaYoshinori TsuchiyaMasato KoyamaAkira Nishiyama
    • H01L29/76
    • H01L21/823857H01L21/823462
    • A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
    • 半导体器件包括半导体衬底,形成在衬底上的nMISFET,nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极,并由选自Ti,Zr,Hf, Ta,Sc,Y,镧系元素和锕系和选自所述一种金属元素的硼化物,硅化物和锗化合物的一种,以及形成在所述衬底上的pMISFET,所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成,第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成,绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。