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    • 1. 发明授权
    • Self-aligned contacts for high k/metal gate process flow
    • 用于高k /金属栅极工艺流程的自对准触点
    • US08536656B2
    • 2013-09-17
    • US12987221
    • 2011-01-10
    • Ravikumar RamachandranRamachandra DivakaruniYing Li
    • Ravikumar RamachandranRamachandra DivakaruniYing Li
    • H01L21/70
    • H01L29/401H01L21/76895H01L21/76897H01L29/49H01L29/4983H01L29/51H01L29/66545H01L29/6656
    • A semiconductor structure is provided that includes a semiconductor substrate having a plurality of gate stacks located on a surface of the semiconductor substrate. Each gate stack includes, from bottom to top, a high k gate dielectric layer, a work function metal layer and a conductive metal. A spacer is located on sidewalls of each gate stack and a self-aligned dielectric liner is present on an upper surface of each spacer. A bottom surface of each self-aligned dielectric liner is present on an upper surface of a semiconductor metal alloy. A contact metal is located between neighboring gate stacks and is separated from each gate stack by the self-aligned dielectric liner. The structure also includes another contact metal having a portion that is located on and in direct contact with an upper surface of the contact metal and another portion that is located on and in direct contact with the conductive metal of one of the gate stacks. Methods of forming the semiconductor structure using a replacement gate and a non-replacement gate scheme are also disclosed.
    • 提供一种半导体结构,其包括具有位于半导体衬底的表面上的多个栅极叠层的半导体衬底。 每个栅极堆叠包括从底部到顶部的高k栅极电介质层,功函数金属层和导电金属。 间隔件位于每个栅极堆叠的侧壁上,并且自对准电介质衬垫存在于每个间隔件的上表面上。 每个自对准电介质衬垫的底表面存在于半导体金属合金的上表面上。 接触金属位于相邻的栅极堆叠之间,并通过自对准电介质衬垫与每个栅极堆叠分离。 该结构还包括另一个接触金属,其具有位于接触金属的上表面上且与触头金属的上表面直接接触的部分,以及位于与其中一个栅极叠层的导电金属直接接触的另一部分。 还公开了使用替换栅极和非替代栅极方案形成半导体结构的方法。
    • 2. 发明申请
    • Self-Aligned Contacts for High k/Metal Gate Process Flow
    • 用于高k /金属栅极工艺流程的自对准触点
    • US20120175711A1
    • 2012-07-12
    • US12987221
    • 2011-01-10
    • Ravikumar RamachandranRamachandra DivakaruniYing Li
    • Ravikumar RamachandranRamachandra DivakaruniYing Li
    • H01L29/772H01L21/283
    • H01L29/401H01L21/76895H01L21/76897H01L29/49H01L29/4983H01L29/51H01L29/66545H01L29/6656
    • A semiconductor structure is provided that includes a semiconductor substrate having a plurality of gate stacks located on a surface of the semiconductor substrate. Each gate stack includes, from bottom to top, a high k gate dielectric layer, a work function metal layer and a conductive metal. A spacer is located on sidewalls of each gate stack and a self-aligned dielectric liner is present on an upper surface of each spacer. A bottom surface of each self-aligned dielectric liner is present on an upper surface of a semiconductor metal alloy. A contact metal is located between neighboring gate stacks and is separated from each gate stack by the self-aligned dielectric liner. The structure also includes another contact metal having a portion that is located on and in direct contact with an upper surface of the contact metal and another portion that is located on and in direct contact with the conductive metal of one of the gate stacks. Methods of forming the semiconductor structure using a replacement gate and a non-replacement gate scheme are also disclosed.
    • 提供一种半导体结构,其包括具有位于半导体衬底的表面上的多个栅极叠层的半导体衬底。 每个栅极堆叠包括从底部到顶部的高k栅极电介质层,功函数金属层和导电金属。 间隔件位于每个栅极堆叠的侧壁上,并且自对准电介质衬垫存在于每个间隔件的上表面上。 每个自对准电介质衬垫的底表面存在于半导体金属合金的上表面上。 接触金属位于相邻的栅极堆叠之间,并通过自对准电介质衬垫与每个栅极堆叠分离。 该结构还包括另一个接触金属,其具有位于接触金属的上表面上且与触头金属的上表面直接接触的部分,以及位于与其中一个栅极叠层的导电金属直接接触的另一部分。 还公开了使用替换栅极和非替代栅极方案形成半导体结构的方法。
    • 3. 发明申请
    • Electrical Fuse Formed By Replacement Metal Gate Process
    • 通过更换金属浇口工艺形成的电保险丝
    • US20120256267A1
    • 2012-10-11
    • US13080019
    • 2011-04-05
    • Ying LiRamachandra Divakaruni
    • Ying LiRamachandra Divakaruni
    • H01L27/06H01L21/768H01L21/28
    • H01L23/5256H01L27/0629H01L29/517H01L29/665H01L29/66545H01L29/6659H01L29/7833H01L2924/0002H01L2924/00
    • A method is provided for fabricating an electrical fuse and a field effect transistor having a metal gate which includes removing material from first and second openings in a dielectric region overlying a substrate, wherein the first opening is aligned with an active semiconductor region of the substrate, and the second opening is aligned with an isolation region of the substrate, and the active semiconductor region including a source region and a drain region adjacent edges of the first opening. An electrical fuse can be formed which has a fuse element filling the second opening, the fuse element being a monolithic region of a single conductive material being a metal or a conductive compound of a metal. A metal gate can be formed which extends within the first opening to define a field effect transistor (“FET”) which includes the metal gate and the active semiconductor region.
    • 提供一种用于制造电熔丝和场效应晶体管的方法,所述场效应晶体管具有金属栅极,该金属栅极包括从覆盖衬底的电介质区域中的第一和第二开口去除材料,其中第一开口与衬底的有源半导体区域对准, 并且所述第二开口与所述衬底的隔离区域对准,并且所述有源半导体区域包括与所述第一开口的边缘相邻的源极区域和漏极区域。 可以形成电熔丝,其具有填充第二开口的熔丝元件,熔丝元件是单一导电材料的整体区域,金属或金属的导电化合物。 可以形成在第一开口内延伸的金属栅极,以限定包括金属栅极和有源半导体区域的场效应晶体管(FET)。
    • 4. 发明授权
    • Electrical fuse formed by replacement metal gate process
    • 电气保险丝由更换金属栅工艺形成
    • US08367494B2
    • 2013-02-05
    • US13080019
    • 2011-04-05
    • Ying LiRamachandra Divakaruni
    • Ying LiRamachandra Divakaruni
    • H01L21/8238
    • H01L23/5256H01L27/0629H01L29/517H01L29/665H01L29/66545H01L29/6659H01L29/7833H01L2924/0002H01L2924/00
    • A method is provided for fabricating an electrical fuse and a field effect transistor having a metal gate which includes removing material from first and second openings in a dielectric region overlying a substrate, wherein the first opening is aligned with an active semiconductor region of the substrate, and the second opening is aligned with an isolation region of the substrate, and the active semiconductor region including a source region and a drain region adjacent edges of the first opening. An electrical fuse can be formed which has a fuse element filling the second opening, the fuse element being a monolithic region of a single conductive material being a metal or a conductive compound of a metal. A metal gate can be formed which extends within the first opening to define a field effect transistor (“FET”) which includes the metal gate and the active semiconductor region.
    • 提供一种用于制造电熔丝和场效应晶体管的方法,所述场效应晶体管具有金属栅极,该金属栅极包括从覆盖衬底的电介质区域中的第一和第二开口去除材料,其中所述第一开口与所述衬底的有源半导体区域对准, 并且所述第二开口与所述衬底的隔离区域对准,并且所述有源半导体区域包括与所述第一开口的边缘相邻的源极区域和漏极区域。 可以形成电熔丝,其具有填充第二开口的熔丝元件,熔丝元件是单一导电材料的整体区域,金属或金属的导电化合物。 可以形成在第一开口内延伸的金属栅极,以限定包括金属栅极和有源半导体区域的场效应晶体管(FET)。