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1. 发明申请

US20090193230A1 COMPUTER SYSTEM INCLUDING A MAIN PROCESSOR AND A BOUND SECURITY COPROCESSOR 审中-公开
标题翻译：包括一个主处理器和一个重要的安全性共同计算机的计算机系统
公开(公告)号：US20090193230A1
公开(公告)日：2009-07-30
申请号：US12022446
申请日：2008-01-30
申请人： Ralf Findeisen , Geoffrey S. Strongin , Andrew R. Rawson , Garth D. Hillman , Gary H. Simpson
发明人： Ralf Findeisen , Geoffrey S. Strongin , Andrew R. Rawson , Garth D. Hillman , Gary H. Simpson
IPC分类号： G06F15/80
CPC分类号： G06F21/74 , G06F21/445 , G06F21/575 , G06F21/71 , G06F2221/2101 , G06F2221/2105
摘要： A computer system includes a main processor and a security control processor that is coupled to the main processor and configured to control and monitor an operational state of the main processor. To ensure the computer system may be trusted, the security control processor may be configured to hold the main processor in a slave mode during initialization of the security control processor such that the main processor is not operable to fetch and execute instructions from an instruction source external to the main processor, for example. In addition, the security control processor may be configured to initialize the operational state of the main processor to a predetermined state by transferring to the main processor via a control interface one or more instructions and to cause the main processor to execute the one or more instructions while the main processor is held in the slave mode.
摘要翻译：计算机系统包括主处理器和安全控制处理器，其连接到主处理器并且被配置为控制和监视主处理器的操作状态。为了确保计算机系统可以被信任，安全控制处理器可以被配置为在安全控制处理器的初始化期间将主处理器保持在从模式，使得主处理器不可操作地从指令源外部获取和执行指令以主处理器为例。此外，安全控制处理器可以被配置为通过经由控制接口将一个或多个指令传送到主处理器来将主处理器的操作状态初始化到预定状态，并且使主处理器执行一个或多个指令而主处理器则保持在从模式。

2. 发明授权

US08612729B2 Known good code for on-chip device management 有权
公开(公告)号：US08612729B2
公开(公告)日：2013-12-17
申请号：US11957930
申请日：2007-12-17
申请人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
发明人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
IPC分类号： G06F7/38 , G06F9/00 , G06F9/44 , G06F11/30 , G06F12/14
CPC分类号： G06F9/30145 , G06F9/30174 , G06F9/30178 , G06F9/30181 , G06F9/328 , G06F9/3885 , G06F21/572 , G06F21/76
摘要： In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

3. 发明申请

US20100174890A1 Known Good Code for On-Chip Device Management 有权
标题翻译：已知的片上设备管理良好代码
公开(公告)号：US20100174890A1
公开(公告)日：2010-07-08
申请号：US11957930
申请日：2007-12-17
申请人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
发明人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
IPC分类号： G06F9/30 , G06F9/44
CPC分类号： G06F9/30145 , G06F9/30174 , G06F9/30178 , G06F9/30181 , G06F9/328 , G06F9/3885 , G06F21/572 , G06F21/76
摘要： In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.
摘要翻译：在一个实施例中，处理器包括可编程映射和电路。可编程映射被配置为存储标识至少一个指令的数据，对于该指令已经定义了由处理器实现的指令集架构的架构修改，其中处理器不实现修改。电路被配置为检测指令或其存储器操作数并且导致转换到已知的良好代码（KGC），其中KGC被保护免受未经授权的修改，并且从认证实体提供。 KGC包括在执行时模拟修改的代码。在另一实施例中，集成电路包括至少一个处理器核心; 至少一个其他电路; 以及配置为向处理器核心提供KGC以供执行的KGC源。 KGC包括用于另一电路的接口代码，由此在处理器核上执行的应用程序通过KGC与另一电路接口。

4. 发明授权

US07831813B2 Uses of known good code for implementing processor architectural modifications 有权
标题翻译：使用已知的良好代码来实现处理器架构修改
公开(公告)号：US07831813B2
公开(公告)日：2010-11-09
申请号：US11957848
申请日：2007-12-17
申请人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
发明人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
IPC分类号： G06F9/455
CPC分类号： G06F9/30174 , G06F9/30178 , G06F9/30181 , G06F21/57
摘要： In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.
摘要翻译：在一个实施例中，处理器包括可编程映射和电路。可编程映射被配置为存储标识至少一个指令的数据，对于该指令已经定义了由处理器实现的指令集架构的架构修改，其中处理器不实现修改。电路被配置为检测指令或其存储器操作数并且导致转换到已知的良好代码（KGC），其中KGC被保护免受未经授权的修改，并且从认证实体提供。 KGC包括在执行时模拟修改的代码。在另一实施例中，集成电路包括至少一个处理器核心; 至少一个其他电路; 以及配置为向处理器核心提供KGC以供执行的KGC源。 KGC包括用于另一电路的接口代码，由此在处理器核上执行的应用程序通过KGC与另一电路接口。

5. 发明申请

US20090158015A1 Uses of Known Good Code for Implementing Processor Architectural Modifications 有权
标题翻译：使用已知的良好代码实现处理器架构修改
公开(公告)号：US20090158015A1
公开(公告)日：2009-06-18
申请号：US11957848
申请日：2007-12-17
申请人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
发明人： Garth D. Hillman , Geoffrey Strongin , Andrew R. Rawson , Gary H. Simpson , Ralf Findeisen
IPC分类号： G06F9/30
CPC分类号： G06F9/30174 , G06F9/30178 , G06F9/30181 , G06F21/57
摘要： In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.
摘要翻译：在一个实施例中，处理器包括可编程映射和电路。可编程映射被配置为存储标识至少一个指令的数据，对于该指令已经定义了由处理器实现的指令集架构的架构修改，其中处理器不实现修改。电路被配置为检测指令或其存储器操作数并且导致转换到已知的良好代码（KGC），其中KGC被保护免受未经授权的修改，并且从认证实体提供。 KGC包括在执行时模拟修改的代码。在另一实施例中，集成电路包括至少一个处理器核心; 至少一个其他电路; 以及配置为向处理器核心提供KGC以供执行的KGC源。 KGC包括用于另一电路的接口代码，由此在处理器核上执行的应用程序通过KGC与另一电路接口。

6. 发明申请

US20090183245A1 Limited Functionality Mode for Secure, Remote, Decoupled Computer Ownership 审中-公开
标题翻译：有限的功能模式，用于安全，远程，去耦计算机所有权
公开(公告)号：US20090183245A1
公开(公告)日：2009-07-16
申请号：US11972351
申请日：2008-01-10
申请人： Gary H. Simpson , Geoffrey Strongin , Andrew R. Rawson , Garth D. Hillman , Ralf Findeisen
发明人： Gary H. Simpson , Geoffrey Strongin , Andrew R. Rawson , Garth D. Hillman , Ralf Findeisen
IPC分类号： H04L9/32
CPC分类号： G06F21/62 , G06F21/70 , G06F2221/2137
摘要： In one embodiment, a computer system comprises one or more components and a secure computing environment coupled to the components. The secure computing environment is configured to program at least one of the components to enter a limited functionality mode responsive to expiration of a use right to the computer system, wherein operation of the computer system in the limited functionality mode is reduced compared to operation when the use right has not expired. The secure computing environment is configured to monitor the components in the limited functionality mode to detect that a limited functionality mode configuration has been modified by an unauthorized entity and to cause the computer system to enter a second mode in which operation of the computer system is reduced compared to operation in the limited functionality mode in response. In another embodiment, the secure computing environment detects a non-temporal event that indicates a violation of an owner-imposed restriction and enters a limited functionality mode.
摘要翻译：在一个实施例中，计算机系统包括耦合到组件的一个或多个组件和安全计算环境。安全计算环境被配置为响应于对计算机系统的使用权限到期而对组件中的至少一个进行编程以进入有限的功能模式，其中与有限功能模式下的操作相比，有限功能模式中的计算机系统的操作被减少使用权尚未到期。安全计算环境被配置为以有限功能模式监视组件以检测受限制的功能模式配置已被未经授权的实体修改并且使得计算机系统进入计算机系统的操作减少的第二模式与在有限功能模式下的操作相比。在另一个实施例中，安全计算环境检测指示违反所有者施加的限制的非时间事件并进入有限的功能模式。

7. 发明授权

US5323458A Echo cancellation in a full-duplex speakerphone 失效
标题翻译：全双工免提电话中的回音消除
公开(公告)号：US5323458A
公开(公告)日：1994-06-21
申请号：US140927
申请日：1993-10-25
申请人： Sangil Park , Garth D. Hillman
发明人： Sangil Park , Garth D. Hillman
IPC分类号： H04M9/08 , H04M9/00
CPC分类号： H04M9/082
摘要： A direct-path echo cancellation circuit includes a loudspeaker (12), first and second microphones (14, 16), and an in-phase signal cancellation circuit (21, 43). The first and second microphones (14, 16) are positioned adjacent the loudspeaker (12) in order to receive in-phase direct-path echo components (31, 32) of an output signal from the loudspeaker (12). The in-phase signal cancellation circuit (21 or 43) combines the in-phase direct-path echo components of the output signal in order to cancel the direct-path echo components. Direct-path echo cancellation helps to reduce howling and/or oscillation in a full-duplex speakerphone system. Also, direct-path echo cancellation provides more dynamic range to an input signal which is provided to a speakerphone signal processing system (26).
摘要翻译：直通回路消除电路包括扬声器（12），第一和第二麦克风（14,16）以及同相信号消除电路（21,43）。第一和第二麦克风（14,16）定位成与扬声器（12）相邻，以便接收来自扬声器（12）的输出信号的同相直流回波分量（31,32）。同相信号消除电路（21或43）组合输出信号的同相直通回波分量，以便消除直接路径回波分量。直通回路消除有助于减少全双工扬声器系统中的啸声和/或振荡。此外，直接路径回波消除为提供给扬声器电话信号处理系统（26）的输入信号提供更多的动态范围。

8. 发明授权

US4785411A Cascade filter structure with time overlapped partial addition operations and programmable tap length 失效
标题翻译：级联滤波器结构，具有时间重叠部分加法运算和可编程抽头长度
公开(公告)号：US4785411A
公开(公告)日：1988-11-15
申请号：US901850
申请日：1986-08-29
申请人： Charles D. Thompson , Joseph P. Gergen , Bradley Martin , Garth D. Hillman
发明人： Charles D. Thompson , Joseph P. Gergen , Bradley Martin , Garth D. Hillman
IPC分类号： H03H17/02 , G06F7/38
CPC分类号： H03H17/0211
摘要： A filter structure uses multiple discrete filter circuits which are cascaded to provide a multiple tap filter of programmable tap length. In one form, an FIR filter may be implemented wherein each circuit generates partial sum operands which must be added to provide a filter output. The cascaded circuits perform partial addition operations near simultaneously by using a serial addition which is synchronized with a start bit. The number of taps in the filter structure implemented by the cascaded discrete filter circuits is variable and may be programmed with a programmable storage register in each discrete circuit which stores operand data fixing the tap length of each discrete circuit. The multiple filter circuits provide a single filter structure with a large tap length and high sampling rate.
摘要翻译：滤波器结构使用多个分离滤波器电路，它们被级联以提供可编程分接头长度的多抽头滤波器。在一种形式中，可以实现FIR滤波器，其中每个电路产生必须被相加以提供滤波器输出的部分和操作数。级联电路通过使用与起始位同步的串行加法来同时执行部分加法运算。由级联离散滤波器电路实现的滤波器结构中的抽头数量是可变的，并且可以在每个分立电路中用可编程存储寄存器来编程，其存储固定每个分立电路的抽头长度的操作数。多个滤波器电路提供具有大抽头长度和高采样率的单个滤波器结构。

9. 发明授权

US06381224B1 Method and apparatus for controlling a full-duplex communication system 有权
标题翻译：用于控制全双工通信系统的方法和装置
公开(公告)号：US06381224B1
公开(公告)日：2002-04-30
申请号：US09282914
申请日：1999-03-31
申请人： John Eugene Lane , Patrick K. Kelly , Robert V. Holland , Garth D. Hillman
发明人： John Eugene Lane , Patrick K. Kelly , Robert V. Holland , Garth D. Hillman
IPC分类号： H04B320
CPC分类号： H04M9/082 , H04B3/234
摘要： A speakerphone system (50, 70) implements automatic gain control (AGC) when it is in a talk mode. While in the talk mode, the speakerphone system (50, 70) applies a gain factor determined by conventional AGC techniques. The inverse of this gain factor is applied to the received signal to avoid the need to adapt the coefficients of an echo canceller, such as an acoustic echo canceller (AEC) (25), as the volume level changes. The speakerphone system (50, 70) determines whether it is in the talk, double-talk, or listen mode by adaptively changing energy thresholds which define these modes, in dependence on the distribution of ratios of the transmitted energy to received energy. The speakerphone system (50, 70) also varies a loop gain in dependence on the separation between the distribution of energy ratios in the talk mode and in the receive mode. This automatic loop gain adjustment ensures loop stability.
摘要翻译：扬声器系统（50,70）在通话模式下实现自动增益控制（AGC）。在通话模式下，扬声器系统（50,70）应用由常规AGC技术确定的增益因子。该增益因子的反相应用于接收信号，以避免在音量变化时需要使诸如声学回声消除器（AEC）（25）的回声消除器的系数适应。扬声器系统（50,70）通过根据发射的能量与接收的能量的比率的分布自适应地改变定义这些模式的能量阈值来确定它是处于通话，双向通话或听音模式。扬声器系统（50,70）还根据在通话模式和接收模式下的能量比分布之间的间隔来改变环路增益。这种自动环路增益调整可以确保环路的稳定性。

10. 发明授权

US07054627B1 Method and system for locating a wireless network access point at a mobile computing device 有权
标题翻译：用于在移动计算设备处定位无线网络接入点的方法和系统
公开(公告)号：US07054627B1
公开(公告)日：2006-05-30
申请号：US10134833
申请日：2002-04-29
申请人： Garth D. Hillman
发明人： Garth D. Hillman
IPC分类号： H04Q7/20
CPC分类号： H04W4/00 , H04W28/14 , H04W64/00 , H04W88/08
摘要： A network includes an Internet connection element and a plurality of wireless device access points. Each of the plurality of wireless device access points includes a wireless transceiver and each of the plurality of wireless device access points is coupled to the Internet connection element. A location of at least one of the plurality of wireless device access points is represented on a map that is accessible via the Internet.
摘要翻译：网络包括因特网连接元件和多个无线设备接入点。多个无线设备接入点中的每一个包括无线收发器，并且多个无线设备接入点中的每一个耦合到因特网连接元件。多个无线设备接入点中的至少一个无线设备接入点的位置在可通过因特网访问的地图上表示。

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