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1. 发明申请

US20100181676A1 SUBSTRATE BONDING WITH METAL GERMANIUM SILICON MATERIAL 有权
标题翻译：基材与金属锗硅材料结合
公开(公告)号：US20100181676A1
公开(公告)日：2010-07-22
申请号：US12356939
申请日：2009-01-21
申请人： RUBEN B. MONTEZ , Alex P. Pamatat
发明人： RUBEN B. MONTEZ , Alex P. Pamatat
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/10 , B81B2207/097 , B81C1/00269 , B81C2203/0109 , B81C2203/019 , H01L21/50 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L2224/02 , H01L2224/022 , H01L2224/036 , H01L2224/0391 , H01L2224/04026 , H01L2224/05558 , H01L2224/05572 , H01L2224/05638 , H01L2224/2745 , H01L2224/27452 , H01L2224/2746 , H01L2224/276 , H01L2224/29013 , H01L2224/29016 , H01L2224/29083 , H01L2224/29111 , H01L2224/29117 , H01L2224/29124 , H01L2224/29138 , H01L2224/29144 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/29169 , H01L2224/29181 , H01L2224/29184 , H01L2224/32145 , H01L2224/32225 , H01L2224/32502 , H01L2224/32506 , H01L2224/83193 , H01L2224/83203 , H01L2224/83411 , H01L2224/83424 , H01L2224/83444 , H01L2224/83455 , H01L2224/83457 , H01L2224/83466 , H01L2224/83469 , H01L2224/83481 , H01L2224/83484 , H01L2224/83805 , H01L2224/94 , H01L2924/10157 , H01L2924/15159 , H01L2924/164 , H01L2924/01032 , H01L2924/01014 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012 , H01L2224/83
摘要： A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate is formed a first layer comprising silicon. A second layer comprising germanium and silicon is formed on the first layer. A third layer comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.
摘要翻译：在一个实施方案中用于将第一衬底粘合到第二衬底的方法包括在第一衬底上形成包括金属的层。在一个实施例中包括金属的层围绕半导体器件，其可以是微机电系统（MEMS）器件。在第二基板上形成包含硅的第一层。在第一层上形成包括锗和硅的第二层。在第二层上形成包含锗的第三层。第三层与包括金属的层接触。在第三层和包含金属的层上施加热（和一些实施例中的压力）以在第一基板和第二基板之间形成机械接合材料，其中机械接合材料是导电的。在诸如MEMS之类的半导体器件周围的机械接合的情况下，作为用于保护MEMS的气密密封件，机械结合可能是特别有利的。

2. 发明申请

US20120068325A1 SUBSTRATE BONDING WITH METAL GERMANIUM SILICON MATERIAL 有权
标题翻译：基材与金属锗硅材料结合
公开(公告)号：US20120068325A1
公开(公告)日：2012-03-22
申请号：US13273389
申请日：2011-10-14
申请人： Ruben B. Montez , Alex P. Pamatat
发明人： Ruben B. Montez , Alex P. Pamatat
IPC分类号： H01L21/50 , H01L23/12
CPC分类号： H01L23/10 , B81B2207/097 , B81C1/00269 , B81C2203/0109 , B81C2203/019 , H01L21/50 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L2224/02 , H01L2224/022 , H01L2224/036 , H01L2224/0391 , H01L2224/04026 , H01L2224/05558 , H01L2224/05572 , H01L2224/05638 , H01L2224/2745 , H01L2224/27452 , H01L2224/2746 , H01L2224/276 , H01L2224/29013 , H01L2224/29016 , H01L2224/29083 , H01L2224/29111 , H01L2224/29117 , H01L2224/29124 , H01L2224/29138 , H01L2224/29144 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/29169 , H01L2224/29181 , H01L2224/29184 , H01L2224/32145 , H01L2224/32225 , H01L2224/32502 , H01L2224/32506 , H01L2224/83193 , H01L2224/83203 , H01L2224/83411 , H01L2224/83424 , H01L2224/83444 , H01L2224/83455 , H01L2224/83457 , H01L2224/83466 , H01L2224/83469 , H01L2224/83481 , H01L2224/83484 , H01L2224/83805 , H01L2224/94 , H01L2924/10157 , H01L2924/15159 , H01L2924/164 , H01L2924/01032 , H01L2924/01014 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012 , H01L2224/83
摘要： In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.
摘要翻译：在一个实施例中，包括第一衬底，第一衬底上的半导体器件，第二衬底和围绕半导体器件的第一衬底和第二衬底之间的导电结合的半导体结构，以密封半导体器件在第一衬底和第二基板。导电键包括金属，硅和锗。导电键中硅的原子量的百分比大于5％。

3. 发明授权

US08058143B2 Substrate bonding with metal germanium silicon material 有权
标题翻译：与金属锗硅材料基板接合
公开(公告)号：US08058143B2
公开(公告)日：2011-11-15
申请号：US12356939
申请日：2009-01-21
申请人： Ruben B. Montez , Alex P. Pamatat
发明人： Ruben B. Montez , Alex P. Pamatat
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L23/10 , B81B2207/097 , B81C1/00269 , B81C2203/0109 , B81C2203/019 , H01L21/50 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L2224/02 , H01L2224/022 , H01L2224/036 , H01L2224/0391 , H01L2224/04026 , H01L2224/05558 , H01L2224/05572 , H01L2224/05638 , H01L2224/2745 , H01L2224/27452 , H01L2224/2746 , H01L2224/276 , H01L2224/29013 , H01L2224/29016 , H01L2224/29083 , H01L2224/29111 , H01L2224/29117 , H01L2224/29124 , H01L2224/29138 , H01L2224/29144 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/29169 , H01L2224/29181 , H01L2224/29184 , H01L2224/32145 , H01L2224/32225 , H01L2224/32502 , H01L2224/32506 , H01L2224/83193 , H01L2224/83203 , H01L2224/83411 , H01L2224/83424 , H01L2224/83444 , H01L2224/83455 , H01L2224/83457 , H01L2224/83466 , H01L2224/83469 , H01L2224/83481 , H01L2224/83484 , H01L2224/83805 , H01L2224/94 , H01L2924/10157 , H01L2924/15159 , H01L2924/164 , H01L2924/01032 , H01L2924/01014 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012 , H01L2224/83
摘要： A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate is formed a first layer comprising silicon. A second layer comprising germanium and silicon is formed on the first layer. A third layer comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.
摘要翻译：在一个实施方案中用于将第一衬底粘合到第二衬底的方法包括在第一衬底上形成包括金属的层。在一个实施例中包括金属的层围绕半导体器件，其可以是微机电系统（MEMS）器件。在第二基板上形成包含硅的第一层。在第一层上形成包括锗和硅的第二层。在第二层上形成包含锗的第三层。第三层与包括金属的层接触。在第三层和包含金属的层上施加热（和一些实施例中的压力）以在第一基板和第二基板之间形成机械接合材料，其中机械接合材料是导电的。在诸如MEMS之类的半导体器件周围的机械接合的情况下，作为用于保护MEMS的气密密封件，机械结合可能是特别有利的。

4. 发明授权

US08592926B2 Substrate bonding with metal germanium silicon material 有权
标题翻译：与金属锗硅材料基板接合
公开(公告)号：US08592926B2
公开(公告)日：2013-11-26
申请号：US13273389
申请日：2011-10-14
申请人： Ruben B. Montez , Alex P. Pamatat
发明人： Ruben B. Montez , Alex P. Pamatat
IPC分类号： H01L21/50 , H01L23/10 , B81C1/00
CPC分类号： H01L23/10 , B81B2207/097 , B81C1/00269 , B81C2203/0109 , B81C2203/019 , H01L21/50 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L2224/02 , H01L2224/022 , H01L2224/036 , H01L2224/0391 , H01L2224/04026 , H01L2224/05558 , H01L2224/05572 , H01L2224/05638 , H01L2224/2745 , H01L2224/27452 , H01L2224/2746 , H01L2224/276 , H01L2224/29013 , H01L2224/29016 , H01L2224/29083 , H01L2224/29111 , H01L2224/29117 , H01L2224/29124 , H01L2224/29138 , H01L2224/29144 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/29169 , H01L2224/29181 , H01L2224/29184 , H01L2224/32145 , H01L2224/32225 , H01L2224/32502 , H01L2224/32506 , H01L2224/83193 , H01L2224/83203 , H01L2224/83411 , H01L2224/83424 , H01L2224/83444 , H01L2224/83455 , H01L2224/83457 , H01L2224/83466 , H01L2224/83469 , H01L2224/83481 , H01L2224/83484 , H01L2224/83805 , H01L2224/94 , H01L2924/10157 , H01L2924/15159 , H01L2924/164 , H01L2924/01032 , H01L2924/01014 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012 , H01L2224/83
摘要： In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.
摘要翻译：在一个实施例中，包括第一衬底，第一衬底上的半导体器件，第二衬底和围绕半导体器件的第一衬底和第二衬底之间的导电结合的半导体结构，以密封半导体器件在第一衬底和第二基板。导电键包括金属，硅和锗。导电键中硅的原子量的百分比大于5％。

5. 发明申请

US20110221042A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110221042A1
公开(公告)日：2011-09-15
申请号：US12722225
申请日：2010-03-11
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
IPC分类号： H01L23/04 , H01L21/50
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

6. 发明授权

US07497763B2 Polishing pad, a polishing apparatus, and a process for using the polishing pad 有权
标题翻译：抛光垫，抛光装置和使用抛光垫的工艺
公开(公告)号：US07497763B2
公开(公告)日：2009-03-03
申请号：US11390176
申请日：2006-03-27
申请人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
发明人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
IPC分类号： B24B49/00
CPC分类号： B24B37/205 , B24B49/12
摘要： A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.
摘要翻译：抛光垫可以包括第一层和第二层。第一层可以具有第一抛光表面和第一开口。第二层可以具有附接表面和与第一开口基本相邻的第二开口。抛光垫还可以包括位于第一开口内的垫窗。垫窗可包括第二抛光表面。当焊盘将附接到压板时，第一和第二抛光表面可以沿同一平面放置，并且焊盘窗口的相对表面可以抵靠压板窗的外表面。另一方面，抛光装置可以包括邻接抛光垫的压板窗的外表面。在另一方面，抛光过程可以包括抛光工件，使得焊盘窗口同时接触工件和压板窗。

7. 发明授权

US08551814B2 Method of fabricating a semiconductor device that limits damage to elements of the semiconductor device that are exposed during processing 有权
标题翻译：制造半导体器件的方法，其限制在处理期间暴露的半导体器件的元件的损坏
公开(公告)号：US08551814B2
公开(公告)日：2013-10-08
申请号：US12722225
申请日：2010-03-11
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M Winebarger
IPC分类号： H01L23/48 , H01L33/48
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

8. 发明授权

US07892070B2 Process of using a polishing apparatus including a platen window and a polishing pad 有权
标题翻译：使用包括压板窗和抛光垫的抛光装置的工艺
公开(公告)号：US07892070B2
公开(公告)日：2011-02-22
申请号：US12243543
申请日：2008-10-01
申请人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
发明人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
IPC分类号： B24B49/00
CPC分类号： B24B37/205 , B24B49/12
摘要： A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.
摘要翻译：抛光垫可以包括第一层和第二层。第一层可以具有第一抛光表面和第一开口。第二层可以具有附接表面和与第一开口基本相邻的第二开口。抛光垫还可以包括位于第一开口内的垫窗。垫窗可包括第二抛光表面。当焊盘将附接到压板时，第一和第二抛光表面可以沿同一平面放置，并且焊盘窗口的相对表面可以抵靠压板窗的外表面。另一方面，抛光装置可以包括邻接抛光垫的压板窗的外表面。在另一方面，抛光过程可以包括抛光工件，使得焊盘窗口同时接触工件和压板窗。

9. 发明授权

US07520797B2 Platen endpoint window with pressure relief 有权
标题翻译：压板端点窗口
公开(公告)号：US07520797B2
公开(公告)日：2009-04-21
申请号：US11221376
申请日：2005-09-06
申请人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
发明人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
IPC分类号： B24B1/00 , B24B29/00 , B29C65/00
CPC分类号： B24B37/013 , B24B37/205
摘要： A polish pad (40, 42) and platen (50) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (50) having a vented endpoint window (62, 72, 82) with one or more venting passageways (e.g., 64, 66) and/or a grooved or channeled platen surface (176) to prevent air pressure buildup in the air gap (46) by discharging or venting air through one or more vent pathways (52) formed in the platen to provide a pathway to ambient or sub-ambient environment. The air permeable construction of the vented endpoint window (72) provides pressure relief for the air gap (46) between the pad endpoint window (44) and the vented endpoint window (72), but may also include passages (75, 76) that are filled with an air permeable hydrophobic material which protects the underlying endpoint detection system (30, 32) from contamination during cleaning of the platen endpoint window (72).
摘要翻译：用于半导体器件的化学机械抛光的抛光垫（40,42）和压板（50）组件包括具有通气端点窗口（62,72,82）的压板（50），其具有一个或多个通气通道（例如，通过排出或排出空气通过形成在压盘中的一个或多个排气通道（52），以提供通道（64,66）和/或沟槽或通道的压板表面（176），以防止空气间隙环境或环境下的环境。通气端点窗口（72）的透气结构为垫垫端点窗口（44）和排气端点窗口（72）之间的气隙（46）提供压力释放，但也可包括通道（75,76）填充有透气的疏水材料，其在清洁压板端点窗口（72）期间保护下面的端点检测系统（30,32）免受污染。

10. 发明申请

US20090023363A1 PROCESS OF USING A POLISHING APPARATUS INCLUDING A PLATEN WINDOW AND A POLISHING PAD 有权
标题翻译：使用包括平板窗和抛光垫的抛光装置的方法
公开(公告)号：US20090023363A1
公开(公告)日：2009-01-22
申请号：US12243543
申请日：2008-10-01
申请人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
发明人： Brian E. Bottema , Stephen F. Abraham , Alex P. Pamatat
IPC分类号： B24B1/00
CPC分类号： B24B37/205 , B24B49/12
摘要： A polishing pad can include a first layer and a second layer. The first layer can have a first polishing surface and a first opening. The second layer can have an attaching surface and a second opening substantially contiguous with the first opening. The polishing pad can further include, a pad window lying within the first opening. The pad window can include a second polishing surface. When the pad would be attached to a platen, the first and second polishing surfaces can lie along a same plane, and an opposing surface of the pad window can abut an exterior surface of a platen window. In another aspect, a polishing apparatus can include an exterior surface of a platen window abutting the polishing pad. In still another aspect, a process of polishing can include polishing a workpiece such that the pad window contacts the workpiece and the platen window simultaneously.
摘要翻译：抛光垫可以包括第一层和第二层。第一层可以具有第一抛光表面和第一开口。第二层可以具有附接表面和与第一开口基本相邻的第二开口。抛光垫还可以包括位于第一开口内的垫窗。垫窗可包括第二抛光表面。当焊盘将附接到压板时，第一和第二抛光表面可以沿同一平面放置，并且焊盘窗口的相对表面可以抵靠压板窗的外表面。另一方面，抛光装置可以包括邻接抛光垫的压板窗的外表面。在另一方面，抛光过程可以包括抛光工件，使得焊盘窗口同时接触工件和压板窗。

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