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1. 发明申请

US20120193808A1 BONDED STACKED WAFERS AND METHODS OF ELECTROPLATING BONDED STACKED WAFERS 有权
标题翻译：结合堆叠的波形和电镀结合堆叠的波形的方法
公开(公告)号：US20120193808A1
公开(公告)日：2012-08-02
申请号：US13018534
申请日：2011-02-01
申请人： Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
发明人： Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L24/83 , B81C3/001 , B81C2201/0197 , B81C2203/035 , C25D7/123 , C25D17/001 , C25D17/005 , C25D17/007 , H01L23/481 , H01L24/13 , H01L24/94 , H01L25/50 , H01L2224/13144 , H01L2225/06513 , H01L2225/06541 , H01L2924/01068 , H01L2924/10253 , H01L2924/12042 , H01L2924/1461 , H01L2924/30101 , H01L2924/00014 , H01L2924/00
摘要： A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs.
摘要翻译：晶片结构包括第一晶片堆叠和设置在第一晶片堆叠上的第一结合层。晶片结构还包括第二晶片堆叠，其包括第一表面和与第一表面相对的第二表面。第二接合层设置在第二表面上并与第一接合层接触。第二晶片堆叠包括从第一表面延伸到第二结合层的穿硅通孔（TSV）。种子层设置在第一表面上并与TSV接触。

2. 发明授权

US08970043B2 Bonded stacked wafers and methods of electroplating bonded stacked wafers 有权
标题翻译：粘合的堆叠晶片和电镀粘合堆叠晶片的方法
公开(公告)号：US08970043B2
公开(公告)日：2015-03-03
申请号：US13018534
申请日：2011-02-01
申请人： Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
发明人： Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
IPC分类号： H01L23/02 , H01L23/48 , H01L23/52 , H01L29/40 , C25D17/00 , B81C3/00 , C25D7/12 , H01L25/00 , H01L23/00
CPC分类号： H01L24/83 , B81C3/001 , B81C2201/0197 , B81C2203/035 , C25D7/123 , C25D17/001 , C25D17/005 , C25D17/007 , H01L23/481 , H01L24/13 , H01L24/94 , H01L25/50 , H01L2224/13144 , H01L2225/06513 , H01L2225/06541 , H01L2924/01068 , H01L2924/10253 , H01L2924/12042 , H01L2924/1461 , H01L2924/30101 , H01L2924/00014 , H01L2924/00
摘要： A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs.
摘要翻译：晶片结构包括第一晶片堆叠和设置在第一晶片堆叠上的第一结合层。晶片结构还包括第二晶片堆叠，其包括第一表面和与第一表面相对的第二表面。第二接合层设置在第二表面上并与第一接合层接触。第二晶片堆叠包括从第一表面延伸到第二结合层的穿硅通孔（TSV）。种子层设置在第一表面上并与TSV接触。

3. 发明申请

US20120194306A1 PREVENTING CONTACT STICTION IN MICRO RELAYS 审中-公开
标题翻译：防止微型继电器中的接触件
公开(公告)号：US20120194306A1
公开(公告)日：2012-08-02
申请号：US13018499
申请日：2011-02-01
申请人： Uppili Sridhar , Quanbo Zou , Amit S. Kelkar , Xuejun Ying
发明人： Uppili Sridhar , Quanbo Zou , Amit S. Kelkar , Xuejun Ying
IPC分类号： H01H1/0237
CPC分类号： H01H1/0237 , H01H59/0009 , H01H2001/0084
摘要： A micro relay of a micro-electro-mechanical system (MEMS), includes a cap substrate, a first electrical contact, an actuator, and a second electrical contact. The first electrical contact is formed on the cap substrate, includes a platinum group metal, and includes a first surface layer of an oxide of the platinum group metal. The second electrical contact is formed on the actuator, includes the platinum group metal, and includes a second surface layer of the oxide of the platinum group metal. At least a first portion of the first surface layer contacts at least a second portion of the second surface layer during cycling of the micro relay.
摘要翻译：微电子机械系统（MEMS）的微型继电器包括盖基板，第一电触头，致动器和第二电触点。第一电接触形成在盖基板上，包括铂族金属，并且包括铂族金属的氧化物的第一表面层。第二电触点形成在致动器上，包括铂族金属，并且包括铂族金属的氧化物的第二表面层。第一表面层的至少第一部分在微型继电器的循环期间接触第二表面层的至少第二部分。

4. 发明申请

US20070099395A1 Wafer level packaging process 有权
标题翻译：晶圆级封装工艺
公开(公告)号：US20070099395A1
公开(公告)日：2007-05-03
申请号：US11265810
申请日：2005-11-03
申请人： Uppili Sridhar , Quanbo Zou
发明人： Uppili Sridhar , Quanbo Zou
IPC分类号： H01L21/00
CPC分类号： B81C1/00301 , B81B2207/096 , H01L21/76898 , H01L2224/11
摘要： Wafer level packaging process for packaging MEMS or other devices. In some embodiments, a MEMS wafer with normal thickness is firstly bonded to a cap wafer of normal thickness, followed by a thinning on the backside of the MEMS wafer. After this, the bonded wafer stack and the capping of the hermetically packaged MEMS devices are still rigid enough to do further processing. On this basis, through vias on the thinned substrate can be easily formed and stopped on the regions to be led out (e.g., metal pads/electrodes, highly doped silicon, etc.). Vias can be partially filled as this is the final surface of process. Even thick metal coated/patterned vias have much more space to relax possible thermal stress, as long as the vias are not completely filled with hard metal(s). Various embodiments are disclosed.
摘要翻译：用于封装MEMS或其他器件的晶圆级封装工艺。在一些实施例中，具有正常厚度的MEMS晶片首先结合到正常厚度的盖晶片，随后在MEMS晶片的背面上变薄。之后，贴合晶片堆叠和封装的MEMS器件的封盖仍然足够坚固以进行进一步的处理。在此基础上，可以容易地在被引出的区域（例如，金属焊盘/电极，高度掺杂的硅等）上形成和停止在薄的衬底上的通孔。通风口可以部分填充，因为这是过程的最终表面。只要通孔不完全填充有硬质金属，均匀的厚金属涂层/图案通孔就有更多的空间来放松可能的热应力。公开了各种实施例。

5. 发明授权

US07463125B2 Microrelays and microrelay fabrication and operating methods 有权
标题翻译：微型和微型制造和操作方法
公开(公告)号：US07463125B2
公开(公告)日：2008-12-09
申请号：US10979307
申请日：2004-11-02
申请人： Uppili Sridhar , Quanbo Zou
发明人： Uppili Sridhar , Quanbo Zou
IPC分类号： H01H51/22
CPC分类号： H01H59/0009 , H01H2059/0018
摘要： Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
摘要翻译：提供在开关闭合位置和开关打开位置之间可靠地控制的微型继电器致动器的微型继电器和微型继电器制造和操作方法。微型继电器是五端子装置，形成开关触点的两个端子，一个端子控制致动器导电区域上的致动电压，一个端子控制第一固定导电区域上的致动电压，一个端子控制第二固定导电区域上的致动电压固定导电区域使致动器沿与第一固定导电区域相反的方向偏转。将致动电压提供为零平均电压方波及其补码提供最大的致动力，以及致动器在两个执行器位置的正向保持。公开了各种制造技术。

6. 发明授权

US06858459B2 Method of fabricating micro-mirror switching device 失效
标题翻译：制造微镜开关装置的方法
公开(公告)号：US06858459B2
公开(公告)日：2005-02-22
申请号：US10154279
申请日：2002-05-23
申请人： Janak Singh , Uppili Sridhar , Ranganathan Nagarajan , Quanbo Zou
发明人： Janak Singh , Uppili Sridhar , Ranganathan Nagarajan , Quanbo Zou
IPC分类号： H01L21/00 , H01L31/0232
CPC分类号： B81C1/00142 , B81B2201/042 , G02B26/0841
摘要： Method of fabricating a micro-mirror switching device in single crystal silicon are described. The device is fabricated as three main elements: silicon mirror plate with metal-mirror, secondary actuator, and hinge/spring mechanism to integrate the mirror plate with the actuator. p-n junction is first formed on p-type silicon. Trenches are then etched in n-silicon to define the device element boundaries and filled with silicon dioxide. Three layers of sacrificial oxide and two structural poly-silicon layers are deposited and patterned to form device elements. Novel release processes, consisting of backside electrochemical etching in potassium-hydroxide, reactive ion etching to expose oxide-filled trenches from the bottom, and hydrofluoric acid etching of sacrificial oxide layers and oxide in silicon trenches, form the silicon blocks; those that are not attached to structural poly-silicon are sacrificed and those that are attached are left in place to hold together the switching device elements.
摘要翻译：描述了在单晶硅中制造微镜开关器件的方法。该装置被制造为三个主要元件：具有金属镜的硅镜板，二次致动器和用于将镜面板与致动器集成的铰链/弹簧机构。 p-n结首先在p型硅上形成。然后在n硅中蚀刻沟槽以限定器件元件边界并填充二氧化硅。沉积和图案化三层牺牲氧化物和两个结构多晶硅层以形成器件元件。由氢氧化钾中的背面电化学蚀刻，从底部暴露氧化物填充的沟槽的反应离子蚀刻和硅沟槽中的牺牲氧化物层和氧化物的氢氟酸蚀刻组成的新型释放过程形成硅块; 牺牲未附着于结构多晶硅的那些，并且将附着的那些留在适当位置以将开关元件元件保持在一起。

7. 发明授权

US07393758B2 Wafer level packaging process 有权
标题翻译：晶圆级封装工艺
公开(公告)号：US07393758B2
公开(公告)日：2008-07-01
申请号：US11265810
申请日：2005-11-03
申请人： Uppili Sridhar , Quanbo Zou
发明人： Uppili Sridhar , Quanbo Zou
IPC分类号： H01L21/46 , H01L21/78 , H01L21/301
CPC分类号： B81C1/00301 , B81B2207/096 , H01L21/76898 , H01L2224/11
摘要： Wafer level packaging process for packaging MEMS or other devices. In some embodiments, a MEMS wafer with normal thickness is firstly bonded to a cap wafer of normal thickness, followed by a thinning on the backside of the MEMS wafer. After this, the bonded wafer stack and the capping of the hermetically packaged MEMS devices are still rigid enough to do further processing. On this basis, through vias on the thinned substrate can be easily formed and stopped on the regions to be led out (e.g., metal pads/electrodes, highly doped silicon, etc.). Vias can be partially filled as this is the final surface of process. Even thick metal coated/patterned vias have much more space to relax possible thermal stress, as long as the vias are not completely filled with hard metal(s). Various embodiments are disclosed.
摘要翻译：用于封装MEMS或其他器件的晶圆级封装工艺。在一些实施例中，具有正常厚度的MEMS晶片首先结合到正常厚度的盖晶片，随后在MEMS晶片的背面上变薄。之后，贴合晶片堆叠和封装的MEMS器件的封盖仍然足够坚固以进行进一步的处理。在此基础上，可以容易地在被引出的区域（例如，金属焊盘/电极，高度掺杂的硅等）上形成和停止在薄的衬底上的通孔。通风口可以部分填充，因为这是过程的最终表面。只要通孔不完全填充有硬质金属，均匀的厚金属涂层/图案通孔就有更多的空间来放松可能的热应力。公开了各种实施例。

8. 发明授权

US06762049B2 Miniaturized multi-chamber thermal cycler for independent thermal multiplexing 失效
标题翻译：用于独立热复用的小型化多室热循环仪
公开(公告)号：US06762049B2
公开(公告)日：2004-07-13
申请号：US09898124
申请日：2001-07-05
申请人： Quanbo Zou , Uppili Sridhar
发明人： Quanbo Zou , Uppili Sridhar
IPC分类号： C12Q168
CPC分类号： B01L3/50851 , B01J19/0093 , B01J2219/00783 , B01J2219/00804 , B01J2219/00819 , B01J2219/00873 , B01J2219/00961 , B01L7/52 , B01L7/54 , B01L9/523 , B01L2300/0819 , B01L2300/1805 , F28F13/00
摘要： It is often desirable to be able to perform an array of micro-chemical reactions simultaneously but with each reaction proceeding at a different temperature and/or for a different time. A classic example is the polymerase chain reaction associated with DNA analysis. In the present invention, this is achieved by means of an apparatus made up of a chip of plastic, or similar low cost material, containing an array of reaction chambers. After all chambers have been filled with reagents, the chip is pressed up against a substrate, typically a printed circuit board, there being a set of temperature balancing blocks between the chip and the substrate. Individually controlled heaters and sensors located between the blocks and the substrate allow each chamber to follow its own individual thermal protocol while being well thermally isolated from all other chambers and the substrate. The latter rests on a large heat sink to avoid temperature drift over time. A process for manufacturing the apparatus is also disclosed.
摘要翻译：通常期望能够同时执行微量化学反应的阵列，但是每个反应在不同的温度和/或不同的时间进行。典型的例子是与DNA分析相关的聚合酶链反应。在本发明中，这通过由包含反应室阵列的塑料芯片或类似的低成本材料构成的装置来实现。在所有的室已经充满试剂之后，芯片被压靠在衬底（通常是印刷电路板）上，在芯片和衬底之间存在一组温度平衡块。位于块体和衬底之间的单独控制的加热器和传感器允许每个腔室遵循其各自的热协议，同时与所有其它腔室和衬底良好地热隔离。后者放在大型散热器上，以避免温度随时间漂移。还公开了一种制造该装置的方法。

9. 发明授权

US06621135B1 Microrelays and microrelay fabrication and operating methods 有权
标题翻译：微型和微型制造和操作方法
公开(公告)号：US06621135B1
公开(公告)日：2003-09-16
申请号：US10253728
申请日：2002-09-24
申请人： Uppili Sridhar , Quanbo Zou
发明人： Uppili Sridhar , Quanbo Zou
IPC分类号： H01L2982
CPC分类号： H01H59/0009 , H01H2059/0018 , H01H2059/0072
摘要： Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
摘要翻译：提供在开关闭合位置和开关打开位置之间可靠地控制的微型继电器致动器的微型继电器和微型继电器制造和操作方法。微型继电器是五端子装置，形成开关触点的两个端子，一个端子控制致动器导电区域上的致动电压，一个端子控制第一固定导电区域上的致动电压，一个端子控制第二固定导电区域上的致动电压固定导电区域使致动器沿与第一固定导电区域相反的方向偏转。将致动电压提供为零平均电压方波及其补码提供最大的致动力，以及致动器在两个执行器位置的正向保持。公开了各种制造技术。

10. 发明授权

US06509186B1 Miniaturized thermal cycler 失效
标题翻译：小型化热循环仪
公开(公告)号：US06509186B1
公开(公告)日：2003-01-21
申请号：US09846126
申请日：2001-05-01
申请人： Quanbo Zou , Uppili Sridhar , Yu Chen , Tit Meng Lim , Emmanuel Selvanayagam Zachariah , Tie Yan
发明人： Quanbo Zou , Uppili Sridhar , Yu Chen , Tit Meng Lim , Emmanuel Selvanayagam Zachariah , Tie Yan
IPC分类号： C12M136
CPC分类号： B01L3/5027 , B01L3/5025 , B01L7/52 , B01L2200/147 , B01L2300/0816 , B01L2300/0877 , B01L2300/1827 , B01L2300/1883 , B01L2400/0487 , B01L2400/0688
摘要： The invention describes a thermal cycler which permits simultaneous treatment of multiple individual samples in independent thermal protocols, so as to implement large numbers of DNA experiments simultaneously in a short time. The chamber is thermally isolated from its surroundings, heat flow in and out of the unit being limited to one or two specific heat transfer areas. All heating elements are located within these transfer areas and at least one temperature sensor per heating element is positioned close by. Fluid bearing channels that facilitate sending fluid into, and removing fluid from, the chamber are provided. The chambers may be manufactured as integrated arrays to form units in which each cycler chamber has independent temperature and fluid flow control. Two embodiments of the invention are described together with a process for manufacturing them as well as two schemes for making connections to the outside world.
摘要翻译：本发明描述了一种热循环仪，其允许在独立热方案中同时处理多个单个样品，从而在短时间内同时实现大量的DNA实验。该室与其周围热隔离，进出单元的热流限于一个或两个特定的传热区域。所有加热元件位于这些转移区域内，每个加热元件至少有一个温度传感器靠近。提供了便于将流体输送到腔室中并从腔室中除去流体的流体轴承通道。腔室可以被制成集成阵列以形成其中每个循环器腔具有独立温度和流体流量控制的单元。本发明的两个实施例与制造它们的方法以及用于连接到外部世界的两种方案一起被描述。

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