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1. 发明申请

US20070020884A1 Semiconductor structures formed on substrates and methods of manufacturing the same 有权
标题翻译：在基板上形成的半导体结构及其制造方法
公开(公告)号：US20070020884A1
公开(公告)日：2007-01-25
申请号：US11189163
申请日：2005-07-25
申请人： Qi Wang , Minhua Li , Jeffrey Rice
发明人： Qi Wang , Minhua Li , Jeffrey Rice
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76251 , H01L21/2007 , H01L21/6835 , H01L2221/68368
摘要： Processes used to transfer semiconductor structures from an initial substrate to a base substrate include bonding the initial substrate with a silicon dioxide layer to a doped silicon structure weakened sufficiently by hydrogen implantation for cleaving. After cleaving, a doped silicon layer remains, burying the silicon dioxide layer between the doped silicon layer and the initial substrate. Semiconductor structures are formed within/on an epitaxial layer disposed on the doped silicon layer forming an intermediate semiconductor structure. A process handle is temporarily bonded to the semiconductor structures for support. The initial substrate is thinned and removed by a mechanical thinning process followed by chemical etching using the buried silicon dioxide layer as an etch stop. The silicon dioxide layer is chemically removed from the doped silicon layer. A base substrate is formed on the doped silicon layer. The process handle is removed leaving the semiconductor structures disposed on the base substrate.
摘要翻译：用于将半导体结构从初始衬底转移到基底衬底的工艺包括将初始衬底与二氧化硅层结合到通过氢注入充分削弱的用于裂解的掺杂硅结构。在分裂之后，保留掺杂的硅层，将二氧化硅层埋在掺杂硅层和初始衬底之间。半导体结构形成在设置在掺杂硅层上的外延层内/之上，形成中间半导体结构。工艺手柄临时粘合到用于支撑的半导体结构。通过机械稀化处理使初始底物变薄并除去，然后使用掩埋二氧化硅层作为蚀刻停止层进行化学蚀刻。从掺杂硅层化学去除二氧化硅层。基底衬底形成在掺杂硅层上。去除处理手柄，留下设置在基底基板上的半导体结构。

2. 发明授权

US08338886B2 Semiconductor device with (110)-oriented silicon 有权
标题翻译：具有（110）取向硅的半导体器件
公开(公告)号：US08338886B2
公开(公告)日：2012-12-25
申请号：US13328179
申请日：2011-12-16
申请人： Qi Wang , Minhua Li , Yuri Sokolov
发明人： Qi Wang , Minhua Li , Yuri Sokolov
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L21/30608 , H01L21/76254 , H01L29/045 , H01L29/407 , H01L29/41741 , H01L29/66348 , H01L29/66363 , H01L29/66734
摘要： A vertical semiconductor device includes a bottom metal layer and a first P-type semiconductor layer overlying the bottom metal layer. The first P-type semiconductor layer is characterized by a surface crystal orientation of (110) and a first conductivity. The first P-type semiconductor layer is heavily doped. The vertical semiconductor device also includes a second P-type semiconductor layer overlying the first P-type semiconductor layer. The second semiconductor layer has a surface crystal orientation of (110) and is characterized by a lower conductivity than the first conductivity. The vertical semiconductor device also has a top metal layer overlying the second P-type semiconductor layer. A current conduction from the top metal layer to the bottom metal layer and through the second p-type semiconductor layer is characterized by a hole mobility along a crystalline orientation and on (110) crystalline plane.
摘要翻译：垂直半导体器件包括底金属层和覆盖底部金属层的第一P型半导体层。第一P型半导体层的特征在于（110）的表面晶体取向和第一导电性。第一P型半导体层是重掺杂的。垂直半导体器件还包括覆盖第一P型半导体层的第二P型半导体层。第二半导体层具有（110）的表面晶体取向，其特征在于比第一导电性低的导电性。垂直半导体器件还具有覆盖第二P型半导体层的顶部金属层。从顶部金属层到底部金属层和通过第二p型半导体层的电流传导的特征在于沿着<110>晶体取向和在（110）晶面上的空穴迁移率。

3. 发明授权

US07635637B2 Semiconductor structures formed on substrates and methods of manufacturing the same 有权
标题翻译：在基板上形成的半导体结构及其制造方法
公开(公告)号：US07635637B2
公开(公告)日：2009-12-22
申请号：US11189163
申请日：2005-07-25
申请人： Qi Wang , Minhua Li , Jeffrey H. Rice
发明人： Qi Wang , Minhua Li , Jeffrey H. Rice
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76251 , H01L21/2007 , H01L21/6835 , H01L2221/68368
摘要： Processes used to transfer semiconductor structures from an initial substrate to a base substrate include bonding the initial substrate with a silicon dioxide layer to a doped silicon structure weakened sufficiently by hydrogen implantation for cleaving. After cleaving, a doped silicon layer remains, burying the silicon dioxide layer between the doped silicon layer and the initial substrate. Semiconductor structures are formed within/on an epitaxial layer disposed on the doped silicon layer forming an intermediate semiconductor structure. A process handle is temporarily bonded to the semiconductor structures for support. The initial substrate is thinned and removed by a mechanical thinning process followed by chemical etching using the buried silicon dioxide layer as an etch stop. The silicon dioxide layer is chemically removed from the doped silicon layer. A base substrate is formed on the doped silicon layer. The process handle is removed leaving the semiconductor structures disposed on the base substrate.
摘要翻译：用于将半导体结构从初始衬底转移到基底衬底的工艺包括将初始衬底与二氧化硅层结合到通过氢注入充分削弱的用于裂解的掺杂硅结构。在分裂之后，保留掺杂的硅层，将二氧化硅层埋在掺杂硅层和初始衬底之间。半导体结构形成在设置在掺杂硅层上的外延层内/之上，形成中间半导体结构。工艺手柄临时粘合到用于支撑的半导体结构。通过机械稀化处理使初始底物变薄并除去，然后使用掩埋二氧化硅层作为蚀刻停止层进行化学蚀刻。从掺杂硅层化学去除二氧化硅层。基底衬底形成在掺杂硅层上。去除处理手柄，留下设置在基底基板上的半导体结构。

4. 发明授权

US07635635B2 Method for bonding a semiconductor substrate to a metal substrate 有权
标题翻译：将半导体衬底接合到金属衬底的方法
公开(公告)号：US07635635B2
公开(公告)日：2009-12-22
申请号：US11400731
申请日：2006-04-06
申请人： Hamza Yilmaz , Qi Wang , Minhua Li , Chung-Lin Wu
发明人： Hamza Yilmaz , Qi Wang , Minhua Li , Chung-Lin Wu
IPC分类号： H01L21/46
CPC分类号： H01L21/76251 , H01L21/6835 , H01L24/28 , H01L29/78603 , H01L2224/16 , H01L2224/29111 , H01L2224/2919 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01058 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/10253 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/157 , H01L2924/19041 , H01L2924/19043 , H01L2924/3011 , H01L2924/351 , H01L2924/01026 , H01L2924/01028 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2924/0665
摘要： A method of bonding a semiconductor substrate to a metal substrate is disclosed. In some embodiments the method includes forming a semiconductor device in a semiconductor substrate, the semiconductor device comprising a first surface. The method further includes obtaining a metal substrate. The metal substrate is bonded to the first surface of the semiconductor device, wherein at least a portion of the metal substrate forms an electrical terminal for the semiconductor device.
摘要翻译：公开了将半导体衬底接合到金属衬底的方法。在一些实施例中，该方法包括在半导体衬底中形成半导体器件，该半导体器件包括第一表面。该方法还包括获得金属基底。金属基板结合到半导体器件的第一表面，其中金属基板的至少一部分形成用于半导体器件的电端子。

5. 发明授权

US08039401B2 Structure and method for forming hybrid substrate 有权
标题翻译：用于形成混合基板的结构和方法
公开(公告)号：US08039401B2
公开(公告)日：2011-10-18
申请号：US12332326
申请日：2008-12-10
申请人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
发明人： Qi Wang , Joelle Sharp , Minhua Li , Hui Chen
IPC分类号： H01L21/30 , H01L21/46 , H01L21/20 , H01L21/36 , H01L21/311
CPC分类号： H01L29/045 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02609 , H01L21/0262 , H01L21/02639 , H01L21/02642 , H01L29/7802 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.
摘要翻译：将第一基板和第二基板接合在一起形成单一的混合基板。去除第一衬底的预定部分，以在第一衬底中形成开口，第二衬底的表面区域暴露在第一衬底中。执行相对于第一和第二衬底的晶体取向选择性的选择性外延生长工艺，从而从第二衬底的暴露表面形成外延硅，但不从第一衬底的暴露表面形成外延硅。由第二衬底的暴露表面形成的外延硅具有与第二衬底相同的晶体取向。

6. 发明申请

US20110201179A1 METHOD AND STRUCTURE FOR DIVIDING A SUBSTRATE INTO INDIVIDUAL DEVICES 有权
标题翻译：将基板分解成个体设备的方法和结构
公开(公告)号：US20110201179A1
公开(公告)日：2011-08-18
申请号：US13095584
申请日：2011-04-27
申请人： Minhua Li , Qi Wang , Gordon Sim , Matthew Reynolds , Suku Kim , James J. Murphy , Hamza Yilmaz
发明人： Minhua Li , Qi Wang , Gordon Sim , Matthew Reynolds , Suku Kim , James J. Murphy , Hamza Yilmaz
IPC分类号： H01L21/78
CPC分类号： H01L21/78
摘要： A method for obtaining individual dies from a semiconductor structure is disclosed. The semiconductor structure includes a device layer, and the device layer in turn includes active regions separated by predefined spacings. Thick metal is selectively formed on backside of the device layer such that thick metal is formed on backside of active regions but not on backside of the predefined spacings. The semiconductor structure is then cut along the predefined spacings to separate the active regions with thick metal on their backside into individual dies.
摘要翻译：公开了一种从半导体结构获得单个管芯的方法。半导体结构包括器件层，器件层又包括由预定间隔隔开的有源区。在器件层的背侧选择性地形成厚金属，使得在有源区的背面形成厚金属，而不在预定间隔的背面形成厚金属。然后沿着预定的间隔切割半导体结构，以将其背面的厚金属的活性区域分离成单独的管芯。

7. 发明授权

US07768075B2 Semiconductor die packages using thin dies and metal substrates 有权
标题翻译：使用薄模和金属基板的半导体管芯封装
公开(公告)号：US07768075B2
公开(公告)日：2010-08-03
申请号：US11400729
申请日：2006-04-06
申请人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James J. Murphy , John Robert Diroll
发明人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James J. Murphy , John Robert Diroll
IPC分类号： H01L27/088
CPC分类号： H01L23/3114 , H01L23/481 , H01L24/13 , H01L24/14 , H01L24/81 , H01L25/072 , H01L2224/05568 , H01L2224/05573 , H01L2224/06102 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/1403 , H01L2224/14051 , H01L2224/1411 , H01L2224/8121 , H01L2224/81815 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/30107 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
摘要翻译：公开了一种半导体管芯封装。半导体管芯封装包括金属基板和半导体管芯，其包括第一表面，第一表面包括第一电端子，第二表面，包括第二电端子和至少一个孔。金属基板附接到第二表面。多个导电结构在半导体管芯上，并且包括设置在该至少一个孔中的至少一个导电结构。其他导电结构可以设置在半导体管芯的第一表面上。

8. 发明申请

US20070235886A1 Semiconductor die packages using thin dies and metal substrates 有权
标题翻译：使用薄模和金属基板的半导体管芯封装
公开(公告)号：US20070235886A1
公开(公告)日：2007-10-11
申请号：US11400729
申请日：2006-04-06
申请人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James Murphy , John Diroll
发明人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James Murphy , John Diroll
IPC分类号： H01L23/48
CPC分类号： H01L23/3114 , H01L23/481 , H01L24/13 , H01L24/14 , H01L24/81 , H01L25/072 , H01L2224/05568 , H01L2224/05573 , H01L2224/06102 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/1403 , H01L2224/14051 , H01L2224/1411 , H01L2224/8121 , H01L2224/81815 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/30107 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
摘要翻译：公开了一种半导体管芯封装。半导体管芯封装包括金属基板和半导体管芯，其包括第一表面，第一表面包括第一电端子，第二表面，包括第二电端子和至少一个孔。金属基板附接到第二表面。多个导电结构在半导体管芯上，并且包括设置在该至少一个孔中的至少一个导电结构。其他导电结构可以设置在半导体管芯的第一表面上。

9. 发明授权

US08329508B2 Semiconductor die packages using thin dies and metal substrates 有权
标题翻译：使用薄模和金属基板的半导体管芯封装
公开(公告)号：US08329508B2
公开(公告)日：2012-12-11
申请号：US12823805
申请日：2010-06-25
申请人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James J. Murphy , John Robert Diroll
发明人： Hamza Yilmaz , Steven Sapp , Qi Wang , Minhua Li , James J. Murphy , John Robert Diroll
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L23/3114 , H01L23/481 , H01L24/13 , H01L24/14 , H01L24/81 , H01L25/072 , H01L2224/05568 , H01L2224/05573 , H01L2224/06102 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/1403 , H01L2224/14051 , H01L2224/1411 , H01L2224/8121 , H01L2224/81815 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/30107 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
摘要翻译：公开了一种半导体管芯封装。半导体管芯封装包括金属基板和半导体管芯，其包括第一表面，第一表面包括第一电端子，第二表面，包括第二电端子和至少一个孔。金属基板附接到第二表面。多个导电结构在半导体管芯上，并且包括设置在该至少一个孔中的至少一个导电结构。其他导电结构可以设置在半导体管芯的第一表面上。

10. 发明授权

US08101500B2 Semiconductor device with (110)-oriented silicon 有权
标题翻译：具有（110）取向硅的半导体器件
公开(公告)号：US08101500B2
公开(公告)日：2012-01-24
申请号：US12174030
申请日：2008-07-16
申请人： Qi Wang , Minhua Li , Yuri Sokolov
发明人： Qi Wang , Minhua Li , Yuri Sokolov
IPC分类号： H01L21/30
CPC分类号： H01L29/7813 , H01L21/30608 , H01L21/76254 , H01L29/045 , H01L29/407 , H01L29/41741 , H01L29/66348 , H01L29/66363 , H01L29/66734
摘要： A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support substrate is removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. A vertical semiconductor device structure is formed in and over the (110) silicon layer. The vertical device structure includes a top metal layer and is characterized by a current conduction in a direction. The method includes bonding a second support substrate to the top metal layer and removing the first support substrate using a mechanical grinding and a selective etching process to expose a surface of the P-type heavily doped (110) silicon layer and to allow a metal layer to be formed on the surface.
摘要翻译：在金属衬底上的重掺杂P型（110）半导体层上形成半导体器件的方法包括提供第一支撑衬底并形成覆盖在第一支撑衬底上的P型重掺杂（110）硅层。至少第一支撑衬底的顶层可通过相对于P型重掺杂（110）硅层的选择性蚀刻工艺而移除。在（110）硅层中和上方形成垂直半导体器件结构。垂直装置结构包括顶部金属层，其特征在于沿<110>方向的电流传导。该方法包括使用机械研磨和选择性蚀刻工艺将第二支撑衬底接合到顶部金属层并去除第一支撑衬底，以暴露P型重掺杂（110）硅层的表面并允许金属层在表面上形成。

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