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1. 发明授权

US08101500B2 Semiconductor device with (110)-oriented silicon 有权
标题翻译：具有（110）取向硅的半导体器件
公开(公告)号：US08101500B2
公开(公告)日：2012-01-24
申请号：US12174030
申请日：2008-07-16
申请人： Qi Wang , Minhua Li , Yuri Sokolov
发明人： Qi Wang , Minhua Li , Yuri Sokolov
IPC分类号： H01L21/30
CPC分类号： H01L29/7813 , H01L21/30608 , H01L21/76254 , H01L29/045 , H01L29/407 , H01L29/41741 , H01L29/66348 , H01L29/66363 , H01L29/66734
摘要： A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support substrate is removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. A vertical semiconductor device structure is formed in and over the (110) silicon layer. The vertical device structure includes a top metal layer and is characterized by a current conduction in a direction. The method includes bonding a second support substrate to the top metal layer and removing the first support substrate using a mechanical grinding and a selective etching process to expose a surface of the P-type heavily doped (110) silicon layer and to allow a metal layer to be formed on the surface.
摘要翻译：在金属衬底上的重掺杂P型（110）半导体层上形成半导体器件的方法包括提供第一支撑衬底并形成覆盖在第一支撑衬底上的P型重掺杂（110）硅层。至少第一支撑衬底的顶层可通过相对于P型重掺杂（110）硅层的选择性蚀刻工艺而移除。在（110）硅层中和上方形成垂直半导体器件结构。垂直装置结构包括顶部金属层，其特征在于沿<110>方向的电流传导。该方法包括使用机械研磨和选择性蚀刻工艺将第二支撑衬底接合到顶部金属层并去除第一支撑衬底，以暴露P型重掺杂（110）硅层的表面并允许金属层在表面上形成。

2. 发明申请

US20110062560A1 BPSG FILM DEPOSITION WITH UNDOPED CAPPING 审中-公开
标题翻译： BPSG膜沉积与不合适的CAPPING
公开(公告)号：US20110062560A1
公开(公告)日：2011-03-17
申请号：US12953258
申请日：2010-11-23
申请人： Yuri Sokolov
发明人： Yuri Sokolov
IPC分类号： H01L29/06 , H01L21/31
CPC分类号： H01L21/3105 , H01L21/02129 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/31144 , H01L21/31612 , H01L21/31625 , H01L21/76828 , H01L21/76829
摘要： Semiconductor devices containing a CVD BPSG layer and an undoped CVD oxide cap layer are described. The cap layer can be any silicon oxide material with a thickness between about 50 Å and about 350 Å. The cap layer may be formed using a low temperature CVD process that is controlled for density by adjusting the amount of silicon precursor in the gas-phase. In some embodiments, the cap layer is deposited on the BPSG layer followed immediately by the BPSG film deposition prior to any annealing of the BPSG layer. The cap layer may prevent dopant out-diffusion and/or out-gassing during storage and high-temperature annealing, and moisture penetration into the BPSG layer, as well as suppress defect nucleation on the as-deposited BPSG surface and defect formation during high temperature annealing, while still allowing flow ability of the BPSG layer. Other embodiments are also described.
摘要翻译：描述了包含CVD BPSG层和未掺杂的CVD氧化物覆盖层的半导体器件。盖层可以是厚度在约和之间的任何氧化硅材料。可以使用通过调节气相中硅前体的量来控制密度的低温CVD工艺来形成覆盖层。在一些实施例中，在BPSG层的任何退火之前，将盖层沉积在BPSG层上，随后通过BPSG膜沉积。盖层可以防止在储存和高温退火期间的掺杂剂扩散和/或排出气体，以及水分渗透到BPSG层中，并且抑制沉积的BPSG表面上的缺陷成核和高温下的缺陷形成退火，同时仍然允许BPSG层的流动能力。还描述了其它实施例。

3. 发明申请

US20090179259A1 SEMICONDUCTOR DEVICE WITH (110)-ORIENTED SILICON 有权
标题翻译：具有（110） - 导电硅的半导体器件
公开(公告)号：US20090179259A1
公开(公告)日：2009-07-16
申请号：US12174030
申请日：2008-07-16
申请人： QI WANG , Minhua Li , Yuri Sokolov
发明人： QI WANG , Minhua Li , Yuri Sokolov
IPC分类号： H01L29/78 , H01L21/36
CPC分类号： H01L29/7813 , H01L21/30608 , H01L21/76254 , H01L29/045 , H01L29/407 , H01L29/41741 , H01L29/66348 , H01L29/66363 , H01L29/66734
摘要： A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support substrate is removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. A vertical semiconductor device structure is formed in and over the (110) silicon layer. The vertical device structure includes a top metal layer and is characterized by a current conduction in a direction. The method includes bonding a second support substrate to the top metal layer and removing the first support substrate using a mechanical grinding and a selective etching process to expose a surface of the P-type heavily doped (110) silicon layer and to allow a metal layer to be formed on the surface
摘要翻译：在金属衬底上的重掺杂P型（110）半导体层上形成半导体器件的方法包括提供第一支撑衬底并形成覆盖在第一支撑衬底上的P型重掺杂（110）硅层。至少第一支撑衬底的顶层可通过相对于P型重掺杂（110）硅层的选择性蚀刻工艺而移除。在（110）硅层中和上方形成垂直半导体器件结构。垂直装置结构包括顶部金属层，其特征在于沿<110>方向的电流传导。该方法包括使用机械研磨和选择性蚀刻工艺将第二支撑衬底接合到顶部金属层并去除第一支撑衬底，以暴露P型重掺杂（110）硅层的表面并允许金属层在表面上形成

4. 发明申请

US20120086051A1 SEMICONDUCTOR DEVICE WITH (110)-ORIENTED SILICON 有权
标题翻译：具有（110） - 导电硅的半导体器件
公开(公告)号：US20120086051A1
公开(公告)日：2012-04-12
申请号：US13328179
申请日：2011-12-16
申请人： Qi Wang , Minhua Li , Yuri Sokolov
发明人： Qi Wang , Minhua Li , Yuri Sokolov
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L21/30608 , H01L21/76254 , H01L29/045 , H01L29/407 , H01L29/41741 , H01L29/66348 , H01L29/66363 , H01L29/66734
摘要： A vertical semiconductor device includes a bottom metal layer and a first P-type semiconductor layer overlying the bottom metal layer. The first P-type semiconductor layer is characterized by a surface crystal orientation of (110) and a first conductivity. The first P-type semiconductor layer is heavily doped. The vertical semiconductor device also includes a second P-type semiconductor layer overlying the first P-type semiconductor layer. The second semiconductor layer has a surface crystal orientation of (110) and is characterized by a lower conductivity than the first conductivity. The vertical semiconductor device also has a top metal layer overlying the second P-type semiconductor layer. A current conduction from the top metal layer to the bottom metal layer and through the second p-type semiconductor layer is characterized by a hole mobility along a crystalline orientation and on (110) crystalline plane.
摘要翻译：垂直半导体器件包括底金属层和覆盖底部金属层的第一P型半导体层。第一P型半导体层的特征在于（110）的表面晶体取向和第一导电性。第一P型半导体层是重掺杂的。垂直半导体器件还包括覆盖第一P型半导体层的第二P型半导体层。第二半导体层具有（110）的表面晶体取向，其特征在于比第一导电性低的导电性。垂直半导体器件还具有覆盖第二P型半导体层的顶部金属层。从顶部金属层到底部金属层和通过第二p型半导体层的电流传导的特征在于沿着<110>晶体取向和在（110）晶面上的空穴迁移率。

5. 发明申请

US20090250793A1 BPSG FILM DEPOSITION WITH UNDOPED CAPPING 审中-公开
标题翻译： BPSG膜沉积与不合适的CAPPING
公开(公告)号：US20090250793A1
公开(公告)日：2009-10-08
申请号：US12099348
申请日：2008-04-08
申请人： Yuri Sokolov
发明人： Yuri Sokolov
IPC分类号： H01L23/58 , H01L21/31
CPC分类号： H01L21/3105 , H01L21/02129 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/31144 , H01L21/31612 , H01L21/31625 , H01L21/76828 , H01L21/76829
摘要： Semiconductor devices containing a CVD BPSG layer and an undoped CVD oxide cap layer are described. The cap layer can be any silicon oxide material with a thickness between about 50 Å and about 350 Å. The cap layer may be formed using a low temperature CVD process that is controlled for density by adjusting the amount of silicon precursor in the gas-phase. In some embodiments, the cap layer is deposited on the BPSG layer followed immediately by the BPSG film deposition prior to any annealing of the BPSG layer. The cap layer may prevent dopant out-diffusion and/or out-gassing during storage and high-temperature annealing, and moisture penetration into the BPSG layer, as well as suppress defect nucleation on the as-deposited BPSG surface and defect formation during high temperature annealing, while still allowing flow ability of the BPSG layer. Other embodiments are also described.
摘要翻译：描述包含CVD BPSG层和未掺杂的CVD氧化物覆盖层的半导体器件。盖层可以是厚度在约和之间的任何氧化硅材料。可以使用通过调节气相中硅前体的量来控制密度的低温CVD工艺来形成覆盖层。在一些实施例中，在BPSG层的任何退火之前，将盖层沉积在BPSG层上，随后通过BPSG膜沉积。盖层可以防止在储存和高温退火期间的掺杂剂扩散和/或排出气体，以及水分渗透到BPSG层中，并且抑制沉积的BPSG表面上的缺陷成核和高温下的缺陷形成退火，同时仍然允许BPSG层的流动能力。还描述了其它实施例。

6. 发明申请

US20070179391A1 METHOD AND APPARATUS FOR THE COLLECTION OF PHYSIOLOGICAL ELECTRICAL POTENTIALS 有权
标题翻译：收集生理电位的方法和装置
公开(公告)号：US20070179391A1
公开(公告)日：2007-08-02
申请号：US11686549
申请日：2007-03-15
申请人： Isaac KURTZ , Yuri SOKOLOV
发明人： Isaac KURTZ , Yuri SOKOLOV
IPC分类号： A61B5/04
CPC分类号： A61B5/0476 , A61B5/04004 , A61B5/0428 , A61B5/0488 , A61B5/6843
摘要： An apparatus, method and system for collection of physiological electrical potential signals. In one embodiment, an apparatus for use in measuring electrical potentials in a subject (e.g. an animal or a human), having an amplifier being removably mountable to a ground electrode and electrically coupled to at least two signal electrodes, wherein the amplifier is configured to communicate with a signal processing device and indicate if one of the at least two signal electrodes is poorly affixed to, or detached from, said subject. In another embodiment, the at least two signal electrodes comprise a first signal electrode and a second signal electrode, and the amplifier is configured to detect differential electrical potential signals presented by the first signal electrode and the second signal electrode, amplify the differential electrical potential signals by a predetermined gain level to generate an amplified signal, and transmit the amplified signal to the signal processing device.
摘要翻译：用于收集生理电位信号的装置，方法和系统。在一个实施例中，一种用于测量受试者（例如，动物或人）中的电位的装置，具有可移除地安装到接地电极并电耦合到至少两个信号电极的放大器，其中放大器被配置为与信号处理装置通信，并且指示所述至少两个信号电极中的一个是否不良地附着于所述被摄体或从所述被摄体分离。在另一个实施例中，至少两个信号电极包括第一信号电极和第二信号电极，并且放大器被配置为检测由第一信号电极和第二信号电极呈现的差分电位信号，放大差分电位信号通过预定的增益电平来产生放大的信号，并将放大的信号发送到信号处理装置。

7. 发明申请

US20070121675A1 System for data collection through an alternate current supply network 失效
标题翻译：通过备用电源网络收集数据的系统
公开(公告)号：US20070121675A1
公开(公告)日：2007-05-31
申请号：US10578117
申请日：2004-10-07
申请人： Yuri Sokolov , Valery Saharov
发明人： Yuri Sokolov , Valery Saharov
IPC分类号： H04J13/00
CPC分类号： H04B3/54 , H04B2203/542
摘要： The invention relates to electrical network communications engineering and can be used in systems for automatic data collection from electric, heat, water, gas meters etc. The technical result is significant simplification of the interior structure of slave units increased noise stability of a system. This result is achieved by using zero crossing points of the fundamental harmonic of system supply line voltage as character synchronization events.
摘要翻译：本发明涉及电网通信工程，可用于从电，热，水，煤气表等自动数据采集的系统中。技术结果显着简化了从单元的内部结构，提高了系统的噪声稳定性。该结果通过使用系统电源线电压的基波的零交叉点作为字符同步事件来实现。

8. 发明授权

US07206625B2 Method and apparatus for the collection of physiological electrical potentials 有权
标题翻译：用于收集生理电位的方法和装置
公开(公告)号：US07206625B2
公开(公告)日：2007-04-17
申请号：US10690630
申请日：2003-10-23
申请人： Isaac Z. Kurtz , Yuri Sokolov
发明人： Isaac Z. Kurtz , Yuri Sokolov
IPC分类号： A61B5/04
CPC分类号： A61B5/0476 , A61B5/04004 , A61B5/0428 , A61B5/0488 , A61B5/6843
摘要： An invention is disclosed that provides an apparatus, method and system for the collection of physiological electrical potential signals. In one embodiment, the apparatus comprises integrating amplifier and an electrode into a combined unit for attaching or affixing to a subject (e.g., an animal or a human). Resulting from the extremely small or short connection between the conductive portion of the electrode and the amplifier, significantly less noise is introduced into the signal detected by the amplifier. The amplifier thus amplifies a signal with a much higher signal-to-noise ratio as compared with conventional electrode to lead wire to amplifier arrangements.
摘要翻译：公开了一种提供用于收集生理电位信号的装置，方法和系统的发明。在一个实施例中，该装置包括将放大器和电极集成到用于附着或贴附到对象（例如动物或人）的组合单元中。由于电极的导电部分和放大器之间的极小或短的连接导致放大器检测到的信号的噪声明显较小。因此与常规电极相比，放大器具有比传统电极高得多的信噪比的信号，以将引线连接到放大器布置。

9. 发明申请

US20070081600A1 Method of geometric harmonic signal modulation 失效
标题翻译：几何谐波信号调制方法
公开(公告)号：US20070081600A1
公开(公告)日：2007-04-12
申请号：US10578116
申请日：2004-10-07
申请人： Yuri Sokolov , Valery Saharov
发明人： Yuri Sokolov , Valery Saharov
IPC分类号： H04L27/00
CPC分类号： H04L27/18 , H04B3/542 , H04B2203/542 , H04B2203/5433 , H04B2203/5458 , H04L27/28
摘要： The invention relates to electrical network communications engineering and can be used for automatic data acquisition from intrusion and fire-alarm sensors, electric meters, heat, water and gas consumption meters and from the fiscal memory of cash control monitors. Said invention makes it possible to substentially reduce the energy consumption by the slave nodes of a system and/or increase the range of action thereof. In order to encode each symbol of transmitted data, a random or pseudorandom set of differences of initial pairs of nearest harmonic pairs are used. Said difference sets of the initial phases are selected in such a way that the peak factor of an added signal is minimised. When a fire-alarm sensor is actuated, it is sufficient to transmit only one symbol to an alarm panel which, unambiguously identifies the location of the active sensor and as a rule is embodied in the form of a conventional number or address pre-allocated to said sensor.
摘要翻译：本发明涉及电网通信工程，可用于从入侵和火灾报警传感器，电表，热水，水和气体消耗量表以及现金控制监视器的财务记录中进行自动数据采集。所述发明使得可以可靠地降低系统的从节点的能量消耗和/或增加其作用范围。为了对发送数据的每个符号进行编码，使用最初对的最近谐波对的随机或伪随机差分集合。所述初始相位的差值集合被选择为使得附加信号的峰值因子最小化。当启动火灾报警传感器时，仅将一个符号传输到报警面板就足够了，该报警面板明确地标识有源传感器的位置，并且通常以预先分配给的传统数字或地址的形式来体现传感器。

10. 发明申请

US20050027519A1 System and method for processing low signal-to-noise ratio signals 有权
标题翻译：用于处理低信噪比信号的系统和方法
公开(公告)号：US20050027519A1
公开(公告)日：2005-02-03
申请号：US10883959
申请日：2004-07-06
申请人： Xinde Li , Yuri Sokolov , Hans Kunov
发明人： Xinde Li , Yuri Sokolov , Hans Kunov
IPC分类号： A61B5/12 , G10L21/02 , G10L21/06 , G10L21/00
CPC分类号： A61B5/121 , G10L21/02 , G10L21/0232 , G10L21/06
摘要： A system and method for use in a real time system and for processing a signal with a low signal-to-noise ratio (SNR). The system comprises a model for modeling an expected signal and a filter that uses the model for filtering the signal. The filter is used for generating a prediction of the signal and an error variance matrix. The system further comprises an adaptive element for modifying the error variance matrix such that the bandwidth of the filter is widened, wherein the filter behaves like an adaptive filter.
摘要翻译：一种用于实时系统并用于处理具有低信噪比（SNR）的信号的系统和方法。该系统包括用于对期望信号建模的模型和使用该模型对该信号进行滤波的滤波器。滤波器用于产生信号的预测和误差方差矩阵。该系统还包括用于修改误差方差矩阵的自适应元件，使得滤波器的带宽变宽，其中滤波器的行为像自适应滤波器。

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