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1. 发明授权

US09442758B1 Dynamic processor core switching 有权
标题翻译：动态处理器核心切换
公开(公告)号：US09442758B1
公开(公告)日：2016-09-13
申请号：US12356761
申请日：2009-01-21
申请人： Premanand Sakarda , Scott B. Peirce , Jia Bao , Marlon Moncrieffe , Priya Vaidya , Michael D Rosenzweig , Minda Zhang , Palanisamy Mohanraj
发明人： Premanand Sakarda , Scott B. Peirce , Jia Bao , Marlon Moncrieffe , Priya Vaidya , Michael D Rosenzweig , Minda Zhang , Palanisamy Mohanraj
IPC分类号： G06F9/40 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4856 , B60K7/0007 , B60K17/043 , B60K17/30 , B60K2007/0046 , B60K2007/0061 , B60L2220/46 , G06F9/5088
摘要： Dynamic processor core switching is described. In embodiments, a multi-core processor system can include a first processor core that executes computer instructions at a first processing rate, and can include at least a second processor core that executes the computer instructions at a second processing rate, where the second processing rate is different than the first processing rate. A core profiler can generate system profile data that is evaluated to determine when a core-switch manager initiates switching execution of the computer instructions from the first processor core to the second processor core while the computer instructions are being executed.
摘要翻译：描述了动态处理器核心交换。在实施例中，多核处理器系统可以包括以第一处理速率执行计算机指令的第一处理器核心，并且可以包括以第二处理速率执行计算机指令的至少第二处理器核心，与第一个处理速度不同。核心分析器可以生成被评估的系统简档数据，以便在计算机指令被执行时核心交换管理器何时启动计算机指令从第一处理器核心切换到第二处理器核心的执行。

2. 发明授权

US08689021B1 System and method for selecting a power management configuration in a multi-core environment according to various operating conditions such as voltage, frequency, power mode, and utilization factor varied on a per-core basis 失效
标题翻译：根据各种操作条件（如电压，频率，功率模式和利用率）在多核环境中选择电源管理配置的系统和方法在每个核心基础上变化
公开(公告)号：US08689021B1
公开(公告)日：2014-04-01
申请号：US13216928
申请日：2011-08-24
申请人： Yu Bai , Marlon Moncrieffe , Bryan Morgan , Scott B. Peirce , Premanand Sakarda
发明人： Yu Bai , Marlon Moncrieffe , Bryan Morgan , Scott B. Peirce , Premanand Sakarda
IPC分类号： G06F1/00
CPC分类号： G06F1/28 , G06F1/26 , G06F1/329 , G06F9/50 , G06F9/5094 , Y02D10/22 , Y02D10/24
摘要： Some of the embodiments of the present disclosure provide a method comprising generating a plurality of power profiles for a corresponding plurality of processing cores, wherein each power profile of the plurality of power profiles includes power consumptions of a corresponding processing core under various operating conditions; generating a plurality of candidate configurations, wherein each candidate configuration comprises corresponding candidate operating conditions for the plurality of processing cores; and based at least in part on the plurality of power profiles, selecting a first candidate configuration of the plurality of candidate configurations for managing the plurality of processing cores. Other embodiments are also described and claimed.
摘要翻译：本公开的一些实施例提供了一种方法，包括为相应的多个处理核生成多个功率曲线，其中多个功率曲线的每个功率曲线包括在各种操作条件下对应的处理核的功耗; 生成多个候选配置，其中每个候选配置包括用于所述多个处理核的对应候选操作条件; 并且至少部分地基于所述多个功率简档，选择用于管理所述多个处理核心的所述多个候选配置的第一候选配置。还描述和要求保护其他实施例。

3. 发明申请

US20060123253A1 System and method for adaptive power management 有权
标题翻译：自适应电源管理系统和方法
公开(公告)号：US20060123253A1
公开(公告)日：2006-06-08
申请号：US11007098
申请日：2004-12-07
申请人： Bryan Morgan , Premanand Sakarda , Priya Vaidya , Yi Ge , Zhou Gao , Swee-chin Pang , Manoj Thadani , Canhui Yuan
发明人： Bryan Morgan , Premanand Sakarda , Priya Vaidya , Yi Ge , Zhou Gao , Swee-chin Pang , Manoj Thadani , Canhui Yuan
IPC分类号： G06F1/26
CPC分类号： G06F1/3228 , G06F1/324 , Y02D10/126
摘要： A processing system may include a performance monitoring unit (PMU), a machine accessible medium, and a processor responsive to the PMU and the machine accessible medium. Instructions encoded in the machine accessible medium, when executed by the processor, may determine whether performance details for the processing system should be collected, based at least in part on a predetermined monitoring policy for the processing system. The instructions may generate performance data for the processing system, based at least in part on data obtained from the PMU. The instructions may determine whether the processing system should be reconfigured, based at least in part on the performance data and a power policy profile for the processing system. The instructions may automatically adjust power consumption of the processing system by using the PMU to reconfigure the processing system. Other embodiments are described and claimed.
摘要翻译：处理系统可以包括性能监视单元（PMU），机器可访问介质和响应于PMU和机器可访问介质的处理器。在机器可访问介质中编码的指令在由处理器执行时可以至少部分地基于用于处理系统的预定监视策略来确定是否应该收集处理系统的性能细节。该指令可以至少部分地基于从PMU获得的数据来生成处理系统的性能数据。所述指令可以至少部分地基于所述处理系统的性能数据和功率策略简档来确定所述处理系统是否应被重新配置。该指令可以通过使用PMU重新配置处理系统来自动调整处理系统的功耗。描述和要求保护其他实施例。

4. 发明授权

US08281160B1 Method and system for selecting an operating frequency for a chip to provide a desired overall power dissipation value for the chip 有权
标题翻译：用于选择芯片的工作频率以为芯片提供期望的总功耗值的方法和系统
公开(公告)号：US08281160B1
公开(公告)日：2012-10-02
申请号：US12400604
申请日：2009-03-09
申请人： Yu Bai , Priya Vaidya , Premanand Sakarda
发明人： Yu Bai , Priya Vaidya , Premanand Sakarda
IPC分类号： G06F1/00
CPC分类号： G06F1/3228 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Methods, apparatus, and computer program products for implementing power management within Systems on Chips (SOCs). The method includes selecting an operating frequency for a chip from an operating frequency point set that provides a desired overall power dissipation value.
摘要翻译：用于在芯片系统（SOC）中实现电源管理的方法，设备和计算机程序产品。该方法包括从提供期望的总功耗值的工作频点集中选择芯片的工作频率。

5. 发明申请

US20060123252A1 System and method for adaptive power management 有权
标题翻译：自适应电源管理系统和方法
公开(公告)号：US20060123252A1
公开(公告)日：2006-06-08
申请号：US11006917
申请日：2004-12-07
申请人： Priya Vaidya , Premanand Sakarda , Bryan Morgan , Yi Ge
发明人： Priya Vaidya , Premanand Sakarda , Bryan Morgan , Yi Ge
IPC分类号： G06F1/30
CPC分类号： G06F1/3228 , G06F1/324 , Y02D10/126
摘要： A disclosed method involves initializing a performance profiler of a processing system. The performance profiler may include performance profile parameters for a power management policy for the processing system. The method also involves retrieving performance metrics for the processing system from a performance monitoring unit (PMU) of the processing system, in response to a determination that performance details should be collected. A current performance state of the processing system may be determined, based at least in part on the performance profile parameters and the performance metrics from the PMU. The current performance state may then be communicated to a policy manager of the processing system. Other embodiments are disclosed and claimed.
摘要翻译：所公开的方法涉及初始化处理系统的性能分析器。性能分析器可以包括用于处理系统的电源管理策略的性能简档参数。该方法还涉及从处理系统的性能监视单元（PMU）检索处理系统的性能指标，以响应于应该收集性能细节的确定。可以至少部分地基于来自PMU的性能简档参数和性能度量来确定处理系统的当前性能状态。可以将当前的性能状态传送给处理系统的策略管理器。公开和要求保护其他实施例。

6. 发明授权

US08610727B1 Dynamic processing core selection for pre- and post-processing of multimedia workloads 失效
标题翻译：多媒体工作负载的前处理和后处理的动态处理核心选择
公开(公告)号：US08610727B1
公开(公告)日：2013-12-17
申请号：US12404777
申请日：2009-03-16
申请人： Jia Bao , Ke Ding , Premanand Sakarda
发明人： Jia Bao , Ke Ding , Premanand Sakarda
IPC分类号： G06F15/16
CPC分类号： G06F9/505 , G06F9/5044 , G06F2209/501
摘要： Apparatus having corresponding methods comprise a processing core performance monitoring module adapted to receive indications of performance levels of a plurality of processing cores, the plurality of processing cores comprising a central processing unit (CPU), a video accelerator, and a graphics accelerator; a video accelerator performance monitoring module adapted to receive an indication of a performance level of the video accelerator; a graphics accelerator performance monitoring module adapted to receive an indication of a performance level of the graphics accelerator; and a processor core management module adapted to dynamically allocate at least one of a pre-processing task and a post-processing task of a multimedia workload to any one of the video accelerator, the graphics accelerator, and the CPUprocessing cores based on the performance levels of the video accelerator, the graphics accelerator, and the CPU.
摘要翻译：具有相应方法的装置包括处理核心性能监视模块，适于接收多个处理核心的性能级别的指示，所述多个处理核心包括中央处理单元（CPU），视频加速器和图形加速器; 视频加速器性能监视模块，适于接收视频加速器的性能水平的指示; 图形加速器性能监视模块，适于接收图形加速器的性能水平的指示; 以及处理器核心管理模块，其适于基于所述性能水平将所述多媒体工作负载的预处理任务和后处理任务中的至少一个动态地分配给所述视频加速器，所述图形加速器和所述CPU处理核中的任何一个的视频加速器，图形加速器和CPU。

7. 发明授权

US09069553B2 Switching tasks between heterogeneous cores 有权
标题翻译：在异构核心之间切换任务
公开(公告)号：US09069553B2
公开(公告)日：2015-06-30
申请号：US13604407
申请日：2012-09-05
申请人： Ofer Zaarur , Premanand Sakarda
发明人： Ofer Zaarur , Premanand Sakarda
IPC分类号： G06F9/46 , G06F1/32 , G06F9/48 , G06F9/50 , G06F9/44
CPC分类号： G06F1/3287 , G06F1/329 , G06F1/3293 , G06F9/44 , G06F9/4856 , G06F9/5094 , Y02D10/122 , Y02D10/171 , Y02D10/22 , Y02D10/24 , Y02D10/32
摘要： The present disclosure describes techniques for switching tasks between heterogeneous cores. In some aspects it is determined that a task being executed by a first core of a processor can be executed by a second core of a processor, the second core having an instruction set that is different from that of the first core, and execution of the task is switched from the first core to the second core effective to decrease an amount of energy consumed by the processor.
摘要翻译：本公开描述了用于在异构核之间切换任务的技术。在一些方面，确定由处理器的第一核执行的任务可以由处理器的第二核执行，第二核具有与第一核不同的指令集，并且执行任务从第一核心切换到第二核心有效地减少处理器消耗的能量的量。

8. 发明授权

US08402293B2 Power management in electronic systems 有权
公开(公告)号：US08402293B2
公开(公告)日：2013-03-19
申请号：US13171157
申请日：2011-06-28
申请人： Bryan C. Morgan , Priya N. Vaidya , Premanand Sakarda , Marlon A. Moncrieffe
发明人： Bryan C. Morgan , Priya N. Vaidya , Premanand Sakarda , Marlon A. Moncrieffe
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3246 , G06F1/3275 , Y02D10/13 , Y02D10/14
摘要： In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.

9. 发明申请

US20090172432A1 Power management in electronic systems 有权
标题翻译：电子系统中的电源管理
公开(公告)号：US20090172432A1
公开(公告)日：2009-07-02
申请号：US12006064
申请日：2007-12-28
申请人： Bryan C. Morgan , Priya N. Vaidya , Premanand Sakarda , Marlon A. Moncrieffe
发明人： Bryan C. Morgan , Priya N. Vaidya , Premanand Sakarda , Marlon A. Moncrieffe
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/3246 , G06F1/3275 , Y02D10/13 , Y02D10/14
摘要： In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
摘要翻译：在一个实施例中，电子设备包括耦合到处理器的至少一个处理器和计算机可读介质，并且包括编码在计算机可读介质中的逻辑指令，其中当在处理系统中执行时，指令使处理系统执行操作包括在电子系统中初始化直接存储器访问分析器，其中所述直接存储器访问耦合到所述电子系统中的策略管理器，测量所述电子系统的至少一个存储器消耗特性，将所述至少一个存储器消耗特性传达到电子系统的策略管理器，并且使用至少一个存储器消耗特性来调整电子系统的功率状态。

10. 发明授权

US09158355B2 Dynamic core switching 有权
标题翻译：动态核心切换
公开(公告)号：US09158355B2
公开(公告)日：2015-10-13
申请号：US12215760
申请日：2008-06-30
申请人： Sehat Sutardja , Hong-Yi Chen , Premanand Sakarda , Mark N. Fullerton , Jay Heeb
发明人： Sehat Sutardja , Hong-Yi Chen , Premanand Sakarda , Mark N. Fullerton , Jay Heeb
IPC分类号： G06F15/76 , G06F1/32 , G06F9/30 , G06F9/38 , G06F9/46 , G06F9/48
CPC分类号： G06F1/3293 , G06F1/3203 , G06F1/3287 , G06F1/329 , G06F9/3017 , G06F9/30174 , G06F9/30189 , G06F9/38 , G06F9/3885 , G06F9/461 , G06F9/4856 , G06F9/4893 , Y02D10/122 , Y02D10/171 , Y02D10/24 , Y02D10/32 , Y02D50/20
摘要： A core switching system includes a mode switching module that receives a switch signal to switch operation between a first mode and a second mode. During the first mode, instructions associated with applications are executed by a first asymmetric core, and a second asymmetric core is inactive. During the second mode, the instructions are executed by the second asymmetric core, and the first asymmetric core is inactive. A core activation module stops processing of the applications by the first asymmetric core after interrupts are disabled. A state transfer module transfers a state of the first asymmetric core to the second asymmetric core. The core activation module allows the second asymmetric core to resume execution of the instructions and the interrupts are enabled.
摘要翻译：核心交换系统包括模式切换模块，其接收切换信号以在第一模式和第二模式之间切换操作。在第一模式期间，与应用相关联的指令由第一不对称核执行，而第二非对称核是不活动的。在第二模式期间，指令由第二非对称核执行，第一非对称核是不活动的。核心激活模块在禁止中断之后停止第一个非对称核心处理应用程序。状态转移模块将第一不对称核的状态转移到第二不对称核。核心激活模块允许第二非对称核继续执行指令，中断被使能。

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