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1. 发明申请

US20120212212A1 VOLTAGE DETECTING CIRCUIT 有权
标题翻译：电压检测电路
公开(公告)号：US20120212212A1
公开(公告)日：2012-08-23
申请号：US13396235
申请日：2012-02-14
申请人： Po-Hung CHEN , Makoto TAKAMIYA , Takayasu SAKURAI
发明人： Po-Hung CHEN , Makoto TAKAMIYA , Takayasu SAKURAI
IPC分类号： G01R19/155
CPC分类号： G01R19/16519 , G01F3/20
摘要： In a voltage detecting circuit, a transistor is configured as a P-type MOSFET, and includes a source connected with an input terminal, a gate connected with a ground voltage terminal and a drain connected with an output terminal. A transistor is configured as a P-type MOSFET, and includes a gate and a source connected with the output terminal and a drain connected with the ground terminal. Gate width and gate length of the transistor and gate width and gate length of the transistor are adjusted so that source-drain current flowing between the source and the drain of the transistor becomes equal to source-drain current flowing between the source and the drain of the transistor when the voltage applied to the input terminal is set to be preset trigger voltage. This configuration accomplishes detecting that the input voltage exceeds the trigger voltage with simple configuration.
摘要翻译：在电压检测电路中，晶体管被配置为P型MOSFET，并且包括与输入端连接的源极，与接地电压端子连接的栅极和与输出端子连接的漏极。晶体管被配置为P型MOSFET，并且包括与输出端连接的栅极和源极以及与接地端子连接的漏极。调节晶体管的栅极宽度和栅极长度，并调整晶体管的栅极宽度和栅极长度，使得在晶体管的源极和漏极之间流动的源极 - 漏极电流变得等于在源极和漏极之间流动的源极 - 漏极电流当施加到输入端子的电压被设置为预置触发电压时，晶体管。该配置通过简单的配置实现了输入电压超过触发电压的检测。

2. 发明申请

US20110298534A1 INTEGRATED CIRCUIT DEVICE 有权
标题翻译：集成电路设备
公开(公告)号：US20110298534A1
公开(公告)日：2011-12-08
申请号：US13093343
申请日：2011-04-25
申请人： Ken TAKEUCHI , Teruyoshi HATANAKA , Koichi ISHIDA , Tadashi YASUFUKU , Makoto TAKAMIYA , Takayasu SAKURAI
发明人： Ken TAKEUCHI , Teruyoshi HATANAKA , Koichi ISHIDA , Tadashi YASUFUKU , Makoto TAKAMIYA , Takayasu SAKURAI
IPC分类号： G05F1/10
CPC分类号： H01L25/0657 , H01L25/18 , H01L2225/06565 , H01L2924/0002 , H01L2924/00
摘要： The channel number detecting circuit 50 detects the operation channel number Nch based on the the output terminal voltage Vpgm after falling down when the output terminal voltage Vpgm falls down during the voltage boosting control, and the switching control circuit 70 generates the control clock signal CLK having the on-time and the off-time adjusted based on the operation channel number Nch and performs the voltage boosting control using generating control clock signal CLK. The voltage boosting control is properly performed based on the operation channel number Nch when the operation channel number Nch increase during performing the voltage boosting control. Thus boosting the power supply voltage Vdd up to the voltage V2 is accomplished.
摘要翻译：通道号检测电路50在升压控制期间当输出端子电压Vpgm下降时，基于降低后的输出端子电压Vpgm来检测运算通道数Nch，切换控制电路70生成具有基于操作通道数Nch调节导通时间和关断时间，并使用产生控制时钟信号CLK来执行升压控制。在执行升压控制时，当操作通道数Nch增加时，基于操作通道数Nch适当地执行升压控制。从而实现将电源电压Vdd提高到电压V2。

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