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    • 1. 发明授权
    • Method and apparatus for detecting presence of errors in data transmitted between components in a data storage system using an I2C protocol
    • 用于检测在使用I2C协议的数据存储系统中在组件之间传输的数据中存在错误的方法和装置
    • US07502992B2
    • 2009-03-10
    • US11394919
    • 2006-03-31
    • Phillip LeefDouglas SullivanStephen StricklandAlex Sanville
    • Phillip LeefDouglas SullivanStephen StricklandAlex Sanville
    • G06F11/00G01R31/28
    • H04L1/0061H04L1/16H04L2001/0094
    • A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.
    • 数据存储系统包括存储处理器,其被配置为代表外部设备对存储阵列执行加载和存储操作。 数据存储系统还包括控制器,其通过存储处理器耦合到存储阵列时隔离外部设备之间的通信。 控制器还保持一组寄存器,其存储与数据存储系统相关联的信息,并允许存储处理器经由I2C总线访问寄存器。 系统利用错误检测程序来检测在控制器和存储处理器之间传输的数据中的错误。 在运行期间,在寄存器写入或读取过程期间,使用I2C总线在控制器和存储处理器之间传输校验和值。 控制器和存储处理器利用错误检测过程中的校验和值来检测由I2C总线传输数据的数据错误。
    • 2. 发明申请
    • Method and apparatus for detecting the presence of errors in data transmitted between components in a data storage system using an I2C protocol
    • 用于检测在使用I2C协议的数据存储系统中在组件之间传输的数据中存在错误的方法和装置
    • US20070234136A1
    • 2007-10-04
    • US11394919
    • 2006-03-31
    • Phillip LeefDouglas SullivanStephen StricklandAlex Sanville
    • Phillip LeefDouglas SullivanStephen StricklandAlex Sanville
    • G06F11/00
    • H04L1/0061H04L1/16H04L2001/0094
    • A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.
    • 数据存储系统包括存储处理器,其被配置为代表外部设备对存储阵列执行加载和存储操作。 数据存储系统还包括控制器,其通过存储处理器耦合到存储阵列时隔离外部设备之间的通信。 控制器还保持一组寄存器,其存储与数据存储系统相关联的信息,并允许存储处理器经由I2C总线访问寄存器。 系统利用错误检测程序来检测在控制器和存储处理器之间传输的数据中的错误。 在运行期间,在寄存器写入或读取过程期间,使用I2C总线在控制器和存储处理器之间传输校验和值。 控制器和存储处理器利用错误检测过程中的校验和值来检测由I2C总线传输数据的数据错误。
    • 3. 发明授权
    • Techniques for controlling a network switch of a data storage system
    • 用于控制数据存储系统的网络交换机的技术
    • US08031722B1
    • 2011-10-04
    • US12059127
    • 2008-03-31
    • Alex SanvilleDouglas SullivanStephen Strickland
    • Alex SanvilleDouglas SullivanStephen Strickland
    • H04L12/28H04L12/16
    • H04L12/413H04L49/50H04L67/1097
    • A technique controls a network switch having a set of ports. The technique involves configuring the network switch to provide an initial set of communications paths between the ports. The initial set of communications paths defines an initial communications path topology within the network switch. The technique further involves receiving a configuration command which identifies a particular operating mode of the data storage system after configuring the network switch to provide the initial set of communications paths within the network switch. The technique further involves reconfiguring the network switch to provide a new set of communications paths between the ports in response to the configuration command. The new set of communications paths (i) defines a new communications path topology within the network switch, the new communications path topology being different than the initial communications path topology, and (ii) supports the particular operating mode of the data storage system.
    • 一种技术控制具有一组端口的网络交换机。 该技术涉及配置网络交换机以提供端口之间的初始通信路径集合。 初始的通信路径集定义了网络交换机内的初始通信路径拓扑。 该技术还涉及在配置网络交换机以在网络交换机内提供初始通信路径集合的情况下,接收识别数据存储系统的特定操作模式的配置命令。 该技术还涉及重新配置网络交换机以响应配置命令在端口之间提供新的一组通信路径。 新的通信路径集(i)定义了网络交换机内新的通信路径拓扑,新的通信路径拓扑与初始通信路径拓扑不同,(ii)支持数据存储系统的特定操作模式。
    • 4. 发明授权
    • Recovering from a storage processor failure using write cache preservation
    • 使用写缓存保存从存储处理器故障中恢复
    • US07809975B2
    • 2010-10-05
    • US11729728
    • 2007-03-29
    • David FrenchDouglas SullivanWilliam BuckleyAlex SanvillePhillip J. Manning
    • David FrenchDouglas SullivanWilliam BuckleyAlex SanvillePhillip J. Manning
    • G06F11/00
    • G06F11/2089G06F11/1666G06F11/20
    • A computerized system includes two storage processors having respective local write caches configured to mirror each other. When a first storage processor becomes unavailable and mirroring of the local write caches is prevented, the computerized system continues to attend to write operations from an external host in a write-back manner by caching write data from the write operations in the local write cache of the second storage processor. In response to a failure of the second storage processor, the computerized system preserves the write data within the local write cache of the second storage processor. Then, upon recovery of the second storage processor from the failure, the computerized system continues to attend to further write operations from the external host in the write-back manner by caching additional write data in the local write cache of the second storage processor while the first storage processor remains unavailable.
    • 计算机化系统包括具有配置为彼此镜像的各自本地写高速缓存的两个存储处理器。 当第一存储处理器变得不可用并且防止本地写高速缓存的镜像时,计算机化系统继续以写回方式从外部主机写入操作,通过将来自写操作的写数据缓存在本地写高速缓存中 第二存储处理器。 响应于第二存储处理器的故障,计算机化系统保留第二存储处理器的本地写入高速缓存内的写入数据。 然后,当从故障恢复第二存储处理器时,计算机化系统通过在第二存储处理器的本地写入高速缓冲存储器中缓存附加的写入数据来继续以回写方式从外部主机进一步写入操作,而 第一个存储处理器仍然不可用。
    • 5. 发明申请
    • Recovering from a storage processor failure using write cache preservation
    • 使用写缓存保存从存储处理器故障中恢复
    • US20080082856A1
    • 2008-04-03
    • US11729728
    • 2007-03-29
    • David FrenchDouglas SullivanWilliam BuckleyAlex SanvillePhilip J. Manning
    • David FrenchDouglas SullivanWilliam BuckleyAlex SanvillePhilip J. Manning
    • G06F11/16
    • G06F11/2089G06F11/1666G06F11/20
    • A computerized system includes two storage processors having respective local write caches configured to mirror each other. When a first storage processor becomes unavailable and mirroring of the local write caches is prevented, the computerized system continues to attend to write operations from an external host in a write-back manner by caching write data from the write operations in the local write cache of the second storage processor. In response to a failure of the second storage processor, the computerized system preserves the write data within the local write cache of the second storage processor. Then, upon recovery of the second storage processor from the failure, the computerized system continues to attend to further write operations from the external host in the write-back manner by caching additional write data in the local write cache of the second storage processor while the first storage processor remains unavailable.
    • 计算机化系统包括具有配置为彼此镜像的各自本地写高速缓存的两个存储处理器。 当第一存储处理器变得不可用并且防止本地写高速缓存的镜像时,计算机化系统继续以写回方式从外部主机写入操作,通过将来自写操作的写数据缓存在本地写高速缓存中 第二存储处理器。 响应于第二存储处理器的故障,计算机化系统保留第二存储处理器的本地写入高速缓存内的写入数据。 然后,当从故障恢复第二存储处理器时,计算机化系统通过在第二存储处理器的本地写入高速缓冲存储器中缓存附加的写入数据来继续以回写方式从外部主机进一步写入操作,而 第一个存储处理器仍然不可用。
    • 8. 发明授权
    • Environmental and health monitoring circuitry for storage processor I/O annex module
    • 用于存储处理器I / O附件模块的环境和健康监测电路
    • US07279856B1
    • 2007-10-09
    • US11395460
    • 2006-03-31
    • Douglas SullivanStephen StricklandMichael J. Kozel
    • Douglas SullivanStephen StricklandMichael J. Kozel
    • H02P7/08
    • H05K7/20727H05K7/20836Y10T307/615
    • A hot-pluggable I/O annex module of a storage processor assembly includes interface circuitry providing connections to an optional I/O interface module. The I/O annex module includes redundant cooling fans providing cooling airflow to an I/O annex mounting area, main power conversion circuitry for generating main operating power for the interface circuitry, auxiliary power conversion circuitry for generating auxiliary power, a controller for monitoring and controlling the operation of cooling fans; and monitoring circuitry powered by the auxiliary power for monitoring correct operation of the controller and, upon detecting incorrect operation, disabling the main power conversion circuitry. The monitoring circuitry includes a watchdog timer and a latch collectively operative to (i) determine if a controller status signal indicating correct operation of the controller does not toggle for a watch interval, and if so then (ii) enter an operating state in which the main power conversion circuitry is disabled and cannot be re-enabled except by cycling the primary power or removing and reinserting the I/O annex module to/from the storage processor assembly.
    • 存储处理器组件的热插拔I / O附件模块包括提供到可选I / O接口模块的连接的接口电路。 I / O附件模块包括为I / O附件安装区域提供冷却气流的冗余冷却风扇,用于为接口电路产生主要工作功率的主电力转换电路,用于产生辅助电力的辅助电力转换电路,用于监视和 控制冷却风扇的运行; 以及由辅助电源供电的监视电路,用于监视控制器的正确操作,并且在检测到不正确的操作时禁用主电力转换电路。 监视电路包括看门狗定时器和锁存器,其共同操作以(i)确定指示控制器的正确操作的控制器状态信号是否在观看间隔内不切换,并且如果是,则(ii)进入操作状态,其中 主电源转换电路被禁用,除了重新启动主电源或将I / O附件模块卸下并重新插入存储处理器组件外,无法重新启用。
    • 9. 发明申请
    • Continuous, non-fluidized, petroleum coking process
    • 连续,非流化,石油焦化工艺
    • US20050123466A1
    • 2005-06-09
    • US10730417
    • 2003-12-08
    • Douglas Sullivan
    • Douglas Sullivan
    • C01B31/00C10B7/08C10B55/00C10B55/04
    • C10B55/00C10B7/08C10B55/04
    • This coke process is a continuous, non-fluidized, operation. This coke process is environmentally friendly due to its closed circuit operation, eliminating coke particulate emissions, hydrocarbon release and water pollution release into the atmosphere. This process utilizes a flash vessel and reactor agitation system in combination to prevent the buildup of coke and eliminate traditional decoking operations. Within the reactor vessel, the mixing and kneading of the hydrocarbons is critical and occurs to promote devolatilization, carbonization and forming of coke. In addition, a significant reduction in steam usage is achieved. Cokes containing low volatile combustible materials are produced. The coke is then cooled and can be safely and easily transported to storage as solid granules or as a slurry.
    • 该焦炭工艺是连续的,非流化的操作。 这种焦炭过程由于其闭路运行而环保,消除了焦炭颗粒物排放,碳氢化合物释放和水污染物排放到大气中。 该方法结合使用闪蒸容器和反应器搅拌系统以防止焦炭积聚并消除传统的除焦操作。 在反应器容器内,烃的混合和捏合是至关重要的并且发生以促进脱挥发分,碳化和焦炭的形成。 此外,实现蒸汽使用的显着减少。 生产含低挥发性可燃材料的焦炭。 然后将焦炭冷却,并且可以安全且容易地作为固体颗粒或浆料输送到储存器中。