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1. 发明授权

US07876540B2 Adaptive electrostatic discharge (ESD) protection of device interface for local interconnect network (LIN) bus and the like 有权
公开(公告)号：US07876540B2
公开(公告)日：2011-01-25
申请号：US12174802
申请日：2008-07-17
申请人： Philippe Deval , Patrick Besseux , Randy Yach
发明人： Philippe Deval , Patrick Besseux , Randy Yach
IPC分类号： H02H9/00
CPC分类号： H01L27/0266 , H02H9/046
摘要： Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capacitive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.

2. 发明申请

US20090128969A1 ADAPTIVE ELECTROSTATIC DISCHARGE (ESD) PROTECTION OF DEVICE INTERFACE FOR LOCAL INTERCONNECT NETWORK (LIN) BUS AND THE LIKE 有权
标题翻译：用于本地互连网络（LIN）总线和类似设备接口的自适应静电放电（ESD）保护
公开(公告)号：US20090128969A1
公开(公告)日：2009-05-21
申请号：US12174802
申请日：2008-07-17
申请人： Philippe Deval , Patrick Besseux , Randy Yach
发明人： Philippe Deval , Patrick Besseux , Randy Yach
IPC分类号： H02H9/04
CPC分类号： H01L27/0266 , H02H9/046
摘要： Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capa citive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.
摘要翻译：器件接口的自适应静电放电（ESD）保护在处理或安装到系统或从系统中移除时具有非常好的ESD鲁棒性。并且当其在系统中可操作时，具有对DPI，电磁干扰（EMI）等的强大的抗扰性。在外部连接上没有（或低电平）DPI时，ESD保护金属氧化物半导体（MOS）器件的漏极和栅极之间存在显着的电容耦合，以增强ESD保护和较低的反冲电压。。因此当在外部连接上检测到显着的DPI / EMI信号时，MOS ESD保护器件的漏极和栅极之间的电容耦合被断开，旁路或衰减，从而增强了器件的DPI / EMI抗扰度。

3. 发明授权

US07885047B2 Adaptive electrostatic discharge (ESD) protection of device interface for local interconnect network (LIN) bus and the like 有权
标题翻译：用于本地互联网络（LIN）总线的设备接口的自适应静电放电（ESD）保护等
公开(公告)号：US07885047B2
公开(公告)日：2011-02-08
申请号：US12174903
申请日：2008-07-17
申请人： Philippe Deval , Patrick Besseux , Randy Yach
发明人： Philippe Deval , Patrick Besseux , Randy Yach
IPC分类号： H02H9/00
CPC分类号： H01L27/0266 , H02H9/046
摘要： Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capacitive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.
摘要翻译：器件接口的自适应静电放电（ESD）保护在处理或安装到系统或从系统中移除时具有非常好的ESD鲁棒性。并且当其在系统中可操作时，具有对DPI，电磁干扰（EMI）等的强大的抗扰性。在外部连接上没有（或低电平）DPI时，ESD保护金属氧化物半导体（MOS）器件的漏极和栅极之间存在显着的电容耦合，以增强ESD保护和较低的反冲电压。。因此当在外部连接上检测到显着的DPI / EMI信号时，MOS ESD保护器件的漏极和栅极之间的电容耦合被断开，旁路或衰减，从而增强了器件的DPI / EMI抗扰度。

4. 发明申请

US20090128970A1 ADAPTIVE ELECTROSTATIC DISCHARGE (ESD) PROTECTION OF DEVICE INTERFACE FOR LOCAL INTERCONNECT NETWORK (LIN) BUS AND THE LIKE 有权
公开(公告)号：US20090128970A1
公开(公告)日：2009-05-21
申请号：US12174903
申请日：2008-07-17
申请人： Philippe Deval , Patrick Besseux , Randy Yach
发明人： Philippe Deval , Patrick Besseux , Randy Yach
IPC分类号： H02H9/00
CPC分类号： H01L27/0266 , H02H9/046
摘要： Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capa citive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.

5. 发明申请

US20130020646A1 MULTI-CHANNEL HOMOGENOUS PATH FOR ENHANCED MUTUAL TRIGGERING OF ELECTROSTATIC DISCHARGE FINGERS 有权
标题翻译：用于增强静电放电指针互相触发的多通道均匀路径
公开(公告)号：US20130020646A1
公开(公告)日：2013-01-24
申请号：US13552751
申请日：2012-07-19
申请人： Philippe Deval , Marija Fernandez , Patrick Besseux
发明人： Philippe Deval , Marija Fernandez , Patrick Besseux
IPC分类号： H01L27/06
CPC分类号： H01L27/0277 , H01L29/1087 , H01L29/7835 , H01L29/861
摘要： Mutual triggering of electrostatic discharge (ESD) fingers is improved by creating a base contact in each individual finger and connecting all of these base contacts in parallel. The local base contact in each ESD finger is located at a position where the base voltage significantly increases when the ESD current increases. Thus when an ESD finger is triggered its local base voltage will tend to significantly increase. Since all of the ESD finger bases are connected in parallel this local voltage increase will forward bias the base-emitter junctions of the other ESD fingers, thus triggering them all. By sharing the triggering current from the fastest ESD finger with the slower ones ensures that all ESD fingers are triggered during an ESD event.
摘要翻译：通过在每个单独的手指中形成基座接触并并联连接所有这些基座触点来改善静电放电（ESD）手指的相互触发。当ESD电流增加时，每个ESD指状物中的局部基极触点位于基极电压显着增加的位置。因此，当ESD指针被触发时，其局部基极电压将趋于显着增加。由于所有ESD指状基座并联连接，所以本地电压增加将正向偏置其他ESD指的基极 - 发射极结，从而触发它们。通过共享来自最快ESD手指的触发电流，较慢的ESD手指可确保在ESD事件期间触发所有ESD指针。

6. 发明授权

US08735979B2 Multi-channel homogenous path for enhanced mutual triggering of electrostatic discharge fingers 有权
标题翻译：用于增强静电放电指针相互触发的多通道均匀通路
公开(公告)号：US08735979B2
公开(公告)日：2014-05-27
申请号：US13552751
申请日：2012-07-19
申请人： Philippe Deval , Marija Fernandez , Patrick Besseux
发明人： Philippe Deval , Marija Fernandez , Patrick Besseux
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/0277 , H01L29/1087 , H01L29/7835 , H01L29/861
摘要： Mutual triggering of electrostatic discharge (ESD) fingers is improved by creating a base contact in each individual finger and connecting all of these base contacts in parallel. The local base contact in each ESD finger is located at a position where the base voltage significantly increases when the ESD current increases. Thus when an ESD finger is triggered its local base voltage will tend to significantly increase. Since all of the ESD finger bases are connected in parallel this local voltage increase will forward bias the base-emitter junctions of the other ESD fingers, thus triggering them all. By sharing the triggering current from the fastest ESD finger with the slower ones ensures that all ESD fingers are triggered during an ESD event.
摘要翻译：通过在每个单独的手指中形成基座接触并并联连接所有这些基座触点来改善静电放电（ESD）手指的相互触发。当ESD电流增加时，每个ESD指状物中的局部基极触点位于基极电压显着增加的位置。因此，当ESD指针被触发时，其局部基极电压将趋于显着增加。由于所有ESD指状基座并联连接，所以本地电压增加将正向偏置其他ESD指的基极 - 发射极结，从而触发它们。通过共享来自最快ESD手指的触发电流，较慢的ESD手指可确保在ESD事件期间触发所有ESD指针。

7. 发明申请

US20070007597A1 ESD structure having different thickness gate oxides 审中-公开
标题翻译： ESD结构具有不同厚度的栅极氧化物
公开(公告)号：US20070007597A1
公开(公告)日：2007-01-11
申请号：US11215775
申请日：2005-08-30
申请人： Randy Yach , Philippe Deval
发明人： Randy Yach , Philippe Deval
IPC分类号： H01L23/62
CPC分类号： H01L27/0266
摘要： An electrostatic discharge (ESD) structure having increased voltage withstand at an output terminal of an integrated circuit device has a thin gate oxide layer metal oxide semiconductor (MOS) device coupled in series with a thicker gate oxide layer MOS device. The thin gate oxide layer MOS device may be controlled by a low voltage control circuit of the integrated circuit. The thicker gate oxide layer MOS device may be coupled to an output of the integrated circuit device or a bipolar transistor may be coupled between the output of the integrated circuit device and the thicker gate oxide layer MOS device. The thin gate oxide layer and thicker gate oxide layer MOS devices may be coupled in series.
摘要翻译：在集成电路器件的输出端具有增加的耐压的静电放电（ESD）结构具有与较厚栅极氧化物层MOS器件串联耦合的薄栅极氧化物层金属氧化物半导体（MOS）器件。薄栅氧化层MOS器件可以由集成电路的低压控制电路来控制。较厚的栅极氧化物层MOS器件可以耦合到集成电路器件的输出，或者双极晶体管可以耦合在集成电路器件的输出和较厚栅极氧化物层MOS器件之间。薄栅极氧化物层和较厚栅极氧化物层MOS器件可以串联耦合。

8. 发明授权

US08599053B2 Switched-capacitance gain amplifier with improved input impedance 有权
标题翻译：开关电容增益放大器具有改进的输入阻抗
公开(公告)号：US08599053B2
公开(公告)日：2013-12-03
申请号：US13325248
申请日：2011-12-14
申请人： Vincent Quiquempoix , Philippe Deval , Fabien Vaucher
发明人： Vincent Quiquempoix , Philippe Deval , Fabien Vaucher
IPC分类号： H03M3/00
CPC分类号： H03F3/005 , H03F2200/81 , H03M3/342
摘要： A gain amplifier may have a differential amplifier with feedback capacitors; a switched input stage having first and second outputs coupled with the differential amplifier, and having: first and second capacitors, a first input receiving a first signal of a differential input signal; a second input receiving a second signal of the differential input signal; a first plurality of switches controlled by a first clock signal to connect the first terminals of the first capacitor with the first or second input, respectively and to connect the first terminals of the second capacitors with the second and first input, respectively; and a second plurality of switches controlled by a phase shifted clock signal to connect the second terminal of the first capacitor with a first or second input of the differential amplifier and connecting the second terminal of the second capacitor with the second or first input of the differential amplifier.
摘要翻译：增益放大器可以具有带反馈电容器的差分放大器; 开关输入级具有与差分放大器耦合的第一和第二输出，并具有：第一和第二电容器，接收差分输入信号的第一信号的第一输入; 接收差分输入信号的第二信号的第二输入; 第一多个开关，由第一时钟信号控制，分别将第一电容器的第一端子与第一或第二输入端相连，并分别将第二电容器的第一端子与第二和第一输入端连接; 以及由相移时钟信号控制的第二多个开关，以将第一电容器的第二端子与差分放大器的第一或第二输入端连接，并将第二电容器的第二端子与差分放大器的第二或第一输入端放大器

9. 发明申请

US20120154963A1 ADAPTIVE ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT 有权
标题翻译：自适应静电放电（ESD）保护电路
公开(公告)号：US20120154963A1
公开(公告)日：2012-06-21
申请号：US13288080
申请日：2011-11-03
申请人： Philippe Deval , Nicolas Furrer , Bart De Geeter
发明人： Philippe Deval , Nicolas Furrer , Bart De Geeter
IPC分类号： H02H9/00
CPC分类号： H01L27/0285 , H02H9/046
摘要： For adaptive electrostatic discharge (ESD) protection, an integrated circuit device having an adaptive electrostatic discharge (ESD) protection, has an external connection pin to be protected from ESD; an external ground connection pin; an adaptive electrostatic discharge (ESD) protection circuit having: an ESD protection N-metal oxide semiconductor (NMOS) transistor having drain connected to the external connection pin and a source and bulk connected to ground; a resistor coupled between a gate of the NMOS transistor and ground; a first PMOS transistor having a source coupled to a gate of the NMOS transistor and a drain connected to ground; a first capacitor having a first terminal connected to the external connection pin and a second terminal that is coupled with the gate of the NMOS transistor, wherein the first capacitor within the adaptive ESD protection circuit is the only capacitor connected to the external connection pin.
摘要翻译：对于自适应静电放电（ESD）保护，具有自适应静电放电（ESD）保护的集成电路器件具有防止ESD保护的外部连接引脚; 外部接地连接引脚; 一种自适应静电放电（ESD）保护电路，具有：具有漏极连接到外部连接引脚的漏电连接到地的ESD保护N型金属氧化物半导体（NMOS）晶体管; 耦合在NMOS晶体管的栅极和地之间的电阻器; 第一PMOS晶体管，其具有耦合到NMOS晶体管的栅极的源极和连接到地的漏极; 第一电容器，其具有连接到外部连接引脚的第一端子和与NMOS晶体管的栅极耦合的第二端子，其中自适应ESD保护电路内的第一电容器是连接到外部连接引脚的唯一电容器。

10. 发明申请

US20100103014A1 Multi-Level Feed-Back Digital-To-Analog Converter Using A Chopper Voltage Reference For A Switched Capacitor Sigma-Delta Analog-To-Digital Converter 有权
标题翻译：用于开关电容器Σ-Delta模数转换器的斩波电压参考的多电平反馈数模转换器
公开(公告)号：US20100103014A1
公开(公告)日：2010-04-29
申请号：US12581982
申请日：2009-10-20
申请人： Vincent Quiquempoix , Philippe Deval
发明人： Vincent Quiquempoix , Philippe Deval
IPC分类号： H03M3/00 , H03M1/66
CPC分类号： H03M3/34 , H03M3/424 , H03M3/456 , H03M3/464
摘要： A multi-bit digital-to-analog converter has a reference voltage generator generating a reference voltage with an offset voltage; a switched capacitor stage for generating a plurality of output voltages; and a switching sequencer controlling the switched capacitor stage operable to generate switching patterns for each output voltages, wherein each pattern has a charge phase and a transfer phase, and wherein for at least one output voltage the switching sequencer provides two switching patterns wherein each switching pattern contributes an offset of opposite polarity.
摘要翻译：多位数模转换器具有产生具有偏移电压的参考电压的参考电压发生器; 用于产生多个输出电压的开关电容器级; 以及开关定序器，其控制所述开关电容器级可操作以产生用于每个输出电压的开关模式，其中每个模式具有充电阶段和转移阶段，并且其中对于至少一个输出电压，所述开关定序器提供两个开关模式，其中每个开关模式造成相反极性的偏移。

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