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1. 发明授权

US06333666B2 Antifuse circuit being programmable by using no connection pin 失效
标题翻译：防漏电路可通过不使用连接引脚进行编程
公开(公告)号：US06333666B2
公开(公告)日：2001-12-25
申请号：US09737854
申请日：2000-12-18
申请人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Jin-Keun Oh , Jae-Seok Park , Oh-Won Kwon , Ho-Youb Cho
发明人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Jin-Keun Oh , Jae-Seok Park , Oh-Won Kwon , Ho-Youb Cho
IPC分类号： H01H3776
CPC分类号： G11C17/18
摘要： An antifuse circuit provides a stabilized high voltage to an antifuse programming circuit through the use of an NC pin which is not used in the chip operation. For the purpose, the antifuse circuit includes a power-up detecting circuit for generating a power stabilization signal by detecting a supply voltage; a power-up pulse circuit for generating a first and a second control signal in response to the power stabilization signal; an antifuse programming circuit for, under the control of the first and the second control signals, detecting whether an antifuse element is programmed or not, latching the result of the detection and programming the antifuse element in response to an external high voltage and a precharge signal; a pin for receiving the external high voltage so as to program the antifuse element; a pad for providing the external high voltage to the inside of the chip; and a diode for supplying the external high voltage to the antifuse programming circuit and preventing a voltage of the antifuse programming circuit from being provided to the pin.
摘要翻译：反熔丝电路通过使用不用于芯片操作的NC引脚向反熔丝编程电路提供稳定的高电压。为此，反熔丝电路包括用于通过检测电源电压来产生功率稳定信号的上电检测电路; 上电脉冲电路，用于响应于所述功率稳定信号产生第一和第二控制信号; 反熔丝编程电路，用于在第一和第二控制信号的控制下检测反熔丝元件是否被编程，锁存检测结果并响应于外部高电压和预充电信号编程反熔丝元件 ; 用于接收外部高电压以便对反熔丝元件进行编程的引脚; 用于向芯片内部提供外部高电压的焊盘; 以及用于将外部高电压提供给反熔丝编程电路并防止反熔丝编程电路的电压被提供给引脚的二极管。

2. 发明授权

US06456546B2 Repair circuit using antifuse 有权
标题翻译：维修电路采用反熔丝
公开(公告)号：US06456546B2
公开(公告)日：2002-09-24
申请号：US09737845
申请日：2000-12-18
申请人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Young-Ho Seol , Jin-Keun Oh , Ho-Youb Cho
发明人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Young-Ho Seol , Jin-Keun Oh , Ho-Youb Cho
IPC分类号： G11C700
CPC分类号： G11C17/18 , G11C29/70
摘要： A repair circuit substitutes a defective cell with a redundancy cell. For the purpose, the repair circuit includes an antifuse programmed by a voltage difference of both ends thereof, a programming circuit for programming the antifuse, a detection circuit for detecting whether the antifuse is programmed or unprogrammed by using a first and a second power stabilization signal of a power up reset circuit, wherein the detection is performed during a power stabilization period or after the power stabilization period, a latch circuit for latching the result of the detection to thereby generate an output signal, and a redundancy circuit having a redundancy cell for repairing the defective cell in response to the output signal of the latch circuit.
摘要翻译：修复电路用具有冗余单元的缺陷单元代替。为此，修复电路包括通过其两端的电压差编程的反熔丝，用于对反熔丝进行编程的编程电路，用于通过使用第一和第二功率稳定信号来检测反熔丝是否被编程或未编程的检测电路上电复位电路，其中所述检测在功率稳定期间或所述功率稳定周期之后进行，用于锁存所述检测结果以产生输出信号的锁存电路，以及冗余电路，具有用于响应于锁存电路的输出信号修复有缺陷的单元。

3. 发明授权

US06477094B2 Memory repair circuit using antifuse of MOS structure 有权
标题翻译：内存修复电路采用反熔丝MOS结构
公开(公告)号：US06477094B2
公开(公告)日：2002-11-05
申请号：US09737871
申请日：2000-12-18
申请人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Young-Ho Seol , Jin-Keun Oh , Ho-Youb Cho
发明人： Phil-Jung Kim , Jae-Kyung Wee , Chang-Hyuk Lee , Young-Ho Seol , Jin-Keun Oh , Ho-Youb Cho
IPC分类号： G11C700
CPC分类号： G11C29/785 , G11C17/18
摘要： A memory repair circuit uses an antifuse of MOS structure, capable of repairing defective cells by constructing the antifuse by MOS transistors and programming the antifuse circuit properly. The memory repair circuit comprises a plurality of antifuse devices, each programmed when a power voltage and a negative voltage are supplied respectively to a first electrode and a second electrode thereof; a latch for detecting and latching program states of the antifuse devices; and a redundancy block for replacing a defect cell with a redundancy cell depending on the output of the latch.
摘要翻译：存储器修复电路使用MOS结构的反熔丝，能够通过由MOS晶体管构成反熔丝并且适当地编程反熔丝电路来修复有缺陷的单元。存储器修复电路包括多个反熔断器件，每个反熔丝器件分别在将电源电压和负电压提供给第一电极和第二电极时被编程; 用于检测和锁存反熔丝装置的程序状态的锁存器; 以及用于根据锁存器的输出用冗余单元替换缺陷单元的冗余块。

4. 发明申请

US20140333289A1 CURRENT DETECTION DEVICE FOR MULTI-SENSOR ARRAY 审中-公开
标题翻译：多传感器阵列的电流检测装置
公开(公告)号：US20140333289A1
公开(公告)日：2014-11-13
申请号：US14363688
申请日：2012-03-14
申请人： Jae-Kyung Wee , Young-San Shin
发明人： Jae-Kyung Wee , Young-San Shin
IPC分类号： G01R19/00 , G01R19/22
CPC分类号： G01R19/0092 , G01R19/22
摘要： A current detection device for a multi-sensor array is provided. The current detection device includes a current input unit, a current conversion unit, a digital conversion unit, and a voltage applying unit. The current input unit amplifies a plurality of current signals input from a multi-sensor array according to a predetermined current minor ratio, and fixes each of node voltages to which the plurality of current signals are input. The current conversion unit converts each of the amplified current signals into an amplified voltage signal using a plurality of feedback resistors and an operational amplifier which are connected in parallel. The digital conversion unit converts each of the amplified voltage signals converted by the current conversion unit into a digital value. The voltage applying unit generates voltages for driving each of the multi-sensor array, the current input unit, the current conversion unit, and the digital conversion unit, and applies the generated voltages thereto.
摘要翻译：提供了一种用于多传感器阵列的电流检测装置。电流检测装置包括电流输入单元，电流转换单元，数字转换单元和电压施加单元。当前输入单元根据预定的当前小比例放大从多传感器阵列输入的多个电流信号，并固定输入多个电流信号的节点电压。电流转换单元使用并联连接的多个反馈电阻器和运算放大器将每个放大电流信号转换成放大电压信号。数字转换单元将由当前转换单元转换的每个放大电压信号转换为数字值。电压施加单元产生用于驱动多传感器阵列，电流输入单元，电流转换单元和数字转换单元中的每一个的电压，并将产生的电压施加到其上。

5. 发明申请

US20140266121A1 DEVICE FOR CONTROLLING A SWITCHING MODE POWER SUPPLY 有权
标题翻译：用于控制切换模式电源的装置
公开(公告)号：US20140266121A1
公开(公告)日：2014-09-18
申请号：US14354627
申请日：2011-10-31
申请人： Jae-Kyung Wee , Ji-Hoon Lim
发明人： Jae-Kyung Wee , Ji-Hoon Lim
IPC分类号： H02M3/157
CPC分类号： H02M3/157 , H02M3/1588 , H02M2001/0012 , Y02B70/1466
摘要： An apparatus for controlling an output voltage of a switching mode power supply (SMPS) by adjusting a switching duty ratio is provided. A comparator outputs a state signal varying depending on a comparison result between an output voltage of the SMPS and a reference voltage. A clock generator generates an internal chip operating frequency and a switching frequency of the SMPS. A digital controller determines on/off of current cells depending on the state signal input from the comparator. A digital pulse width modulator (DPWM) determines a duty ratio of a digital pulse width modulation signal by determining a charging/discharging time of an internal capacitor based on an amount of current of the current cell.
摘要翻译：提供了一种通过调节开关占空比来控制开关模式电源（SMPS）的输出电压的装置。比较器输出根据SMPS的输出电压和参考电压之间的比较结果而变化的状态信号。时钟发生器产生SMPS的内部芯片工作频率和开关频率。数字控制器根据从比较器输入的状态信号确定当前单元的开/关。数字脉宽调制器（DPWM）通过基于当前单元的电流量确定内部电容器的充电/放电时间来确定数字脉宽调制信号的占空比。

6. 发明授权

US09391514B2 Device for controlling a switching mode power supply 有权
标题翻译：用于控制开关模式电源的装置
公开(公告)号：US09391514B2
公开(公告)日：2016-07-12
申请号：US14354627
申请日：2011-10-31
申请人： Jae-Kyung Wee , Ji-Hoon Lim
发明人： Jae-Kyung Wee , Ji-Hoon Lim
IPC分类号： H02M3/157 , H02M3/158 , H02M1/00
CPC分类号： H02M3/157 , H02M3/1588 , H02M2001/0012 , Y02B70/1466
摘要： An apparatus for controlling an output voltage of a switching mode power supply (SMPS) by adjusting a switching duty ratio is provided. A comparator outputs a state signal varying depending on a comparison result between an output voltage of the SMPS and a reference voltage. A clock generator generates an internal chip operating frequency and a switching frequency of the SMPS. A digital controller determines on/off of current cells depending on the state signal input from the comparator. A digital pulse width modulator (DPWM) determines a duty ratio of a digital pulse width modulation signal by determining a charging/discharging time of an internal capacitor based on an amount of current of the current cell.
摘要翻译：提供了一种通过调节开关占空比来控制开关模式电源（SMPS）的输出电压的装置。比较器输出根据SMPS的输出电压和参考电压之间的比较结果而变化的状态信号。时钟发生器产生SMPS的内部芯片工作频率和开关频率。数字控制器根据从比较器输入的状态信号确定当前单元的开/关。数字脉宽调制器（DPWM）通过基于当前单元的电流量确定内部电容器的充电/放电时间来确定数字脉宽调制信号的占空比。

7. 发明授权

US06552587B2 Synchronous semiconductor device for adjusting phase offset in a delay locked loop 有权
公开(公告)号：US06552587B2
公开(公告)日：2003-04-22
申请号：US10033004
申请日：2001-12-28
申请人： Se-Jun Kim , Jae-Kyung Wee , Yong-Jae Park
发明人： Se-Jun Kim , Jae-Kyung Wee , Yong-Jae Park
IPC分类号： H03L706
CPC分类号： G11C29/50012 , G11C7/1051 , G11C7/1066 , G11C7/222 , G11C29/50 , H03L7/0814 , H03L7/0891
摘要： A synchronous semiconductor device having a delay locked loop capable of adjusting phase offset between an external clock signal and an internal clock signal after a packaging process is completed is disclosed. The disclosed synchronous semiconductor device may include a replica delay for replicating delay time of an internal circuit and a delay controller for controlling the replicated delay time.

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