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1. 发明申请

US20140167134A1 SELF-ALIGNED VERTICAL NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：自对准垂直非线性半导体存储器件
公开(公告)号：US20140167134A1
公开(公告)日：2014-06-19
申请号：US13514032
申请日：2012-02-02
申请人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
IPC分类号： H01L27/115
CPC分类号： H01L27/11563 , G11C16/0475 , H01L21/84 , H01L27/1021 , H01L27/1026 , H01L27/1157 , H01L27/1203 , H01L29/7391 , H01L29/7923 , H01L29/8616
摘要： The present invention belongs to the technical field of semiconductor memory devices and specifically relates to a self-aligned vertical nonvolatile semiconductor memory device, Including: a semiconductor substrate, a drain region of a first doping type, two source regions of a second doping type, a stacked gate used to capture electrons; wherein the drain region, the two source regions and the stacked gate form two tunneling field effect transistors (TFETs) sharing one gate and one drain, the drain region current of each of the TFET is affected by the quantity and distribution of the charges in the stacked gate used to capture electrons, the drain is buried in the semiconductor substrate, the source regions above the drain region are separated from the drain through a channel and separated form each other through a region of the first doping type. The semiconductor memory device of the present invention features small unit area and simple manufacturing process. The memory chip using the present invention is of low manufacturing cost and high storage density.
摘要翻译：本发明属于半导体存储器件的技术领域，具体涉及一种自对准的垂直非易失性半导体存储器件，包括：半导体衬底，第一掺杂类型的漏极区域，第二掺杂型的两个源极区域，用于捕获电子的堆叠栅; 其中漏极区域，两个源极区域和堆叠的栅极形成共享一个栅极和一个漏极的两个隧道场效应晶体管（TFET），每个TFET的漏极区域电流受到电荷的量和分布的影响用于捕获电子的堆叠栅极，漏极埋在半导体衬底中，漏极区域上方的源极区域通过沟道与漏极分离，并通过第一掺杂类型的区域彼此分离。本发明的半导体存储器件具有小的单位面积和简单的制造工艺。使用本发明的存储芯片的制造成本低，存储密度高。

2. 发明申请

US20140034891A1 SEMICONDUCTOR MEMORY STRUCTURE AND ITS MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体存储器结构及其制造方法
公开(公告)号：US20140034891A1
公开(公告)日：2014-02-06
申请号：US13376994
申请日：2011-08-15
申请人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
IPC分类号： H01L27/24
CPC分类号： H01L27/2463 , H01L27/2445 , H01L27/2472 , H01L29/7391 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/1675
摘要： The present invention belongs to the technical field of microelectronic devices, specifically relates to a semiconductor memory structure and its manufacturing method thereof. The semiconductor memory structure which carries out erasing, writing and reading operation on the phase change memory or the resistance change memory through a tunneling field-effect transistor is formed, for one hand, the high current passed through the tunneling field-effect transistor when the p-n junction the biased positively, meeting the high current requirements for erasing of and writing of the phase change memory and the resistance change memory, and on the other hand, Vertical structure of the field-effect transistor can greatly improve the density of memory devices arrays. The present invention also discloses a method, which is very suitable for the memory chips, for the manufacturing of the semiconductor memory structure using self-aligned process.
摘要翻译：本发明属于微电子器件的技术领域，具体涉及一种半导体存储器结构及其制造方法。形成通过隧道场效应晶体管对相变存储器或电阻变化存储器进行擦除，写入和读取操作的半导体存储器结构，一方面，当电流通过隧道场效应晶体管时， pn结积极偏置，满足擦除和写入相变存储器和电阻变化存储器的高电流要求，另一方面，场效应晶体管的垂直结构可以大大提高存储器件阵列的密度。本发明还公开了一种非常适用于存储芯片的方法，用于使用自对准工艺制造半导体存储器结构。

3. 发明授权

US08557678B2 Method for manufacturing semiconductor substrate of large-power device 有权
标题翻译：大功率器件半导体衬底的制造方法
公开(公告)号：US08557678B2
公开(公告)日：2013-10-15
申请号：US13498144
申请日：2011-11-18
申请人： Pengfei Wang , Xi Lin , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Zhang
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L29/66333 , H01L21/76275 , H01L29/41741
摘要： The invention belongs to the technical field of high-voltage, large-power devices and in particular relates to a method for manufacturing a semiconductor substrate of a large-power device. According to the method, the ion implantation is carried out on the front face of a floating zone silicon wafer first, then a high-temperature resistant metal is used as a medium to bond the back-off floating zone silicon wafer, and a heavily CZ-doped silicon wafer forms the semiconductor substrate. After bonding, the floating zone silicon wafer is used to prepare an insulated gate bipolar transistor (IGBT), and the heavily CZ-doped silicon wafer is used as the low-resistance back contact, so the required amount of the floating zone silicon wafers used is reduced, and production cost is lowered. Meanwhile, the back metallization process is not required after bonding, so the processing procedures are simplified, and the production yield is enhanced.
摘要翻译：本发明属于高压大功率器件的技术领域，特别涉及大功率器件的半导体衬底的制造方法。根据该方法，首先在浮动区硅晶片的正面进行离子注入，然后使用耐高温金属作为介质来接合浮渣区硅晶片，并且重CZ 掺杂硅晶片形成半导体衬底。在接合之后，使用浮动区硅晶片来制备绝缘栅双极晶体管（IGBT），并且将重CZ掺杂的硅晶片用作低电阻背接触，因此使用所需量的浮区硅晶片降低了生产成本。同时，接合后不需要背面金属化处理，因此简化了处理程序，并且提高了生产成品率。

4. 发明申请

US20130149824A1 METHOD FOR MANUFACTURING A TUNNELING FIELD EFFECT TRANSISTOR WITH A U-SHAPED CHANNEL 有权
标题翻译：用U形通道制造隧道场效应晶体管的方法
公开(公告)号：US20130149824A1
公开(公告)日：2013-06-13
申请号：US13537956
申请日：2012-06-29
申请人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/7391 , H01L29/0657 , H01L29/0895 , H01L29/517 , H01L29/66356
摘要： The present invention belongs to the technical field of semiconductor device manufacturing and specifically relates to a method for manufacturing a tunneling field effect transistor with a U-shaped channel. The U-shaped channel can effectively extend the transistor channel length, restrain the generation of leakage current in the transistor, and decrease the chip power consumption. The method for manufacturing a tunneling field effect transistor with a U-shaped channel put forward in the present invention is capable of realizing an extremely narrow U-shaped channel, overcoming the alignment deviation introduced by photoetching, and improving the chip integration degree.
摘要翻译：本发明属于半导体器件制造的技术领域，具体涉及一种具有U形沟道的隧道效应晶体管的制造方法。 U型通道可以有效地延长晶体管沟道长度，抑制晶体管中漏电流的产生，降低芯片功耗。本发明提出的具有U形通道的隧道场效应晶体管的制造方法能够实现非常窄的U形沟道，克服由光刻引入的取向偏差，提高芯片集成度。

5. 发明申请

US20120261669A1 PHOTO DETECTOR CONSISTING OF TUNNELING FIELD-EFFECT TRANSISTORS AND THE MANUFACTURING METHOD THEREOF 有权
标题翻译：隧道场效应晶体管的照相检测器及其制造方法
公开(公告)号：US20120261669A1
公开(公告)日：2012-10-18
申请号：US13446834
申请日：2012-04-13
申请人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
IPC分类号： H01L31/0368 , H01L31/18 , H01L31/0232
CPC分类号： H01L31/1804 , G02B6/42 , G02B6/4214 , H01L27/2454 , H01L27/304 , H01L31/02327 , H01L31/113 , H01L31/1136 , Y02E10/547 , Y02P70/521
摘要： The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.
摘要翻译：本发明属于光互连的技术领域，涉及光检测器，特别涉及由隧道场效应晶体管构成的光检测器。

6. 发明授权

US09087958B2 Photo detector consisting of tunneling field-effect transistors and the manufacturing method thereof 有权
公开(公告)号：US09087958B2
公开(公告)日：2015-07-21
申请号：US14600196
申请日：2015-01-20
申请人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
IPC分类号： H01L27/30 , H01L31/111 , H01L31/0232 , H01L27/24 , H01L31/18 , H01L31/113
CPC分类号： H01L31/1804 , G02B6/42 , G02B6/4214 , H01L27/2454 , H01L27/304 , H01L31/02327 , H01L31/113 , H01L31/1136 , Y02E10/547 , Y02P70/521
摘要： The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.

7. 发明申请

US20130065365A1 Method for Manufacturing Semiconductor Substrate of Large-power Device 有权
标题翻译：大功率器件半导体基板制造方法
公开(公告)号：US20130065365A1
公开(公告)日：2013-03-14
申请号：US13498144
申请日：2011-11-18
申请人： Pengfei Wang , Xi Lin , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Zhang
IPC分类号： H01L21/331
CPC分类号： H01L29/66333 , H01L21/76275 , H01L29/41741
摘要： The invention belongs to the technical field of high-voltage, large-power devices and in particular relates to a method for manufacturing a semiconductor substrate of a large-power device. According to the method, the ion implantation is carried out on the front face of a floating zone silicon wafer first, then a high-temperature resistant metal is used as a medium to bond the back-off floating zone silicon wafer, and a heavily CZ-doped silicon wafer forms the semiconductor substrate. After bonding, the floating zone silicon wafer is used to prepare an insulated gate bipolar transistor (IGBT), and the heavily CZ-doped silicon wafer is used as the low-resistance back contact, so the required amount of the floating zone silicon wafers used is reduced, and production cost is lowered. Meanwhile, the back metallization process is not required after bonding, so the processing procedures are simplified, and the production yield is enhanced.
摘要翻译：本发明属于高压大功率器件的技术领域，特别涉及大功率器件的半导体衬底的制造方法。根据该方法，首先在浮动区硅晶片的正面进行离子注入，然后使用耐高温金属作为介质来接合浮渣区硅晶片，并且重CZ 掺杂硅晶片形成半导体衬底。在接合之后，使用浮动区硅晶片来制备绝缘栅双极晶体管（IGBT），并且将重CZ掺杂的硅晶片用作低电阻背接触，因此使用所需量的浮区硅晶片降低了生产成本。同时，接合后不需要背面金属化处理，因此简化了处理程序，并且提高了生产成品率。

8. 发明申请

US20150132883A1 PHOTO DETECTOR CONSISTING OF TUNNELING FIELD-EFFECT TRANSISTORS AND THE MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：隧道场效应晶体管的照相检测器及其制造方法
公开(公告)号：US20150132883A1
公开(公告)日：2015-05-14
申请号：US14600196
申请日：2015-01-20
申请人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Wang , Xiaoyong Liu , Wei Zhang
IPC分类号： H01L31/18 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1804 , G02B6/42 , G02B6/4214 , H01L27/2454 , H01L27/304 , H01L31/02327 , H01L31/113 , H01L31/1136 , Y02E10/547 , Y02P70/521
摘要： The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.
摘要翻译：本发明属于光互连的技术领域，涉及光检测器，特别涉及由隧道场效应晶体管构成的光检测器。

9. 发明授权

US08586432B2 Method for manufacturing vertical-channel tunneling transistor 有权
标题翻译：垂直沟道隧道晶体管的制造方法
公开(公告)号：US08586432B2
公开(公告)日：2013-11-19
申请号：US13537854
申请日：2012-06-29
申请人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Wei Liu , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/7391 , H01L29/0692 , H01L29/165 , H01L29/66356
摘要： The present invention belongs to the technical field of semiconductors and specifically relates to a method for manufacturing a vertical-channel tunneling transistor. In the present invention, the surrounding gate gate structure improves the control capacity of the gate and the source of narrow band gap material can enhance the device driving current. The method for manufacturing a vertical-channel tunneling transistor put forward by the present invention capable of controlling the channel length precisely features simple process, easy control and reduction of production cost.
摘要翻译：本发明属于半导体技术领域，具体涉及制造垂直沟道隧道晶体管的方法。在本发明中，围绕栅极栅极结构提高了栅极的控制能力，并且窄带隙材料的源极可以增强器件驱动电流。本发明提出的能够精确控制通道长度的垂直通道隧道晶体管的制造方法具有工艺简单，易于控制和降低生产成本。

10. 发明申请

US20130237010A1 METHOD FOR MANUFACTURING A GATE-CONTROL DIODE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：制造门控二极管半导体存储器件的方法
公开(公告)号：US20130237010A1
公开(公告)日：2013-09-12
申请号：US13554531
申请日：2012-07-20
申请人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
发明人： Pengfei Wang , Xi Lin , Qingqing Sun , Wei Zhang
IPC分类号： H01L21/336 , H01L21/36
CPC分类号： H01L21/8258 , H01L27/11521 , H01L29/40114 , H01L29/42324 , H01L29/66825 , H01L29/7881
摘要： The present invention belongs to the technical field of semiconductor device manufacturing, and specifically discloses a method for manufacturing a gate-control diode semiconductor storage device. The present invention manufactures gate-control diode semiconductor memory devices through a low-temperature process featuring a simple process, low manufacturing cost and capacity of manufacturing gate-control diode memory devices with a high driving current and small sub-threshold swing. The method for manufacturing a gate-control diode semiconductor memory device proposed by the present invention is especially applicable to the manufacturing of flat panel displays and phase change memories and memory devices based on flexible substrate.
摘要翻译：本发明属于半导体器件制造技术领域，具体公开了一种栅控二极管半导体存储器件的制造方法。本发明通过低温工艺制造栅极控制二极管半导体存储器件，其特征在于制造具有高驱动电流和小次阈值摆幅的栅极控制二极管存储器件的简单工艺，低制造成本和容量。本发明提出的用于制造栅极控制二极管半导体存储器件的方法特别适用于基于柔性基板的平板显示器和相变存储器以及存储器件的制造。

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