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1. 发明授权

US07078817B2 Multiple copper vias for integrated circuit metallization 失效
标题翻译：用于集成电路金属化的多个铜通孔
公开(公告)号：US07078817B2
公开(公告)日：2006-07-18
申请号：US11010596
申请日：2004-12-13
申请人： Paul S. Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
发明人： Paul S. Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L22/34 , H01L23/522 , H01L23/5226 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.
摘要翻译：可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。多通道可以提供冗余以减少早期故障统计。此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。

2. 发明授权

US06919639B2 Multiple copper vias for integrated circuit metallization and methods of fabricating same 失效
标题翻译：用于集成电路金属化的多个铜通孔及其制造方法
公开(公告)号：US06919639B2
公开(公告)日：2005-07-19
申请号：US10271284
申请日：2002-10-15
申请人： Paul S. Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
发明人： Paul S. Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
IPC分类号： H01L23/522 , H01L23/532 , H01L23/544 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L22/34 , H01L23/522 , H01L23/5226 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.
摘要翻译：可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。多通道可以提供冗余以减少早期故障统计。此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。

3. 发明申请

US20050093163A1 Multiple copper vias for integrated circuit metallization 失效
标题翻译：用于集成电路金属化的多个铜通孔
公开(公告)号：US20050093163A1
公开(公告)日：2005-05-05
申请号：US11010596
申请日：2004-12-13
申请人： Paul Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
发明人： Paul Ho , Ki-Don Lee , Ennis Ogawa , Hideki Matsuhashi
IPC分类号： H01L23/522 , H01L23/532 , H01L23/544 , H01L21/44 , H01L23/48 , H01L23/52
CPC分类号： H01L22/34 , H01L23/522 , H01L23/5226 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： Electromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.
摘要翻译：可以减少集成电路的铜基金属化中的电迁移，该集成电路包括通过中间绝缘层将下面的导电线与覆盖的含铜线电连接的第一含铜通孔。通过形成至少第二含铜通孔，通过与第一含铜通孔平行地电连接下面的导电线路和覆盖的含铜线路穿过中间绝缘层，可以减少电迁移。多通道可以提供冗余以减少早期故障统计。此外，由于电流分布在通孔中，所以可以减少电迁移驱动力，并且可以减少在通孔接口处的空隙中的局部焦耳加热。因此，即使形成通孔，由于焦耳加热，结构也可能不会由于灾难性热失控而失效。

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