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1. 发明申请

US20190295125A1 Artificial intelligence autonomous building system 审中-公开
公开(公告)号：US20190295125A1
公开(公告)日：2019-09-26
申请号：US16356270
申请日：2019-03-18
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： G06Q30/02 , G05B15/02 , G06Q30/06 , G06N20/00 , G06K9/62
摘要： The present invention describes an autonomous building system capable of operating based on processing and analysis of collected data by means of Artificial Intelligence algorithms. The data can be gathered from within the system and/or from external networks. The autonomous building system will assist its users in every tasks from enhanced security to energy savings, from health monitoring and data collection to education, from financial assistance to social activities. In particular the described autonomous building is capable of making autonomous decisions and online purchases getting funds out of a dedicated financial account. The autonomous building may become the target of contextual advertising to promote products and/or services.

2. 发明授权

US08963289B2 Digital semiconductor variable capacitor 有权
标题翻译：数字半导体可变电容器
公开(公告)号：US08963289B2
公开(公告)日：2015-02-24
申请号：US13889317
申请日：2013-05-07
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： H01L29/93 , H01L29/66
CPC分类号： H01L29/93 , H01L29/66174 , H01L29/66189 , H01L29/94
摘要： A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.
摘要翻译：提出了一种新型的半导体可变电容器。半导体结构简单，并且基于具有MOS兼容结构的半导体可变电容器，其适用于集成电路，其具有至少三个端子，其中一个用于通过增加器件的另外两个端子来调制电容值或者相对于设备的主端子之一降低其直流电压。此外，本发明解耦AC信号和DC控制电压，防止RF信号的失真。本发明描述了一种可控制的电容器，其电容值不一定与其控制电压成线性关系，但是尽管其特性可能突然地被用于制造具有数字控制的半导体可变电容器，以改善其噪声和线性性能，同时保持高品质因数。

3. 发明授权

US08907644B2 Synchronization of hysteretic power converters 有权
标题翻译：迟滞功率转换器的同步
公开(公告)号：US08907644B2
公开(公告)日：2014-12-09
申请号：US13135701
申请日：2011-07-14
申请人： Paolo Menegoli , Fabio Alessio Marino
发明人： Paolo Menegoli , Fabio Alessio Marino
IPC分类号： H02M1/00 , H02M3/158 , H02M3/156
CPC分类号： H02M3/158 , H02M3/1563 , H02M2001/0025
摘要： A novel method to synchronize the switching frequency of hysteretic power converters is presented. The method includes the generation of a clock signal and the injection of a periodic disturbance signal operating at the frequency of the generated clock in the main loop of the converter to synchronize the hysteretic power converter to switch at the frequency of the clock.The presented approach provides significant advantages with respect to the more traditional means of utilizing Frequency Lock Loop, Phase Lock Loop or Delay Lock Loop circuits, mainly for its simplicity, faster locking and much reduced phase error.The switching frequency can be higher or lower than the free running frequency of the power converter provided that the free running frequency is close enough to the desired switching frequency.The method is presented for buck and boost hysteretic high frequency switching power converters.
摘要翻译：提出了一种同步迟滞功率转换器开关频率的新颖方法。该方法包括产生时钟信号和注入在转换器的主环路中以产生的时钟频率工作的周期性干扰信号，以使迟滞功率转换器在时钟频率上切换。所提出的方法相对于使用频率锁定环路，锁相环或延迟锁定环路电路的更传统的方式提供了显着的优点，主要是由于其简单性，更快的锁定和大大降低的相位误差。开关频率可以高于或低于功率转换器的自由运行频率，条件是自由运行频率足够接近所需的开关频率。该方法用于降压和升压滞环高频开关电源转换器。

4. 发明申请

US20140332928A1 Digital Semiconductor Variable Capacitor 有权
标题翻译：数字半导体可变电容器
公开(公告)号：US20140332928A1
公开(公告)日：2014-11-13
申请号：US13889317
申请日：2013-05-07
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： H01L29/93 , H01L29/66
CPC分类号： H01L29/93 , H01L29/66174 , H01L29/66189 , H01L29/94
摘要： A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.
摘要翻译：介绍一种新型的半导体可变电容器。半导体结构简单，并且基于具有MOS兼容结构的半导体可变电容器，其适用于集成电路，其具有至少三个端子，其中一个用于通过增加器件的另外两个端子来调制电容值或者相对于设备的主端子之一降低其直流电压。此外，本发明解耦AC信号和DC控制电压，防止RF信号的失真。本发明描述了一种可控制的电容器，其电容值不一定与其控制电压成线性关系，但是尽管其特性可能突然地被用于制造具有数字控制的半导体可变电容器，以改善其噪声和线性性能，同时保持高品质因数。

5. 发明授权

US08498094B2 Semiconductor variable capacitor 有权
标题翻译：半导体可变电容器
公开(公告)号：US08498094B2
公开(公告)日：2013-07-30
申请号：US13068161
申请日：2011-05-05
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： H01G7/00
CPC分类号： H01G7/00 , H01L29/93 , H01L29/94 , Y10T29/435
摘要： A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a linear dependence of the capacitance value with respect to the voltage of its control terminal.
摘要翻译：提出了一种新型的半导体可变电容器。半导体结构简单，基于适用于集成电路的半导体可变MOS电容器结构，其具有至少三个端子，其中之一用于通过增加或减少其直流电压来调制MOS结构的等效电容器面积相对于器件的另一个端子，以便在宽范围的值上改变电容。此外，本发明解耦AC信号和DC控制电压，避免了失真，提高了设备的性能，如其控制特性。本发明是简单的，并且只是稍微依赖于由于制造过程而引起的变化。它表现出高的电容密度值，并且如果适当地实现，则显示电容值相对于其控制端子的电压的线性相关性。

6. 发明申请

US20130015829A1 Synchronization of hysteretic power converters 有权
标题翻译：迟滞功率转换器的同步
公开(公告)号：US20130015829A1
公开(公告)日：2013-01-17
申请号：US13135701
申请日：2011-07-14
申请人： Paolo Menegoli , Fabio Alessio Marino
发明人： Paolo Menegoli , Fabio Alessio Marino
IPC分类号： G05F1/10
CPC分类号： H02M3/158 , H02M3/1563 , H02M2001/0025
摘要： A novel method to synchronize the switching frequency of hysteretic power converters is presented. The method includes the generation of a clock signal and the injection of a periodic disturbance signal operating at the frequency of the generated clock in the main loop of the converter to synchronize the hysteretic power converter to switch at the frequency of the clock.The presented approach provides significant advantages with respect to the more traditional means of utilizing Frequency Lock Loop, Phase Lock Loop or Delay Lock Loop circuits, mainly for its simplicity, faster locking and much reduced phase error.The switching frequency can be higher or lower than the free running frequency of the power converter provided that the free running frequency is close enough to the desired switching frequency.The method is presented for buck and boost hysteretic high frequency switching power converters.
摘要翻译：提出了一种同步迟滞功率转换器开关频率的新颖方法。该方法包括产生时钟信号和注入在转换器的主环路中以产生的时钟频率工作的周期性干扰信号，以使迟滞功率转换器在时钟频率上切换。所提出的方法相对于使用频率锁定环路，锁相环或延迟锁定环路电路的更传统的方式提供了显着的优点，主要是由于其简单性，更快的锁定和大大降低的相位误差。开关频率可以高于或低于功率转换器的自由运行频率，条件是自由运行频率足够接近所需的开关频率。该方法用于降压和升压滞环高频开关电源转换器。

7. 发明申请

US20120132958A1 High performance transistor 审中-公开
标题翻译：高性能晶体管
公开(公告)号：US20120132958A1
公开(公告)日：2012-05-31
申请号：US12927853
申请日：2010-11-29
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/785 , H01L29/0676 , H01L29/1037 , H01L29/78 , H01L29/7853 , H01L29/7854
摘要： A novel semiconductor transistor is presented. The semiconductor structure has a gate region forming a channel with repetitive patterns in the direction perpendicular to the current flow, so that the portion of its channel that is not strictly planar contributes to a significant reduction of the silicon area occupied by the device. It offers the advantage of lower on-resistance for the same silicon area while improving on its dynamic performances. The additional cost to shape the channel region of the device in periodic repetitive patterns is minimum, which makes the present invention easy to implement in any conventional CMOS process technology and very cost effective.
摘要翻译：提出了一种新型的半导体晶体管。该半导体结构具有在垂直于电流的方向上形成具有重复图案的沟道的栅极区域，使得其沟道部分不严格平面的部分有助于器件占用的硅面积的显着减小。它为同一硅片区域提供了更低导通电阻的优点，同时提高了其动态性能。以周期性重复图案形成设备的通道区域的额外成本是最小的，这使得本发明易于在任何常规CMOS工艺技术中实现并且非常成本有效。

8. 发明授权

US08803288B1 Analog transcap device 有权
标题翻译：模拟转录设备
公开(公告)号：US08803288B1
公开(公告)日：2014-08-12
申请号：US13888368
申请日：2013-05-07
申请人： Fabio Alessio Marino , Paolo Menegoli
发明人： Fabio Alessio Marino , Paolo Menegoli
IPC分类号： H01L27/12 , H01L29/93
CPC分类号： H01L29/93 , H01G7/00 , H01G7/06 , H01L29/94
摘要： A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.
摘要翻译：提出了一种新型的半导体可变电容器。半导体结构简单，基于适用于集成电路的半导体可变MOS电容器结构，其具有至少三个端子，其中之一用于通过增加或减少其直流电压来调制MOS结构的等效电容器面积相对于器件的另一个端子，以便在宽范围的值上改变电容。此外，本发明解耦AC信号和DC控制电压，避免了失真，提高了设备的性能，如其控制特性。本发明是简单的，并且只是稍微依赖于由于制造过程而引起的变化。它表现出高的电容密度值，并且如果适当地实现，则显示电容值相对于其控制端的电压的准线性相关性。

9. 发明授权

US08629668B2 Multi-phase synthetic ripple power converter 有权
标题翻译：多相合成波纹电源转换器
公开(公告)号：US08629668B2
公开(公告)日：2014-01-14
申请号：US13200049
申请日：2011-09-19
申请人： Paolo Menegoli , Fabio Alessio Marino
发明人： Paolo Menegoli , Fabio Alessio Marino
IPC分类号： H02M3/158
CPC分类号： H02M3/1584 , H02M2003/1586
摘要： A novel method to operate synthetic ripple multi-phase switching power converters at constant frequency is presented. The method includes the means for sensing the current in each phase without adding extra dissipation and for balancing the currents by affecting the synthetic ripple signal to modulate the duty cycle without disturbing the overall output voltage regulation.Furthermore a method for obtaining optimum load transient response is presented. The method includes the means for simply determining the derivative of the synthetic ripple signal and for forcing maximum duty cycle until the derivative of the synthetic ripple signal reaches a certain threshold. A variant of this method improves further the load transient response by coupling an RC network to the ramp signal generated to modulate the duty cycle so as to maintain the maximum duty cycle a bit longer after the derivative of the synthetic ripple signal has reached the zero value.
摘要翻译：提出了一种以恒定频率操作合成波纹多相开关电源转换器的新颖方法。该方法包括用于感测每相中的电流的装置，而不增加额外的耗散并且通过影响合成纹波信号来平衡电流，以调制占空比而不干扰整个输出电压调节。此外，提出了一种获得最佳负载瞬态响应的方法。该方法包括用于简单地确定合成纹波信号的导数并迫使最大占空比直到合成纹波信号的导数达到一定阈值的装置。该方法的一个变型通过将RC网络耦合到产生的斜坡信号来进一步改善负载瞬态响应，以调制占空比，以便在合成纹波信号的导数达到零值之后将最大占空比保持一点更长。

10. 发明申请

US20130162228A1 Single Inductor Multiple Output Power Converter 有权
标题翻译：单电感多输出功率转换器
公开(公告)号：US20130162228A1
公开(公告)日：2013-06-27
申请号：US13332918
申请日：2011-12-21
申请人： Paolo Menegoli , Fabio Alessio Marino
发明人： Paolo Menegoli , Fabio Alessio Marino
IPC分类号： G05F1/577
CPC分类号： H02M3/158 , H02M2001/0025 , H02M2001/0032 , H02M2001/009 , Y02B70/16
摘要： A novel method to operate and control single inductor multiple output switching power converter is presented. The method includes the means for generating one or more synthetic ripple signals and operating the converter at constant switching frequency allowing high frequency operation, maintaining stability in all conditions with minimum cross regulation between the outputs independently on the levels of load present at the outputs. The method further includes means for setting the maximum frequency of multiplexing the energy stored in the inductor between the various outputs reaching the desired compromise between the value of the output capacitors, the switching frequency of the output power devices and the acceptable output voltage ripple.Two different topologies are proposed that can be used for single inductor multiple output buck power converters and for boost power converter allowing the extension to buck-boost configurations as well.
摘要翻译：提出了一种操作和控制单电感多输出开关电源转换器的新方法。该方法包括用于产生一个或多个合成纹波信号并且以恒定开关频率操作转换器的装置，其允许高频操作，在输出端存在的负载水平上独立地在输出之间保持最小交叉调节的所有条件下保持稳定性。该方法还包括用于设置多个输出电容器的值，输出功率器件的开关频率和可接受的输出电压纹波之间在各种输出之间存储在电感器中的能量的最大频率达到期望的折衷的装置。提出了两种不同的拓扑结构，可以用于单电感多输出降压功率转换器和升压功率转换器，以允许扩展降压 - 升压配置。

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