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1. 发明授权

US5301324A Method and apparatus for dynamic work reassignment among asymmetric, coupled processors 失效
标题翻译：不对称耦合处理器之间动态工作重新分配的方法和装置
公开(公告)号：US5301324A
公开(公告)日：1994-04-05
申请号：US978601
申请日：1992-11-19
申请人： Pamela H. Dewey , William J. Glynn , Roger E. Hough , Manohar R. Rao
发明人： Pamela H. Dewey , William J. Glynn , Roger E. Hough , Manohar R. Rao
IPC分类号： G06F15/16 , G06F9/46 , G06F9/48 , G06F9/50 , G06F15/177 , G06F9/30
CPC分类号： G06F9/5044 , G06F9/4856 , G06F9/5055
摘要： A tightly-coupled processor complex comprises two or more processors, the complex being asymmetric in that a feature available on one processor is not available on at least one other processor. A work selection mechanism selects one of a set of one or more ready work units, each capable of execution on one or more of the asymmetric processors. A processor set identification function identifies an "indirect idle" set of processors which can participate as hosts in work reassignment to make use of a previously idle processor, and identifies an "indirect bump" set of processors which can participate as hosts in work reassignment to displace a lowest priority work unit previously executing - any work reassignment being initiated by an assigner means and comprising an optimized number of work reassignment steps reassigning work among one of the processor sets to accomplish a related assignment goal (making use of a previously idle processor, or displacing a lowest priority work unit).
摘要翻译：紧密耦合的处理器复合体包括两个或多个处理器，该复合体是不对称的，因为在一个处理器上可用的特征在至少一个其它处理器上不可用。工作选择机构选择一个或多个准备好的工作单元中的一个，每个准备工作单元能够在一个或多个非对称处理器上执行。处理器集识别功能识别可以作为主机参与工作重新分配的“间接空闲”处理器集合，以利用先前空闲的处理器，并且识别作为主机参与工作重新分配的“间接突发”处理器集合移位先前执行的最低优先级的工作单元 - 由分配器装置启动的任何工作重新分配，并且包括优化数量的工作重新分配步骤，在一个处理器集之间重新分配工作以完成相关的分配目标（利用先前空闲的处理器，或置换最低优先级的工作单元）。

2. 发明授权

US5555414A Multiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervals 失效
标题翻译：多处理系统包括主机I / O的门控和外部启用，以轮询间隔启用客户端
公开(公告)号：US5555414A
公开(公告)日：1996-09-10
申请号：US355566
申请日：1994-12-14
申请人： Roger E. Hough , Robert E. Murray
发明人： Roger E. Hough , Robert E. Murray
IPC分类号： G06F13/24 , G06F13/00
CPC分类号： G06F13/24
摘要： A data processing system operating under a multiprocessing hypervisor program subject to I/O interrupts during a polling interval of the hypervisor program includes one or more processors for executing the hypervisor program and host system and one or more guest systems under the hypervisor program, a storage system connected to the processor's by a bus for storing instructions, data and control information associated with the systems being executed by the processor, the storage system may be partitioned into a number of separate areas each associated with one of the concurrently operating systems, an input/output subsystem for generating I/O interrupts to the processors, apparatus for testing to determine if the system is operating in an interpretive execution mode, apparatus for determining whether a dedicated region facility is active, apparatus for testing whether an I/O enablement mask for a guest system has been set, apparatus for setting a flag if the guest system I/O enablement mask is set, apparatus for testing the flag during each polling interval of the interpretive execution mode, apparatus for loading a control byte from a host control register into a hardware register if the flag has not been set and a count threshold reached, apparatus for testing for host system I/O interrupts and apparatus for switching to the host system if the host system interrupt is present.
摘要翻译：在管理程序的轮询间隔期间受到I / O中断的多处理管理程序操作的数据处理系统包括用于执行管理程序程序和主机系统的一个或多个处理器以及管理程序程序下的一个或多个客户系统，存储器系统通过总线连接到处理器，用于存储与由处理器执行的系统相关联的指令，数据和控制信息，存储系统可以被划分成多个单独的区域，每个区域与并行操作系统之一相关联，输入 /输出子系统，用于产生对处理器的I / O中断，用于测试的装置，用于确定系统是否在解释执行模式下操作;用于确定专用区域设施是否活动的装置，用于测试I / O使能掩模对于客系统已设置，如果客系统I / O启用，则设置标志的设备设置掩码，用于在解释执行模式的每个轮询间隔期间测试标志的装置，用于在没有设置标志并达到计数阈值时将控制字节从主机控制寄存器加载到硬件寄存器的装置，用于测试的装置如果主机系统中断存在，则用于主机系统I / O中断和切换到主机系统的设备。

3. 发明授权

US5317705A Apparatus and method for TLB purge reduction in a multi-level machine system 失效
标题翻译：用于多级机器系统中TLB吹扫减少的装置和方法
公开(公告)号：US5317705A
公开(公告)日：1994-05-31
申请号：US112174
申请日：1993-08-26
申请人： Patrick M. Gannon , Peter H. Gum , Roger E. Hough , Robert E. Murray
发明人： Patrick M. Gannon , Peter H. Gum , Roger E. Hough , Robert E. Murray
IPC分类号： G06F12/10 , G06F12/02
CPC分类号： G06F12/1036
摘要： A system for reducing purging of a translation lookaside buffer (TLB) to reduce operating system overhead in a system running multiple levels of virtual machines. A system typically must purge TLB entries whenever an underlying page table entry is invalidated due to paging activity on the host machine, or an underlying guest machine. A system for reducing the number of cases in which guest translations are based on host page table entries is provided. Additional logic is supplied to analyze each invalidate page table entry (IPTE) instruction to minimize the extent of purging required as a result of that instruction. When the region relocate facility is in operation, or when no pageable TLB's have been constructed, only the entry corresponding to the page table entry to be invalidated need be purged. This limited purging reduces the overhead by reducing the time spent in purging and the time required in address translation to rebuild the TLB. This time saving results in increased performance in systems with multi-level guests.
摘要翻译：用于减少翻译后备缓冲器（TLB）的清除以减少运行多级虚拟机的系统中的操作系统开销的系统。由于主机或基础客机上的分页活动，每当基础页表项无效时，系统通常必须清除TLB条目。提供了一种用于减少客户转换基于主机页表项的情况的系统。提供附加逻辑来分析每个无效页表项（IPTE）指令，以最小化该指令所需的清除范围。当区域重新定位设施正在运行时，或者当没有构建可页面的TLB时，只需要清除与该页表项对应的条目即可。这种有限的清除通过减少清除时间和地址转换所需的时间来重建TLB来减少开销。节省时间可以提高具有多级客人的系统的性能。

4. 发明授权

US4604694A Shared and exclusive access control 失效
标题翻译：共享和独占访问控制
公开(公告)号：US4604694A
公开(公告)日：1986-08-05
申请号：US561613
申请日：1983-12-14
申请人： Roger E. Hough
发明人： Roger E. Hough
IPC分类号： G06F12/00 , G06F9/46 , G06F9/48 , G06F9/52 , G06F15/16 , G06F15/177
CPC分类号： G06F9/52
摘要： A method for controlling both shared and exclusive access for a resource in a multiprocessor system wherein a first-in/first-out queue is formed for tasks suspended while awaiting access and wherein access to the resource provides that control of access required for manipulation of the first-in/first-out queue which is not provided by the atomic nature of compare (double) and swap. Each member of the queue has indicators of the access it requested and of the next most recently enqueued member which has a corresponding indicator. A lockword is established having two parts, a lock flag indicating the status of the resource, whether available, under shared ownership or under exclusive ownership and a lock pointer pointing to the most recently enqueued task. In requesting or releasing access, an initial guess is made as to the value of the lockword and a projected lockword is calculated based on the guess. Then an atomic reference is made to the lockword during which no other multiprocessor has access to the lockword. During the atomic reference, the lockword is compared to the guess of the lockword and if the guess is correct, the lockword is replaced by the projected lockword which rearranges the queue for the requesting or releasing task. If the guess was incorrect, the value of the lockword is used to calculate another projected lockword. If another task can affect the next tasks to gain access, the process with the atomic reference is repeated until no intervening changes occur between atomic references.
摘要翻译：一种用于控制多处理器系统中的资源的共享和排他访问的方法，其中为等待访问期间暂停的任务形成先入先出队列，并且其中对资源的访问提供对操纵所需的访问所需的访问控制比较（双）和交换的原子性质不提供先进先出队列。队列的每个成员都有其请求的访问的指示符和具有相应指示符的下一个最近入队的成员。锁定词被建立，具有两个部分，指示资源的状态的锁定标志，无论是在共享所有权还是独占所有权下可用，以及指向最近入队的任务的锁定指针。在请求或释放访问时，对锁字的值进行初步猜测，并根据猜测计算出预设的锁字。然后对锁字词进行原子参考，在此期间没有其他多处理器可以访问锁字。在原子参考期间，将锁字与锁字词的猜测进行比较，如果猜测是正确的，则锁字将被重新排列用于请求或释放任务的队列的预设锁字替代。如果猜测不正确，则锁字的值用于计算另一个预计的锁字。如果另一个任务可以影响下一个获取访问权限的任务，则重复原子引用的进程，直到在原子引用之间不发生任何中间的更改。

5. 发明授权

US5404563A Scheduling normally interchangeable facilities in multiprocessor computer systems 失效
标题翻译：在多处理器计算机系统中安排通常可互换的设施
公开(公告)号：US5404563A
公开(公告)日：1995-04-04
申请号：US181379
申请日：1994-01-14
申请人： Lucina L. Green , Peter H. Gum , Roger E. Hough , Sandra L. Rankin , Stephen J. Schmandt , Ronald M. Smith, Sr. , Vincent A. Spano , Phil C. Yeh , Devon S. Yu
发明人： Lucina L. Green , Peter H. Gum , Roger E. Hough , Sandra L. Rankin , Stephen J. Schmandt , Ronald M. Smith, Sr. , Vincent A. Spano , Phil C. Yeh , Devon S. Yu
IPC分类号： G06F9/48 , G06F9/00 , G06F11/20
CPC分类号： G06F9/4881
摘要： A system and method for dispatching logical central processing units (CPUs) among physical CPUs in a multiprocessor computer system having multiple logical partitions, wherein the cryptographic facilities may not be interchangeable. According to the present invention, the logical CPUs are dispatched among the physical CPUs according to either an affinity, floating, or disabled scheduling method. The affinity scheduling method is used when the crypto facilities are not interchangeable or when non-interchangeable crypto functions are performed. The floating scheduling method is used when the cryptographic facilities are interchangeable and interchangeable crypto functions are performed. The disabled scheduling method is used when the logical CPU is not authorized to issue cryptographic instructions.
摘要翻译：一种用于在具有多个逻辑分区的多处理器计算机系统中的物理CPU之间调度逻辑中央处理单元（CPU）的系统和方法，其中所述密码设施可能不可互换。根据本发明，根据亲和度，浮动或无效调度方法在物理CPU之间分派逻辑CPU。当密码设施不可互换或者当不可互换的密码功能被执行时，使用亲和度调度方法。当加密设施是可互换的并且可互换的密码功能被执行时，使用浮动调度方法。当逻辑CPU没有授权发布加密指令时，使用禁用的调度方法。

6. 发明授权

US5381535A Data processing control of second-level quest virtual machines without host intervention 失效
标题翻译：二级任务虚拟机的数据处理控制，无需主机干预
公开(公告)号：US5381535A
公开(公告)日：1995-01-10
申请号：US150332
申请日：1993-11-09
申请人： Peter H. Gum , Roger E. Hough , Robert E. Murray
发明人： Peter H. Gum , Roger E. Hough , Robert E. Murray
IPC分类号： G06F9/455 , G06F9/48 , G06F12/00
CPC分类号： G06F9/4843 , G06F9/45558 , G06F2009/45566
摘要： A data processing system operated with multiple levels of virtual machine guests under a host control program. The second level of guests are invoked, operated, and terminated without host intervention, as has been required in prior systems, to significantly increase the operating efficiency of the system. Address translation is done by providing machine capability to translate second level guest addresses to real memory addresses taking advantage of the first level guest being located at a simple offset within real memory. Special facilities for second level guests periodically test for timing interruptions for second level guests and update the second level guest timing facilities.
摘要翻译：一个数据处理系统，在主机控制程序下由多级虚拟机客户端操作。如先前的系统所要求，第二层次的客人被调用，操作和终止，无需主机干预，从而显着提高系统的运行效率。地址转换是通过提供机器能力来将二级客户地址转换为实际存储器地址，利用第一层客户端位于实际存储器内的简单偏移处。第二级客人的特别设施定期测试二级客人的时间间隔，并更新二级宾客时间设施。

7. 发明授权

US4843541A Logical resource partitioning of a data processing system 失效
标题翻译：数据处理系统的逻辑资源划分
公开(公告)号：US4843541A
公开(公告)日：1989-06-27
申请号：US79314
申请日：1987-07-29
申请人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
发明人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50 , G06F12/10
CPC分类号： G06F9/4843 , G06F9/5077
摘要： The embodiment discloses a method and means for partitioning the resources in a data processing system into a plurality of logical partitions. Host control code may be embodied in programming, microcode, or by special hardware to enable highly efficient operation of a plurality of preferred guest programming systems in the different partitions of the system. The main storage, expanded storage, the channel, and subchannel resources of a system are assigned to the different logical partitions in the system to enable a plurality of preferred guest programming systems to run simultaneously in the different partitions. This invention automatically relocates the absolute addresses of the I/O channel and subchannel resources in the system to their assigned partitions. Also the absolute and virtual addresses of the different guest programming systems are relocated into, as well as page addresses for any expanded storage, their assigned partitions. The guest programming systems generally will be different operating systems. The logical CPU(s) of the guests are dispatched on one or plural real CPUs in the system using the S/370XA SIE (start interpretive execution) instruction. Special operations are provided, including the CPU alerting of other guests in different partitions using I/O interruption signalling. Interception is provided to handle special circumstances.

8. 发明授权

US5636373A System for synchronizing logical clock in logical partition of host processor with external time source by combining clock adjustment value with specific value of partition 失效
标题翻译：通过将时钟调整值与分区的特定值组合，将主机处理器的逻辑分区与外部时间源的逻辑时钟同步的系统
公开(公告)号：US5636373A
公开(公告)日：1997-06-03
申请号：US168281
申请日：1993-12-15
申请人： Beth A. Glendening , Roger E. Hough , Karen Udy , Stephanie W. W. Zhang
发明人： Beth A. Glendening , Roger E. Hough , Karen Udy , Stephanie W. W. Zhang
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： An external time source is connected to a partitioned data processing system, having host processors controlled by a host hypervisor, and having operating systems in the partitions. The host processors each have a timer facility comprising a time-of-day (TOD) clock, and a clock comparator. When the hypervisor detects a need for synchronization between the external time source and a host timer facility, it insulates the operating system in the partition on that host from host synchronization, and synchronizes the host timer facility with the external time source. Subsequently, the operating system is placed into normal execution, with an adjustment value used for timer facility references, and with a synchronization interrupt pending if the operating system is aware of the external time source.
摘要翻译：外部时间源连接到具有由主机管理程序控制的主机处理器并且在分区中具有操作系统的分区数据处理系统。主处理器各自具有包括时钟（TOD）时钟和时钟比较器的定时器设备。当管理程序检测到需要外部时间源和主机定时器设备之间的同步时，它将操作系统与该主机上的分区隔离主机同步，并将主机定时器设备与外部时间源同步。随后，操作系统被置于正常执行中，具有用于定时器设备引用的调整值，并且如果操作系统知道外部时间源，则同步中断等待。

9. 发明授权

US5371867A Method of using small addresses to access any guest zone in a large memory 失效
标题翻译：使用小地址访问大型内存中的任何访客区域的方法
公开(公告)号：US5371867A
公开(公告)日：1994-12-06
申请号：US974393
申请日：1992-11-10
申请人： Jonel George , Roger E. Hough , Moon J. Kim , Allen H. Preston , David E. Stucki , Charles F. Webb
发明人： Jonel George , Roger E. Hough , Moon J. Kim , Allen H. Preston , David E. Stucki , Charles F. Webb
IPC分类号： G06F12/06 , G06F9/46 , G06F12/02 , G06F12/10 , G06F12/08
CPC分类号： G06F12/10
摘要： Enables a host (hypervisor) to access any location in any guest zone in a large memory, when host and guest operands have small addresses that cannot access locations outside of their own zones. System hardware/microcode provides a particular number of windows for host use. Each CPU in the system has one or more window access registers (WARs), and one or more window registers (WRs). The host uses a load WAR instruction to designate each page frame (PF) in the host zone to be used as a host window, and each PF is associated with a respective window number. When the host receives an interception signal requiring the host to access a guest location represented by a guest zone identifier and a guest small address, the host designates one of its window numbers for an access to this guest location. Then, the host executes an activate WR instruction which invokes CPU hardware/microcode that generates a large absolute address for accessing this guest location in the large memory and stores it in a WR associated with the window number. When the host thereafter executes any instruction with an operand small address accessing the host window PF associated with that WR, and CPU hardware/microcode automatically substitutes that guest large address in the WR for the host operand small address for accessing the guest location.
摘要翻译：当主机和访客操作数具有不能访问其本身区域之外的位置的小地址时，使主机（管理程序）能够访问大内存中任何访客区域中的任何位置。系统硬件/微码提供特定数量的主机使用的窗口。系统中的每个CPU都有一个或多个窗口访问寄存器（WARs）和一个或多个窗口寄存器（WR）。主机使用加载WAR指令来指定要用作主机窗口的主机区域中的每个页面帧（PF），并且每个PF与相应的窗口编号相关联。当主机接收到要求主机访问由客户区域标识符和客人小地址表示的客户位置的拦截信号时，主机指定其窗口号码之一用于访问该访客位置。然后，主机执行一个激活WR指令，该指令调用生成大型绝对地址的CPU硬件/微码，用于访问大存储器中的该客户位置，并将其存储在与窗口号相关联的WR中。当主机此后执行任何具有访问与该WR相关联的主机窗口PF的操作数小地址的指令，并且CPU硬件/微代码自动地将该客户机大地址替换为用于访问客户位置的主操作数小地址。

10. 发明授权

US5253344A Method and apparatus for dynamically changing the configuration of a logically partitioned data processing system 失效
标题翻译：用于动态地改变逻辑分区数据处理系统的配置的方法和装置
公开(公告)号：US5253344A
公开(公告)日：1993-10-12
申请号：US755246
申请日：1991-09-05
申请人： James E. Bostick , Roger E. Hough , Suzanne M. John , Jeffrey P. Kubala , Karen M. Noonan , Norman E. Shafa , Ira G. Siegel
发明人： James E. Bostick , Roger E. Hough , Suzanne M. John , Jeffrey P. Kubala , Karen M. Noonan , Norman E. Shafa , Ira G. Siegel
IPC分类号： G06F15/177 , G06F13/00
CPC分类号： G06F15/177 , G06F9/45541 , G06F9/45558 , G06F2009/45579
摘要： A request is made by a system in a first logical partition, within a logically partitioned data processing system, to dynamically change the I/O configuration of the host system in a way that affects a system in a second logical partition. The hypervisor intercepts the request, ensures the serialization of such dynamic I/O requests, and allows dynamic reconfiguration to proceed. Subsequently, the hypervisor determines the effect of the reconfiguration on the second partition, and notifies the second partition of the change.
摘要翻译：由逻辑分区数据处理系统中的第一逻辑分区中的系统进行请求，以影响第二逻辑分区中的系统的方式动态地改变主机系统的I / O配置。管理程序拦截请求，确保这种动态I / O请求的序列化，并允许动态重新配置继续。随后，管理程序确定重配置对第二分区的影响，并通知第二分区。

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