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1. 发明申请

US20050142742A1 Semiconductor device and method of fabrication 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050142742A1
公开(公告)日：2005-06-30
申请号：US10986497
申请日：2004-11-12
申请人： Osamu Tonomura , Hiroshi Miki , Yuichi Matsui , Tomoko Sekiguchi , Kikuo Watanabe
发明人： Osamu Tonomura , Hiroshi Miki , Yuichi Matsui , Tomoko Sekiguchi , Kikuo Watanabe
IPC分类号： H01L27/108 , H01L21/02 , H01L21/336 , H01L21/8242 , H01L21/8246 , H01L27/105
CPC分类号： H01L21/02178 , H01L21/02181 , H01L21/02197 , H01L21/0228 , H01L21/02282 , H01L21/02337 , H01L21/02356 , H01L21/3141 , H01L21/3162 , H01L21/31645 , H01L27/1085 , H01L27/10855 , H01L28/65
摘要： A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused. Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.
摘要翻译：具有DRAM的半导体器件具有电容器，其中电介质膜和上电极层压在包含聚硅氧烷的下电极上，其中在大气中的氧气氧化的天然氧化物膜在其表面上生长至少至少1.5nm 电容器的下电极。此外，在形成电介质膜时，在使用氧化性原料的情况下，二氧化硅膜进一步生长。这导致电容的减小，并且引起漏电流的增加。因此，在形成具有还原性的电介质膜之后，通过热处理促进还原性能，从而减少二氧化膜，实现使下电极表面上的二氧化物膜更薄。

2. 发明授权

US07364965B2 Semiconductor device and method of fabrication 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US07364965B2
公开(公告)日：2008-04-29
申请号：US10986497
申请日：2004-11-12
申请人： Osamu Tonomura , Hiroshi Miki , Yuichi Matsui , Tomoko Sekiguchi , Kikuo Watanabe
发明人： Osamu Tonomura , Hiroshi Miki , Yuichi Matsui , Tomoko Sekiguchi , Kikuo Watanabe
IPC分类号： H01L21/8242
CPC分类号： H01L21/02178 , H01L21/02181 , H01L21/02197 , H01L21/0228 , H01L21/02282 , H01L21/02337 , H01L21/02356 , H01L21/3141 , H01L21/3162 , H01L21/31645 , H01L27/1085 , H01L27/10855 , H01L28/65
摘要： A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused.Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.
摘要翻译：具有DRAM的半导体器件具有电容器，其中电介质膜和上电极层压在包含聚硅氧烷的下电极上，其中在大气中的氧气氧化的天然氧化物膜在其表面上生长至少至少1.5nm 电容器的下电极。此外，在形成电介质膜时，在使用氧化性原料的情况下，二氧化硅膜进一步生长。这导致电容的减小，并且引起漏电流的增加。因此，在形成具有还原性的电介质膜之后，通过热处理促进还原性能，从而减少二氧化膜，实现使下电极表面上的二氧化物膜更薄。

3. 发明授权

US07796426B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07796426B2
公开(公告)日：2010-09-14
申请号：US12090375
申请日：2005-10-17
申请人： Osamu Tonomura , Norikatsu Takaura , Kenzo Kurotsuchi , Nozomu Matsuzaki
发明人： Osamu Tonomura , Norikatsu Takaura , Kenzo Kurotsuchi , Nozomu Matsuzaki
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C7/04 , G11C13/0004 , G11C2013/009 , G11C2013/0092 , G11C2213/79
摘要： A technique capable of improving speed of a set operation, which controls writing rate in a semiconductor device including a memory cell using a phase-change material. The technique uses means for setting a set-pulse voltage to be applied to the phase-change material to have two steps: the first-step voltage sets a temperature of the phase-change memory to a temperature at which the fastest nucleation is obtained; and the second pulse sets the temperature to a temperature at which the fastest crystal growth is obtained, thereby obtaining solid-phase growth of the phase-change material without melting. Moreover, the technique uses means for controlling the two-step voltage applied to the phase-change memory by a two-step voltage applied to a word line capable of reducing the drain current variation.
摘要翻译：一种能够提高设定操作速度的技术，其控制包括使用相变材料的存储单元的半导体器件的写入速度。该技术使用用于设定要施加到相变材料的设定脉冲电压的装置以具有两个步骤：第一步骤电压将相变存储器的温度设置为获得最快成核的温度; 并且第二脉冲将温度设定为获得最快的晶体生长的温度，从而获得相变材料的固相生长而不熔化。此外，该技术使用用于通过施加到能够减小漏极电流变化的字线的两级电压来控制施加到相变存储器的两级电压的装置。

4. 发明申请

US20110016967A1 FLUID DISTRIBUTION DEVICE, MICRO PLANT, METHOD OF DESIGNING FLUID DISTRIBUTION DEVICE, AND METHOD OF DETECTING BLOCKAGE OF FLOW CHANNEL 失效
标题翻译：流体分配装置，微型装置，流体分配装置的设计方法以及检测流路阻塞的方法
公开(公告)号：US20110016967A1
公开(公告)日：2011-01-27
申请号：US12935446
申请日：2009-03-26
申请人： Osamu Tonomura , Satoshi Nagahara , Manabu Kano , Shinji Hasebe
发明人： Osamu Tonomura , Satoshi Nagahara , Manabu Kano , Shinji Hasebe
IPC分类号： G01F7/00 , F15D1/00 , F17D3/00 , G06G7/50
CPC分类号： B01J19/0093 , B01F13/0059 , B01F15/0264 , B01J2219/00889 , B01J2219/00891 , B01J2219/00959 , B01L3/502746 , B01L2200/143 , B01L2200/146 , B01L2300/0864 , G05D7/0186 , G05D7/0694 , Y10T137/8175 , Y10T137/8593
摘要： The present invention provides a fluid distribution device for uniformly distributing and outputting a fluid, which is supplied to an input flow channel, into at least three output flow channels, comprising a plurality of branch flow channels, at least three fluid bifurcation portions, and at least one fluid converging portion, wherein the fluid distribution device is configured to correspond to a pressure drop compartment connection model composed of a fluid balance equation and a pressure balance equation. Furthermore, the present invention provides a micro plant using the fluid distribution device, a method of designing the fluid distribution device and a method of detecting blockage of flow channels of the fluid distribution device.
摘要翻译：本发明提供了一种流体分配装置，用于均匀地分配和输出被提供给输入流动通道的流体至少三个输出流动通道，其包括多个分支流动通道，至少三个流体分叉部分，以及在至少一个流体会聚部分，其中所述流体分配装置被配置为对应于由流体平衡方程和压力平衡方程组成的压降室连接模型。此外，本发明提供一种使用流体分配装置的微型装置，流体分配装置的设计方法以及检测流体分配装置的流路阻塞的方法。

5. 发明授权

US07592272B2 Manufacturing method of semiconductor integrated circuit 有权
标题翻译：半导体集成电路的制造方法
公开(公告)号：US07592272B2
公开(公告)日：2009-09-22
申请号：US11692620
申请日：2007-03-28
申请人： Osamu Tonomura
发明人： Osamu Tonomura
IPC分类号： H01L21/26
CPC分类号： H01L21/0228 , H01L21/02194 , H01L21/3141 , H01L21/31604 , H01L27/10852 , H01L28/90
摘要： An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.
摘要翻译：本发明的目的是提供一种通过原子层沉积方法以高精度控制组合物的方法，其中用于DRAM电容器绝缘膜沉积用于钇稳定的铪的方法。通过引入铪化合物前体，引入钇化合物前体并将氧化剂引入一个循环来进行原子沉积方法。在原子沉积方法中，通过控制引入铪化合物前体和钇化合物前体的时间并且通过每种前体控制样品表面上的OH基的置换比，来准确地控制向铪中添加钇的添加量。

6. 发明申请

US20110003482A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING SYSTEM 有权
标题翻译：制造半导体器件和衬底加工系统的方法
公开(公告)号：US20110003482A1
公开(公告)日：2011-01-06
申请号：US12825012
申请日：2010-06-28
申请人： Arito Ogawa , Sadayoshi Horii , Taketoshi SATO , Hideharu Itatani , Nobuyuki MISE , Osamu Tonomura
发明人： Arito Ogawa , Sadayoshi Horii , Taketoshi SATO , Hideharu Itatani , Nobuyuki MISE , Osamu Tonomura
IPC分类号： H01L21/314 , B05C11/10
CPC分类号： H01L21/31616 , C23C16/303 , C23C16/403 , C23C16/45525 , C23C16/54 , C23C16/56 , H01L21/02178 , H01L21/02181 , H01L21/02194 , H01L21/0228 , H01L21/3141 , H01L21/31604 , H01L21/318 , H01L21/6719 , H01L21/67207 , H01L21/68785 , H01L28/40
摘要： Provided is a method of manufacturing a semiconductor device. In the method, an aluminium-containing insulation film is formed on an electrode film of a substrate by alternately repeating a process of supplying an aluminium precursor into a processing chamber in which the substrate is accommodated and exhausting the aluminium precursor from the processing chamber and a process of supplying an oxidizing or nitriding precursor into the processing chamber and exhausting the oxidizing or nitriding precursor from the processing chamber; and a high permittivity insulation film different from the aluminium-containing insulation film is formed on the aluminium-containing insulation film by alternately repeating a process of supplying a precursor into the processing chamber and exhausting the precursor from the processing chamber and a process of supplying an oxidizing precursor into the processing chamber and exhausting the oxidizing precursor from the processing chamber. In addition, heat treatment is performed on the substrate.
摘要翻译：提供一种制造半导体器件的方法。在该方法中，通过交替地重复将铝前体供给到容纳基板的处理室中并从处理室排出铝前体的工序，在基板的电极膜上形成含铝绝缘膜，将氧化或氮化前体供应到处理室中并从处理室排出氧化或氮化前体的过程; 并且在含铝绝缘膜上形成与含铝绝缘膜不同的高介电常数绝缘膜，通过交替重复将前体供给到处理室中并从处理室排出前体的过程，氧化前体进入处理室并从处理室排出氧化前体。另外，对基板进行热处理。

7. 发明申请

US20050128799A1 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US20050128799A1
公开(公告)日：2005-06-16
申请号：US11002245
申请日：2004-12-03
申请人： Kenzo Kurotsuchi , Norikatsu Takaura , Osamu Tonomura , Motoyasu Terao , Hideyuki Matsuoka
发明人： Kenzo Kurotsuchi , Norikatsu Takaura , Osamu Tonomura , Motoyasu Terao , Hideyuki Matsuoka
IPC分类号： G11C13/00 , G11C11/00 , G11C13/02 , G11C16/02 , G11C17/00 , H01L27/10
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0071 , G11C2013/0078 , G11C2013/009 , G11C2213/76 , G11C2213/79
摘要： In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. At this time, if a constant voltage source is used, not only the phase change portion assumes a state of a low resistance, but also a large current flows, so that a sample concerned is overheated and goes into a state of a high resistance. Thus, it is difficult to make the phase change portion low in resistance stably. When the gate voltage of a memory cell selection transistor QM is controlled with MISFET to afford a low resistance state, the maximum amount of current applied to the sample is limited by the application of a medium-state voltage.
摘要翻译：在非易失性相变存储器中，利用相变部分的电阻变化来记录信息。当相变部分产生焦耳热并保持在特定温度时，其进入低电阻状态。此时，如果使用恒定电压源，则不仅相变部分呈现低电阻状态，而且流过大电流，使得有关样品过热并进入高电阻状态。因此，难以稳定地使相位变化部的电阻低。当用MISFET控制存储单元选择晶体管QM的栅极电压以提供低电阻状态时，施加到样品的最大电流量受到施加中等电压的限制。

8. 发明授权

US08549907B2 Fluid distribution device, micro plant, method of designing fluid distribution device, and method of detecting blockage of flow channel 失效
标题翻译：流体分配装置，微型装置，流体分配装置的设计方法以及检测流路阻塞的方法
公开(公告)号：US08549907B2
公开(公告)日：2013-10-08
申请号：US12935446
申请日：2009-03-26
申请人： Osamu Tonomura , Satoshi Nagahara , Manabu Kano , Shinji Hasebe
发明人： Osamu Tonomura , Satoshi Nagahara , Manabu Kano , Shinji Hasebe
IPC分类号： G01F7/00 , G01F1/00
CPC分类号： B01J19/0093 , B01F13/0059 , B01F15/0264 , B01J2219/00889 , B01J2219/00891 , B01J2219/00959 , B01L3/502746 , B01L2200/143 , B01L2200/146 , B01L2300/0864 , G05D7/0186 , G05D7/0694 , Y10T137/8175 , Y10T137/8593
摘要： The present invention provides a fluid distribution device for uniformly distributing and outputting a fluid, which is supplied to an input flow channel, into at least three output flow channels, comprising a plurality of branch flow channels, at least three fluid bifurcation portions, and at least one fluid converging portion, wherein the fluid distribution device is configured to correspond to a pressure drop compartment connection model composed of a fluid balance equation and a pressure balance equation. Furthermore, the present invention provides a micro plant using the fluid distribution device, a method of designing the fluid distribution device and a method of detecting blockage of flow channels of the fluid distribution device.
摘要翻译：本发明提供了一种流体分配装置，用于均匀地分配和输出被提供给输入流动通道的流体至少三个输出流动通道，其包括多个分支流动通道，至少三个流体分叉部分，以及在至少一个流体会聚部分，其中所述流体分配装置被配置为对应于由流体平衡方程和压力平衡方程组成的压降室连接模型。此外，本发明提供一种使用流体分配装置的微型装置，流体分配装置的设计方法以及检测流体分配装置的流路阻塞的方法。

9. 发明申请

US20090231913A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20090231913A1
公开(公告)日：2009-09-17
申请号：US12090375
申请日：2005-10-17
申请人： Osamu Tonomura , Norikatsu Takaura , Kenzo Kurotsuchi , Nozomu Matsuzaki
发明人： Osamu Tonomura , Norikatsu Takaura , Kenzo Kurotsuchi , Nozomu Matsuzaki
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/0069 , G11C7/04 , G11C13/0004 , G11C2013/009 , G11C2013/0092 , G11C2213/79
摘要： There is provided a technique capable of improving speed of a set operation, which controls writing rate in a semiconductor device including a memory cell using a phase-change material. The technique uses means for setting a set-pulse voltage to be applied to the phase-change material to have two steps: the first-step voltage sets a temperature of the phase-change memory to a temperature at which the fastest nucleation is obtained; and the second pulse sets the temperature to a temperature at which the fastest crystal growth is obtained, thereby obtaining solid-phase growth of the phase-change material without melting. Moreover, the technique uses means for controlling the two-step voltage applied to the phase-change memory by a two-step voltage applied to a word line capable of reducing the drain current variation.
摘要翻译：提供了一种能够提高设定操作的速度的技术，其控制包括使用相变材料的存储单元的半导体器件的写入速度。该技术使用用于设定要施加到相变材料的设定脉冲电压的装置以具有两个步骤：第一步骤电压将相变存储器的温度设置为获得最快成核的温度; 并且第二脉冲将温度设定为获得最快的晶体生长的温度，从而获得相变材料的固相生长而不熔化。此外，该技术使用用于通过施加到能够减小漏极电流变化的字线的两级电压来控制施加到相变存储器的两级电压的装置。

10. 发明授权

US07489552B2 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US07489552B2
公开(公告)日：2009-02-10
申请号：US11501118
申请日：2006-08-09
申请人： Kenzo Kurotsuchi , Norikatsu Takaura , Osamu Tonomura , Motoyasu Terao , Hideyuki Matsuoka , Riichiro Takemura
发明人： Kenzo Kurotsuchi , Norikatsu Takaura , Osamu Tonomura , Motoyasu Terao , Hideyuki Matsuoka , Riichiro Takemura
IPC分类号： G11C11/34
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0071 , G11C2013/0078 , G11C2013/009 , G11C2213/76 , G11C2213/79
摘要： In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state voltage to the control gate, thereby avoiding overheating of the phase change portion.
摘要翻译：在非易失性相变存储器中，利用相变部分的电阻变化来记录信息。当相变部分产生焦耳热并保持在特定温度时，其进入低电阻状态。当控制存储单元选择晶体管QM的栅极电压以提供低电阻状态时，通过向控制栅极施加中等电压来限制施加到相变部分的最大电流量，从而避免过热的相变部。

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