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1. 发明授权

US06317803B1 High-throughput interconnect having pipelined and non-pipelined bus transaction modes 失效
标题翻译：具有流水线和非流水线总线事务模式的高吞吐量互连
公开(公告)号：US06317803B1
公开(公告)日：2001-11-13
申请号：US08721893
申请日：1996-09-27
申请人： Norman J. Rasmussen , Gary A. Solomon , David G. Carson , George R. Hayek , Brent S. Baxter , Colyn Case
发明人： Norman J. Rasmussen , Gary A. Solomon , David G. Carson , George R. Hayek , Brent S. Baxter , Colyn Case
IPC分类号： G06F1300
CPC分类号： G06F13/1615 , G06F13/161 , G06F13/1631
摘要： A high throughput memory access port is provided. The port includes features which provide higher data transfer rates between system memory and video/graphics or audio adapters than is possible using standard local bus architectures, such as PCI or ISA. The port allows memory read and write requests to be pipelined in order to hide the effects of memory access latency. In particular, the port allows bus transactions to be performed in either a non-pipelined mode, such as provided by PCI, or in a pipelined mode. In the pipelined mode, one or more additional memory access requests are permitted to be inserted between a first memory access request and its corresponding data transfer. In contrast, in the non-pipelined mode, an additional memory access request cannot be inserted between a first memory access request and its corresponding data transfer.
摘要翻译：提供了高吞吐量的存储器访问端口。该端口包括在系统内存和视频/图形或音频适配器之间提供比使用标准本地总线架构（如PCI或ISA）可能提供更高数据传输速率的功能。该端口允许内存读取和写入请求流水线，以隐藏内存访问延迟的影响。特别地，端口允许以非流水线模式（例如由PCI提供）或以流水线模式执行总线事务。在流水线模式中，允许在第一存储器访问请求和其对应的数据传送之间插入一个或多个附加存储器访问请求。相比之下，在非流水线模式下，不能在第一存储器访问请求和其对应的数据传输之间插入附加存储器访问请求。

2. 发明授权

US5625779A Arbitration signaling mechanism to prevent deadlock guarantee access latency, and guarantee acquisition latency for an expansion bridge 失效
标题翻译：仲裁信令机制，以防止死锁保证访问延迟，并保证扩展桥的采集延迟
公开(公告)号：US5625779A
公开(公告)日：1997-04-29
申请号：US366964
申请日：1994-12-30
申请人： Gary A. Solomon , Peter D. MacWilliams , George R. Hayek , Nicholas D. Wade , Abid Asghar
发明人： Gary A. Solomon , Peter D. MacWilliams , George R. Hayek , Nicholas D. Wade , Abid Asghar
IPC分类号： G06F13/364 , G06F13/40 , G06F13/36
CPC分类号： G06F13/364 , G06F13/4031 , G06F13/4036
摘要： An arbitration signaling mechanism for an intermediate bus coupled between an expansion bridge and a host bridge that manages communication over the intermediate bus. The host bridge includes a CPU posting buffer for posting transactions between a CPU and the expansion bridge, and a DRAM buffer for storing data to be written into the DRAM. The host bridge also includes an arbiter coupled to receive a request signal from the expansion bridge and any other bus agents coupled to the expansion bridge. Responsive to a request from the expansion bridge, the arbiter empties the CPU posting buffer and the DRAM buffer before asserting an acknowledge signal. A passive release method is provided, which includes signaling a passive release semantic by the expansion bridge during a communication cycle in which the expansion bridge has bus control. The host bridge can grant temporary use of the bus to another bus agent before again granting access to the expansion bridge.
摘要翻译：耦合在扩展桥和主桥之间的中间总线的仲裁信令机制，用于管理通过中间总线的通信。主桥包括用于在CPU和扩展桥之间发布事务的CPU发布缓冲器，以及用于存储要写入到DRAM中的数据的DRAM缓冲器。主桥还包括耦合以从扩展桥接器和耦合到扩展桥的任何其它总线代理接收请求信号的仲裁器。响应于扩展桥的请求，仲裁器在确认确认信号之前清空CPU发布缓冲区和DRAM缓冲区。提供了一种被动释放方法，其包括在扩展桥具有总线控制的通信周期期间通过扩展桥信令发送被动释放语义。主桥可以在再次允许进入扩建桥之前，暂时使用公交车给另一个总线代理。

3. 发明授权

US5740385A Low load host/PCI bus bridge 失效
标题翻译：低负载主机/ PCI总线桥
公开(公告)号：US5740385A
公开(公告)日：1998-04-14
申请号：US358359
申请日：1994-12-19
申请人： George R. Hayek , Brian K. Langendorf , Aniruddha Kundu , Kuljit S. Bains , Gary A. Solomon
发明人： George R. Hayek , Brian K. Langendorf , Aniruddha Kundu , Kuljit S. Bains , Gary A. Solomon
IPC分类号： G06F13/40 , G06F13/00
CPC分类号： G06F13/4027
摘要： A bridge for coupling a host bus to a peripheral component interconnect (PCI) bus. A controller is used to transfer an address from the host bus while a datapath is used to transfer data from the host bus. The address and data is then transferred to the PCI bus over a set of signal lines coupled to the PCI bus such that each signal line transfers at least a portion of the address as well as at least a portion of data.
摘要翻译：用于将主机总线耦合到外围组件互连（PCI）总线的桥。当使用数据路径从主机总线传输数据时，控制器用于从主机总线传输地址。然后将地址和数据通过耦合到PCI总线的一组信号线传送到PCI总线，使得每个信号线传送地址的至少一部分以及数据的至少一部分。

4. 发明授权

US5948094A Method and apparatus for executing multiple transactions within a single arbitration cycle 失效
标题翻译：在单个仲裁周期内执行多个事务的方法和装置
公开(公告)号：US5948094A
公开(公告)日：1999-09-07
申请号：US932745
申请日：1997-09-17
申请人： Gary A. Solomon , Norman J. Rasmussen , Peter D. MacWilliams
发明人： Gary A. Solomon , Norman J. Rasmussen , Peter D. MacWilliams
IPC分类号： G06F13/362 , G06F13/14
CPC分类号： G06F13/3625
摘要： A method of arbitrating among bus agents, wherein a bus agent is permitted multiple transactions within a single arbitration cycle. An arbitration event is initiated, and a request from a bus agent is granted to that bus agent for executing a transaction. A timer is started and the transaction is executed. If the timer does not expire before the transaction is completed, another request from that same bus agent is granted to the bus agent for executing an additional transaction before a subsequent arbitration event is initiated.
摘要翻译：一种在总线代理之间进行仲裁的方法，其中总线代理被允许在单个仲裁周期内的多个事务。启动仲裁事件，并向总线代理授予来自总线代理的请求以执行事务。启动定时器并执行事务。如果定时器在事务完成之前没有到期，那么来自该相同总线代理的另一个请求将被授予总线代理，以便在后续仲裁事件发起之前执行附加事务。

5. 发明授权

US08098669B2 Method and apparatus for signaling virtual channel support in communication networks 有权
标题翻译：在通信网络中用于信令虚拟信道支持的方法和装置
公开(公告)号：US08098669B2
公开(公告)日：2012-01-17
申请号：US10888212
申请日：2004-07-09
申请人： Gary A. Solomon
发明人： Gary A. Solomon
IPC分类号： H04L12/28
CPC分类号： H04L47/10 , H04L41/12 , H04L47/15 , H04L47/16 , H04L47/2433 , H04L47/2441 , H04L47/30
摘要： A method and apparatus for signaling virtual channel support in communication networks. A node receives a data packet from another node to examine whether the other node commonly supports one or more virtual channels of a given type on a point-to-point communication link between the nodes, and the node signaling common support for one or more virtual channels of a given type, based on the content in the received data packet that indicates whether the other node transmitting the data packet has adequate queue resources to support one or more virtual channels of a given type, and based on whether the node has adequate queue resources to support the one or more virtual channels of a given type.
摘要翻译：一种用于在通信网络中信令虚拟信道支持的方法和装置。节点从另一个节点接收数据包，以检查另一个节点是否通常在节点之间的点对点通信链路上支持给定类型的一个或多个虚拟信道，并且该节点对一个或多个虚拟给定类型的信道，基于接收数据分组中的内容，指示发送数据分组的其他节点是否具有足够的队列资源来支持给定类型的一个或多个虚拟信道，并且基于该节点是否具有足够的队列用于支持给定类型的一个或多个虚拟通道的资源。

6. 发明授权

US07320080B2 Power management over switching fabrics 有权
标题翻译：交换结构的电源管理
公开(公告)号：US07320080B2
公开(公告)日：2008-01-15
申请号：US10687512
申请日：2003-10-15
申请人： Gary A. Solomon , Edward Butler , Joseph A. Schaefer
发明人： Gary A. Solomon , Edward Butler , Joseph A. Schaefer
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： H04L29/06 , H04L49/40 , H04L69/324
摘要： A switching fabric handles transactions using a protocol that directs packets based on path routing information. Components participate in transactions using a protocol that issues packets based on physical location of a destination device over the switching fabric, by establishing a virtual link partner relationship between the components.
摘要翻译：交换结构使用基于路径路由信息来引导数据包的协议来处理事务。组件通过在组件之间建立虚拟链路伙伴关系，使用基于通过交换结构的目的地设备的物理位置发布分组的协议来参与事务。

7. 发明授权

US06647454B1 Data transfer through a bridge 有权
标题翻译：通过桥梁进行数据传输
公开(公告)号：US06647454B1
公开(公告)日：2003-11-11
申请号：US09670009
申请日：2000-09-25
申请人： Gary A. Solomon
发明人： Gary A. Solomon
IPC分类号： G06F1320
CPC分类号： G06F13/4059
摘要： A bridge has a first interface that receives a request through a first bus from a requestor that request to read data, and a second interface that forwards the request through a second bus to a device that connects to a memory. The device obtains the requested data from the memory and forwards to the bridge, which then sends the data to the requestor in an appropriate manner.
摘要翻译：桥接器具有通过第一总线从请求器请求读取数据接收请求的第一接口，以及通过第二总线将请求转发到连接到存储器的设备的第二接口。该设备从存储器获取所请求的数据并转发到桥接器，然后桥接器以适当的方式将数据发送到请求者。

8. 发明授权

US06606679B2 Software transparent system and method for peer-to-peer message routing 有权
标题翻译：用于对等消息路由的软件透明系统和方法
公开(公告)号：US06606679B2
公开(公告)日：2003-08-12
申请号：US09997441
申请日：2001-11-28
申请人： Gary A. Solomon , Joseph A. Schaefer
发明人： Gary A. Solomon , Joseph A. Schaefer
IPC分类号： G06F1338
CPC分类号： G06F13/4022 , H04L49/00
摘要： Disclosed are a system and method of transmitting data in a processing platform. A switch may comprise an upstream port coupled to a root device to communicate with a processing system. The switch may also comprise a plurality of downstream ports where each downstream port is adapted to be coupled to a device. Data may be transmitted between downstream ports based upon routing information for transmitting data from the upstream port to each of the downstream ports.
摘要翻译：公开了一种在处理平台中发送数据的系统和方法。交换机可以包括耦合到根设备以与处理系统通信的上游端口。交换机还可以包括多个下游端口，其中每个下行端口适于耦合到设备。可以基于用于从上游端口向每个下游端口发送数据的路由信息，在下游端口之间传输数据。

9. 发明授权

US06401152B1 Method and apparatus for automatically adjusting electrical device address identifications and data routing for a group of electrical devices 有权
标题翻译：用于自动调整一组电气设备的电气设备地址标识和数据路由的方法和装置
公开(公告)号：US06401152B1
公开(公告)日：2002-06-04
申请号：US09333119
申请日：1999-06-14
申请人： Gary A. Solomon , Brad A. Barmore , Phil R. Lehwalder
发明人： Gary A. Solomon , Brad A. Barmore , Phil R. Lehwalder
IPC分类号： G06F1300
CPC分类号： G06F13/4045
摘要： A method and device are provided for managing a group of electrical devices, e.g., coder/decoders (codecs) in a computer system. Members of a group of electrical devices may be located on the motherboard of the computer system, or off the motherboard, such as on a riser card. An address ID module assigns a primary address to designate one of the devices as a primary device. The primary device performs certain functions that are only performed by a single device. Other devices are designated as secondary devices. A signal indicates whether a member of the group of electrical devices is located on the motherboard. If no device is located on the motherboard, the address ID module designates a primary device and secondary devices from among the devices located on the riser card. A routing module routes output signals from the devices to input pins of a controller. If a device is located on the motherboard, it is designated as the primary device by the address ID module, and the other devices are designated secondary devices. A routing module shifts the routing of the output signals from the secondary devices to different pins on the controller.
摘要翻译：提供了一种方法和装置，用于管理一组电气设备，例如计算机系统中的编码器/解码器（编解码器）。一组电气设备的成员可以位于计算机系统的主板上，或者位于主板上，诸如在转接卡上。地址ID模块分配主地址以将其中一个设备指定为主设备。主设备执行仅由单个设备执行的某些功能。其他设备被指定为辅助设备。一个信号指示电气设备组中的成员是否位于主板上。如果主板上没有设备，则地址ID模块从位于转接卡上的设备中指定主设备和辅助设备。路由模块将输出信号从设备传送到控制器的输入引脚。如果设备位于主板上，则由地址ID模块指定为主设备，其他设备被指定为辅助设备。路由模块将来自辅助设备的输出信号的路由转移到控制器上的不同引脚。

10. 发明申请

US20120113988A1 METHOD AND APPARATUS FOR SIGNALING VIRTUAL CHANNEL SUPPORT IN COMMUNICATION NETWORKS 有权
标题翻译：用于在通信网络中进行虚拟通道支持的信号的方法和装置
公开(公告)号：US20120113988A1
公开(公告)日：2012-05-10
申请号：US13352291
申请日：2012-01-17
申请人： Gary A. Solomon
发明人： Gary A. Solomon
IPC分类号： H04L12/56 , H04L12/66
CPC分类号： H04L47/10 , H04L41/12 , H04L47/15 , H04L47/16 , H04L47/2433 , H04L47/2441 , H04L47/30
摘要： A method and apparatus for signaling virtual channel support in communication networks. A node receives a data packet from another node to examine whether the other node commonly supports one or more virtual channels of a given type on a point-to-point communication link between the nodes, and the node signaling common support for one or more virtual channels of a given type, based on the content in the received data packet that indicates whether the other node transmitting the data packet has adequate queue resources to support one or more virtual channels of a given type, and based on whether the node has adequate queue resources to support the one or more virtual channels of a given type.
摘要翻译：一种用于在通信网络中信令虚拟信道支持的方法和装置。节点从另一个节点接收数据包，以检查另一个节点是否通常在节点之间的点对点通信链路上支持给定类型的一个或多个虚拟信道，并且该节点对一个或多个虚拟给定类型的信道，基于接收数据分组中的内容，指示发送数据分组的其他节点是否具有足够的队列资源来支持给定类型的一个或多个虚拟信道，并且基于该节点是否具有足够的队列用于支持给定类型的一个或多个虚拟通道的资源。

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