专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08348601B2 Variable nozzle mechanism 有权
标题翻译：可变喷嘴机构
公开(公告)号：US08348601B2
公开(公告)日：2013-01-08
申请号：US12671163
申请日：2008-10-02
申请人： Noriyuki Hayashi , Yasuaki Jinnai , Hiroshi Suzuki , Yuki Ishii
发明人： Noriyuki Hayashi , Yasuaki Jinnai , Hiroshi Suzuki , Yuki Ishii
IPC分类号： F01D17/16
CPC分类号： F01D17/165 , F05D2220/40 , F05D2250/182 , F05D2250/19 , F05D2260/30 , F05D2260/56
摘要： When changing a nozzle blade angle by rotating a drive ring, a contact load generated between an inner circumferential surface of the drive ring and an outer circumferential surface of a mount can be reduced, allowing the drive ring to rotate smoothly and reducing the amount of wear and a driving force. It is also possible to reduce an impact force, such as engine vibrations, generated at the drive ring when an external force acts, reducing the risk of damage. A plurality of notches (19) are provided at an inner rim of the drive ring (14), and, among inner circumferential surfaces (14a, 14b, 14c, 14d, 14e, 14f, 14g, and 14h) located between the notches (19), when a driving force for rotating the drive ring (14) is applied, the inner diameters of the inner circumferential surfaces (14e, 14f, 14g, and 14h) where the contact load with the outer circumferential surface of a mount becomes large are made larger than the outer diameter of the outer circumferential surface.
摘要翻译：当通过旋转驱动环来改变喷嘴叶片角度时，可以减小在驱动环的内周表面和安装件的外圆周表面之间产生的接触负载，从而允许驱动环平稳地旋转并减少磨损量和驱动力。当外力作用时，还可以减小在驱动环处产生的冲击力，例如发动机振动，减少损坏的风险。在驱动环（14）的内缘设有多个切口（19），在位于切口（14）的内周面（14a，14b，14c，14d，14e，14f，14g，14h）如图19所示，当施加用于使驱动环（14）旋转的驱动力时，与底座的外周面的接触负荷变大的内周面（14e，14f，14g，14h）的内径变大被制成大于外周面的外径。

2. 发明申请

US20100202874A1 VARIABLE NOZZLE MECHANISM 有权
标题翻译：可变的喷嘴机构
公开(公告)号：US20100202874A1
公开(公告)日：2010-08-12
申请号：US12671163
申请日：2008-10-02
申请人： Noriyuki Hayashi , Yasuaki Jinnai , Hiroshi Suzuki , Yuki Ishii
发明人： Noriyuki Hayashi , Yasuaki Jinnai , Hiroshi Suzuki , Yuki Ishii
IPC分类号： F01D17/16
CPC分类号： F01D17/165 , F05D2220/40 , F05D2250/182 , F05D2250/19 , F05D2260/30 , F05D2260/56
摘要： When changing a nozzle blade angle by rotating a drive ring, a contact load generated between an inner circumferential surface of the drive ring and an outer circumferential surface of a mount can be reduced, allowing the drive ring to rotate smoothly and reducing the amount of wear and a driving force. It is also possible to reduce an impact force, such as engine vibrations, generated at the drive ring when an external force acts, reducing the risk of damage. A plurality of notches (19) are provided at an inner rim of the drive ring (14), and, among inner circumferential surfaces (14a, 14b, 14c, 14d, 14e, 14f, 14g, and 14h) located between the notches (19), when a driving force for rotating the drive ring (14) is applied, the inner diameters of the inner circumferential surfaces (14e, 14f, 14g, and 14h) where the contact load with the outer circumferential surface of a mount becomes large are made larger than the outer diameter of the outer circumferential surface.
摘要翻译：当通过旋转驱动环来改变喷嘴叶片角度时，可以减小在驱动环的内周表面和安装件的外圆周表面之间产生的接触负载，从而允许驱动环平稳地旋转并减少磨损量和驱动力。当外力作用时，还可以减小在驱动环处产生的冲击力，例如发动机振动，减少损坏的风险。在驱动环（14）的内缘设有多个切口（19），在位于切口（14）的内周面（14a，14b，14c，14d，14e，14f，14g，14h）如图19所示，当施加用于使驱动环（14）旋转的驱动力时，与底座的外周面的接触负荷变大的内周面（14e，14f，14g，14h）的内径变大被制成大于外周面的外径。

3. 发明授权

US08098308B2 Image processing device and computer-readable storage medium 有权
标题翻译：图像处理装置和计算机可读存储介质
公开(公告)号：US08098308B2
公开(公告)日：2012-01-17
申请号：US12273862
申请日：2008-11-19
申请人： Hideya Aragaki , Takahiro Saito , Yuki Ishii
发明人： Hideya Aragaki , Takahiro Saito , Yuki Ishii
IPC分类号： H04N5/335
CPC分类号： H04N9/045 , H04N5/23229 , H04N9/07 , H04N2209/046
摘要： An image processing device that processes an image signal in which at least one of a predetermined plural number of color signals intended to constitute the image signal in each pixel is missing in accordance with a pixel position comprises: a component separation unit that separates the color signal into a plurality of components including a first component U, which is a skeleton component, and a second component V obtained from the residual difference between the color signal and the first component; a first interpolation unit that interpolates the first component U such that the first component U in a pixel position in which the color signal is missing is interpolated; and a second interpolation unit that interpolates the second component V such that the second component V in a pixel position in which the color signal is missing is interpolated.
摘要翻译：一种图像处理装置，处理其中根据像素位置丢失旨在构成每个像素中的图像信号的预定多个彩色信号中的至少一个的图像信号包括：分量分离单元，其分离颜色信号包括作为骨架部件的第一部件U和从颜色信号与第一部件之间的残差而得到的第二部件V的多个部件; 内插第一分量U的第一内插单元，使得在颜色信号丢失的像素位置中的第一分量U被内插; 以及内插第二分量V的第二内插单元，使得内插色彩信号的像素位置中的第二分量V。

4. 发明申请

US20090135278A1 IMAGE PROCESSING DEVICE AND COMPUTER-READABLE STORAGE MEDIUM 有权
标题翻译：图像处理装置和计算机可读存储介质
公开(公告)号：US20090135278A1
公开(公告)日：2009-05-28
申请号：US12273862
申请日：2008-11-19
申请人： Hideya ARAGAKI , Takahiro Saito , Yuki Ishii
发明人： Hideya ARAGAKI , Takahiro Saito , Yuki Ishii
IPC分类号： H04N9/64
CPC分类号： H04N9/045 , H04N5/23229 , H04N9/07 , H04N2209/046
摘要： An image processing device that processes an image signal in which at least one of a predetermined plural number of color signals intended to constitute the image signal in each pixel is missing in accordance with a pixel position comprises: a component separation unit that separates the color signal into a plurality of components including a first component U, which is a skeleton component, and a second component V obtained from the residual difference between the color signal and the first component; a first interpolation unit that interpolates the first component U such that the first component U in a pixel position in which the color signal is missing is interpolated; and a second interpolation unit that interpolates the second component V such that the second component V in a pixel position in which the color signal is missing is interpolated.
摘要翻译：一种图像处理装置，处理其中根据像素位置丢失旨在构成每个像素中的图像信号的预定多个彩色信号中的至少一个的图像信号包括：分量分离单元，其分离颜色信号包括作为骨架部件的第一部件U和从颜色信号与第一部件之间的残差而得到的第二部件V的多个部件; 内插第一分量U的第一内插单元，使得在颜色信号丢失的像素位置中的第一分量U被内插; 以及内插第二分量V的第二内插单元，使得内插色彩信号的像素位置中的第二分量V。

5. 发明授权

US06432839B1 Film forming method and manufacturing method of semiconductor device 有权
公开(公告)号：US06432839B1
公开(公告)日：2002-08-13
申请号：US09804142
申请日：2001-03-13
申请人： Kazuo Maeda , Noboru Tokumasu , Yuki Ishii , Toshiro Nishiyama
发明人： Kazuo Maeda , Noboru Tokumasu , Yuki Ishii , Toshiro Nishiyama
IPC分类号： H01L2131
摘要： The invention is a method for forming a flattened interlayer insulating film covering a wiring layer or the like of a semiconductor IC device, and a method of manufacturing a semiconductor device. The film-forming method includes the steps of preparing a deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which at least one oxygen is bonded to the phosphorous, and forming a silicon containing insulating film containing P2O3 on a substrate by using the deposition gas.

6. 发明授权

US06252269B1 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US06252269B1
公开(公告)日：2001-06-26
申请号：US09422860
申请日：1999-10-25
申请人： Masatomo Hasegawa , Masato Matsumiya , Satoshi Eto , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii
发明人： Masatomo Hasegawa , Masato Matsumiya , Satoshi Eto , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii
IPC分类号： H01L27108
CPC分类号： H01L21/8249 , H01L27/0214 , H01L27/0623 , H01L27/105 , H01L27/10897
摘要： According to a semiconductor memory for one aspect of the present invention, a memory cell transistor is formed in a P-type first well region which is formed at the surface of a P-type semiconductor substrate, and a back bias voltage is applied to the P-type first well region and the P-type substrate. Further, an N-type retrograde region is formed by implanting a high energy N-type impurity, so that a deeper, N-type second well region is formed by employing the N-type retrograde region. Further, a P-type third well region is formed in the N-type second well region, and a P-type emitter region is also formed therein. Thus, together the P-type emitter region, the N-type second well region, and the P-type third well region constitute a lateral PNP transistor. In addition, the ground voltage is maintained for the P-type third well region, which serves as a collector region.
摘要翻译：根据本发明的一个方面的半导体存储器，在形成在P型半导体衬底的表面的P型第一阱区域中形成存储单元晶体管，并且将反向偏置电压施加到 P型第一阱区和P型衬底。此外，通过注入高能N型杂质形成N型逆行区域，从而通过采用N型逆行区域形成较深的N型第二阱区域。此外，在N型第二阱区中形成P型第三阱区，并且还在其中形成P型发射极区。因此，P型发射极区域，N型第二阱区域和P型第三阱区域一起构成横向PNP晶体管。此外，为作为集电极区域的P型第三阱区域保持接地电压。

7. 发明授权

US06229363B1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06229363B1
公开(公告)日：2001-05-08
申请号：US09224354
申请日：1999-01-04
申请人： Satoshi Eto , Masato Matsumiya , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Masatomo Hasegawa , Toru Koga , Yuki Ishii
发明人： Satoshi Eto , Masato Matsumiya , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Masatomo Hasegawa , Toru Koga , Yuki Ishii
IPC分类号： H03L708
CPC分类号： G11C7/1057 , G06F1/10 , G11C7/1051 , G11C7/22 , G11C7/222 , H03L7/0814 , H03L7/0818 , H03L7/087
摘要： A semiconductor device having the function of generating an internal clock signal delayed by a predetermined phase by adjusting the phase of an external clock signal, includes a first clock phase circuit for roughly adjusting the phase of the external clock signal; and a second clock phase adjusting circuit for controlling the phase of the internal clock signal with higher accuracy than the first clock phase adjusting circuit. The semiconductor device having such a construction executes phase comparisons by the first and second clock phase adjusting circuits independently of each other, and when a phase control operation by the second clock phase adjusting circuit is made subordinate to that of the first clock phase adjusting circuit, the delay time of each of a plurality of delay elements inside the first clock phase adjusting circuit is set to a value larger than a power source jitter resulting from a noise of a power source and a jitter of the external clock signal.
摘要翻译：具有通过调整外部时钟信号的相位而产生延迟预定相位的内部时钟信号的功能的半导体器件包括用于大致调整外部时钟信号的相位的第一时钟相位电路; 以及第二时钟相位调整电路，用于以比第一时钟相位调整电路更高的精度来控制内部时钟信号的相位。具有这种结构的半导体器件执行第一和第二时钟相位调整电路彼此独立的相位比较，并且当第二时钟相位调整电路的相位控制操作从属于第一时钟相位调整电路的相位控制操作时，第一时钟相位调整电路内的多个延迟元件中的每一个的延迟时间被设定为大于由电源的噪声和外部时钟信号的抖动导致的电源抖动的值。

8. 发明授权

US6115284A Memory device with faster write operation 有权
标题翻译：具有更快写入操作的存储器件
公开(公告)号：US6115284A
公开(公告)日：2000-09-05
申请号：US317902
申请日：1999-05-25
申请人： Masato Matsumiya , Satoshi Eto , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Masatomo Hasegawa , Toru Koga , Yuki Ishii
发明人： Masato Matsumiya , Satoshi Eto , Masato Takita , Toshikazu Nakamura , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Masatomo Hasegawa , Toru Koga , Yuki Ishii
IPC分类号： G11C11/409 , G11C7/00 , G11C7/12 , G11C11/407 , G11C11/4094 , G11C11/24
CPC分类号： G11C11/4094 , G11C7/12
摘要： The present invention relates to a memory device including memory cells each formed of a cell transistor connected to bit and word line and a cell capacitor. The memory device includes a pre-charging circuit for pre-charging bit line to a first voltage, a sense amplifier for detecting voltages of bit lines and driving the bit lines to a second voltage for H level or a third voltage for L level, and a word line driving circuit for driving word lines to make the writing voltage for H level of the cell capacitor to a fourth voltage lower than the second voltage. The present invention is characterized in that the first voltage is lower than an intermediate value between the second and third voltages. According to the present invention, it becomes possible to prevent the voltage V.sub.ds of the cell transistor from being zero by setting the writing voltage (fourth voltage) for H level of the cell capacitor to be lower than the voltage for H level (second voltage) of the bit line, thus reducing a time of writing or re-writing data. Additionally, a pre-charge voltage (first voltage) of the bit lines is set to be lower than the half of the amplitude of the bit line. Thereby, it also becomes possible to prevent the very small voltage of the bit line from being smaller according to the lowered H level voltage in the memory cell.
摘要翻译：本发明涉及包括由连接到位和字线的单元晶体管形成的存储单元和单元电容器的存储器件。存储装置包括用于将位线预充电到第一电压的预充电电路，用于检测位线的电压并将位线驱动为用于H电平的第二电压或L电平的第三电压的读出放大器，以及用于驱动字线以使单元电容器的H电平的写入电压低于低于第二电压的第四电压的字线驱动电路。本发明的特征在于，第一电压低于第二和第三电压之间的中间值。根据本发明，通过将单元电容器的H电平的写入电压（第四电压）设定为低于H电平（第二电压）的电压，可以防止单元晶体管的电压Vds为零，的位线，从而减少写入或重写数据的时间。此外，位线的预充电电压（第一电压）被设置为低于位线的幅度的一半。因此，根据存储单元中的低电平电平，也可以防止位线的非常小的电压变小。

9. 发明授权

US08768054B2 Image processing device, image processing method, and computer-readable storage medium storing image processing program 有权
标题翻译：图像处理装置，图像处理方法以及存储图像处理程序的计算机可读存储介质
公开(公告)号：US08768054B2
公开(公告)日：2014-07-01
申请号：US12644533
申请日：2009-12-22
申请人： Hideya Aragaki , Takahiro Saito , Yuki Ishii
发明人： Hideya Aragaki , Takahiro Saito , Yuki Ishii
IPC分类号： G06K9/00 , G06K9/40
CPC分类号： G06T5/40 , G06T5/002 , G06T5/008 , H04N1/4072 , H04N1/409 , H04N1/58
摘要： An image processing device separates an original image signal into a plurality of components including a first component serving as a skeleton component and a second component obtained after the first component is separated from the original image signal, obtains a signal level of the first component or the original image signal, sets a tone conversion coefficient to be applied during tone conversion based on the signal level of the first component or the original image signal, performs tone conversion processing on the first component using the tone conversion coefficient, obtains the signal level of the first component, sets a noise reduction processing parameter on the basis of the signal level of the first component, and reduces a noise of the second component using the noise reduction processing parameter and the tone conversion coefficient.
摘要翻译：图像处理装置将原始图像信号分离为包括作为骨架成分的第一成分和第一成分与原始图像信号分离后获得的第二成分的多个成分，获得第一成分或原始图像信号，基于第一分量或原始图像信号的信号电平设置在色调转换期间应用的色调转换系数，使用色调转换系数对第一分量执行色调转换处理，获得信号电平第一分量，基于第一分量的信号电平设置噪声降低处理参数，并且使用噪声降低处理参数和色调转换系数来降低第二分量的噪声。

10. 发明申请

US20060098523A1 Semiconductor memory device capable of driving non-selected word lines to first and second potentials 失效
标题翻译：能够将未选择的字线驱动到第一和第二电位的半导体存储器件
公开(公告)号：US20060098523A1
公开(公告)日：2006-05-11
申请号：US11313963
申请日：2005-12-22
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C8/00
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.
摘要翻译：半导体器件包括字线驱动电路，用于通过驱动连接到存储单元的字线来重置字线，并且被构造成切换在复位时设置的字线驱动电路的复位电平在诸如地电位的第一电位和诸如负电位的第二电位之间的字线的操作。此外，包括通过布置多个存储单元形成的存储单元阵列和用于产生负电位的字线复位电平发生电路的半导体器件使得可以改变字线复位电平产生电路的电流供应量当通过将字线复位电平产生电路的输出施加到未被选择的字线而将未被选择的字线设置为负电位时，根据操作来改变负电位的电流供给量存储单元阵列。此外，在具有振荡电路和电容器的多个电源电路的半导体装置中，通过由振荡电路输出的振荡信号来驱动电容器，这些电源电路的至少一部分共享振荡电路，不同的电容器由共同的振荡电路输出的振荡信号驱动。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式