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1. 发明授权

US6031291A Common contact hole structure in semiconductor device 失效
标题翻译：半导体器件中常见的接触孔结构
公开(公告)号：US6031291A
公开(公告)日：2000-02-29
申请号：US550159
申请日：1995-10-30
申请人： Norifumi Sato , Takami Hiruma , Hitoshi Mitani , Hidetaka Natsume
发明人： Norifumi Sato , Takami Hiruma , Hitoshi Mitani , Hidetaka Natsume
IPC分类号： H01L27/11 , H01L21/28 , H01L21/8244 , H01L23/48 , H01L23/52 , H01L29/40 , H01L29/76
CPC分类号： H01L21/76895 , H01L21/0276 , H01L21/76816 , H01L27/11 , H01L27/1112
摘要： A semiconductor device having a semiconductor substrate, an impurity diffused layer formed in a principal surface of the semiconductor substrate, a conductive member formed on the semiconductor substrate adjacent to the impurity diffused layer and having a sloped surface inclined to the principal surface of the semiconductor substrate, an insulator film deposited to cover the impurity diffused layer and the conductive member, and a common contact hole formed through the insulator film to extend over a surface of the impurity diffused layer and the sloped surface of the conductive member.
摘要翻译：一种具有半导体衬底的半导体器件，形成在半导体衬底的主表面上的杂质扩散层，形成在与半导体衬底相邻的杂质扩散层上并具有倾斜表面的半导体衬底的主表面的导电部件沉积以覆盖杂质扩散层和导电构件的绝缘膜，以及通过绝缘膜形成的公共接触孔，以在杂质扩散层的表面和导电构件的倾斜表面上延伸。

2. 发明授权

US5770495A Method of fabricating semiconductor device including high temperature heat treatment 失效
标题翻译：制造包括高温热处理的半导体器件的方法
公开(公告)号：US5770495A
公开(公告)日：1998-06-23
申请号：US548913
申请日：1995-10-26
申请人： Nolifumi Sato , Shinji Ohara , Hitoshi Mitani , Hidetaka Natsume , Takami Hiruma
发明人： Nolifumi Sato , Shinji Ohara , Hitoshi Mitani , Hidetaka Natsume , Takami Hiruma
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L21/8234 , H01L21/8247 , H01L23/52 , H01L23/522 , H01L27/088 , H01L29/786 , H01L29/788 , H01L29/792 , H01L21/283 , H01L21/8244
CPC分类号： H01L21/28518
摘要： The invention provides a method of fabricating a semiconductor device, including the steps of (a) forming an impurity region at a surface of a silicon substrate, (b) depositing an insulative film over the silicon substrate, (c) forming a contact hole through the insulative film to expose the impurity region of the silicon substrate, (d) forming an electrode wiring over the contact hole, the electrode wiring comprising a refractory metal silicide film and a silicon film overlying on the metal silicide film, the metal silicide film overlying the exposed impurity region, (e) depositing a second insulative film over a resultant, (f) depositing a polysilicon film on the second insulative film, (g) patterning the polysilicon film to form an element, and (h) heat-treating a resultant at high temperature in oxidizing atmosphere. The step (h) is to be carried out at any time after the step (f) has been completed. In the method, even if a semiconductor device is heat-treated at high temperature in oxidizing atmosphere, there occurs no voids in the silicon substrate below the refractory metal silicide film. This is because silicon atoms are supplied from the silicon film overlying on the refractory metal silicide film to the metal silicide film. Thus, reliable electrical connection between the electrode wiring and the silicon substrate is ensured.
摘要翻译：本发明提供一种制造半导体器件的方法，包括以下步骤：（a）在硅衬底的表面形成杂质区，（b）在硅衬底上沉积绝缘膜，（c）形成接触孔所述绝缘膜暴露所述硅衬底的杂质区域，（d）在所述接触孔上形成电极布线，所述电极布线包括难熔金属硅化物膜和覆盖在所述金属硅化物膜上的硅膜，所述金属硅化物膜覆盖暴露的杂质区域，（e）在结果上沉积第二绝缘膜，（f）在第二绝缘膜上沉积多晶硅膜，（g）图案化多晶硅膜以形成元件，和（h）热处理在高温氧化气氛中产生。步骤（h）将在步骤（f）完成后的任何时间进行。在该方法中，即使半导体器件在氧化气氛中在高温下进行热处理，硅基底中的难熔金属硅化物膜下面也不会发生空隙。这是因为硅原子从覆盖在难熔金属硅化物膜上的硅膜供应到金属硅化物膜。因此，确保电极布线和硅基板之间的可靠的电连接。

3. 发明授权

US5761113A Soft error suppressing resistance load type SRAM cell 失效
标题翻译：软误差抑制电阻负载型SRAM单元
公开(公告)号：US5761113A
公开(公告)日：1998-06-02
申请号：US550348
申请日：1995-10-30
申请人： Hidetaka Natsume , Nolifumi Sato , Hitoshi Mitani , Takami Hiruma
发明人： Hidetaka Natsume , Nolifumi Sato , Hitoshi Mitani , Takami Hiruma
IPC分类号： H01L27/10 , G11C11/412 , G11C11/00
CPC分类号： G11C11/4125
摘要： In an SRAM cell including two cross-coupled inverters each having a first resistance element and a drive MOS transistor, a second resistance element is connected between the first and the drive MOS transistor. A gate electrode of the drive MOS transistor of one of the inverters is connected between the first and second resistance elements of the other.
摘要翻译：在包括两个具有第一电阻元件和驱动MOS晶体管的交叉耦合反相器的SRAM单元中，第二电阻元件连接在第一驱动MOS晶体管和驱动MOS晶体管之间。其中一个逆变器的驱动MOS晶体管的栅电极连接在第一和第二电阻元件之间。

4. 发明申请

US20090206410A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090206410A1
公开(公告)日：2009-08-20
申请号：US12320186
申请日：2009-01-21
申请人： Hitoshi Mitani
发明人： Hitoshi Mitani
IPC分类号： H01L27/088 , H01L21/28 , H01L29/78
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： Semiconductor devices required forming a stress control film to handle different stresses on each side when optimizing the stress on the respective P channel and N channel sections. A unique feature of the semiconductor device of this invention is that P and N channel stress are respectively optimized by making use of a stress control film jointly for the P and N channels that conveys stress in different directions by utilizing the film thickness.
摘要翻译：半导体器件需要形成一个应力控制薄膜来处理各个P沟道和N个沟道部分上的应力时在每一侧上的不同应力。本发明的半导体器件的独特之处在于，通过利用应力控制膜分别优化P和N沟道应力，用于通过利用膜厚度在不同方向传递应力的P沟道和N沟道。

5. 发明授权

US06466233B1 Information processing unit for controlling a plurality of electronic devices and method thereof, and provision medium associated therewith 有权
标题翻译：用于控制多个电子设备的信息处理单元及其方法，以及与其相关联的介质
公开(公告)号：US06466233B1
公开(公告)日：2002-10-15
申请号：US09443808
申请日：1999-11-19
申请人： Hitoshi Mitani
发明人： Hitoshi Mitani
IPC分类号： G06F1700
CPC分类号： H04N21/4126 , H04N5/44582 , H04N7/163 , H04N21/4316 , H04N21/43632 , H04N21/4622 , H04N21/47 , H04N2005/4441
摘要： An information processing unit controls a plurality of electronic devices. The information processing unit includes a storage unit for storing input graphical-user-interface data on the electronic devices, a display unit for displaying graphical user interfaces corresponding to the graphical-user-interface data stored in the storage unit, a detecting unit for detecting user operations corresponding to the graphical user interfaces displayed on the display unit, and a transmitting unit for transmitting control signals controlling the electronic devices in accordance with the results of detection by the detecting unit.
摘要翻译：信息处理单元控制多个电子设备。信息处理单元包括用于在电子设备上存储输入图形用户界面数据的存储单元，用于显示与存储在存储单元中的图形用户界面数据相对应的图形用户界面的显示单元，检测单元与显示单元上显示的图形用户界面相对应的用户操作，以及发送单元，用于根据检测单元的检测结果发送控制电子设备的控制信号。

6. 发明授权

US5287733A Apparatus for receiving liquid treatment samples for disposal 失效
标题翻译：用于接收待处理样品的设备
公开(公告)号：US5287733A
公开(公告)日：1994-02-22
申请号：US765151
申请日：1991-09-23
申请人： Narihiro Oku , Hitoshi Mitani , Hiroaki Takahasi
发明人： Narihiro Oku , Hitoshi Mitani , Hiroaki Takahasi
IPC分类号： G01N33/49 , G01N15/10 , G01N35/00 , G01N35/10 , G01N33/48
CPC分类号： G01N15/10 , G01N35/00 , G01N35/1004 , G01N35/1083
摘要： A system collects fluid waste within a closed waste vessel where a waste disposal cycle is determined based upon the pressure level within the waste vessel. In the preferred embodiment, a closed liquid waste vessel accepts waste solutions through conduits having valves controlling conduit fluid communication with treatment vessels. A pressure sensor determines the level of pressure within the waste vessel. A pressurizing device reduces the level of pressure within the vessel. When the pressure within the vessel is lowered to a predetermined level, the valve is opened. When the pressure sensed within the liquid waste vessel then rises above an appointed value, the valve is closed, completing the waste collection of a treated sample. This corresponds to the point in time when the treatment vessel is empty, allowing a sudden rush of air into the waste vessel, raising the vessel pressure to ambient and closing the valve. When the pressure in the waste vessel does not rise to the appointed value after the lapse of a preset length of time, a warning signal is provided advising that the system is not working properly.
摘要翻译：系统在封闭的废物容器内收集流体废物，其中基于废物容器内的压力水平来确定废物处理循环。在优选实施例中，封闭的液体废物容器通过具有控制导管与流体与处理容器连通的阀的管道接收废液。压力传感器确定废液容器内的压力水平。加压装置降低了容器内的压力水平。当容器内的压力降低至预定水平时，阀打开。当在液体废物容器内感测到的压力升高到高于指定值时，阀门关闭，完成处理过的样品的废物收集。这对应于处理容器为空的时间点，允许空气急剧地进入废物容器，将容器压力升高到环境并关闭阀门。当经过预设时间后废物容器中的压力不会上升到指定值时，提供警告信号，建议系统不能正常工作。

7. 发明授权

US07948063B2 Semiconductor device with stress control film utilizing film thickness 失效
标题翻译：具有应力控制薄膜的半导体器件利用薄膜厚度
公开(公告)号：US07948063B2
公开(公告)日：2011-05-24
申请号：US12320186
申请日：2009-01-21
申请人： Hitoshi Mitani
发明人： Hitoshi Mitani
IPC分类号： H01L23/58 , H01L27/092 , H01L21/70
CPC分类号： H01L21/823807 , H01L27/092 , H01L29/7843
摘要： Semiconductor devices required forming a stress control film to handle different stresses on each side when optimizing the stress on the respective P channel and N channel sections. A unique feature of the semiconductor device of this invention is that P and N channel stress are respectively optimized by making use of a stress control film jointly for the P and N channels that conveys stress in different directions by utilizing the film thickness.
摘要翻译：半导体器件需要形成一个应力控制薄膜来处理各个P沟道和N个沟道部分上的应力时在每一侧上的不同应力。本发明的半导体器件的独特之处在于，通过利用应力控制膜分别优化P和N沟道应力，用于通过利用膜厚度在不同方向传递应力的P沟道和N沟道。

8. 发明申请

US20080193047A1 Imaging apparatus and imaging method 失效
标题翻译：成像设备及成像方法
公开(公告)号：US20080193047A1
公开(公告)日：2008-08-14
申请号：US12012887
申请日：2008-02-06
申请人： Hitoshi Mitani
发明人： Hitoshi Mitani
IPC分类号： G06K9/20
CPC分类号： H04N5/23293 , H04N5/23296 , H04N7/0122
摘要： An imaging apparatus includes imaging means for imaging an image at a first aspect ratio, and image processing means for converting an original image at the first aspect ratio, which is imaged by the imaging means, to a converted image at a second aspect ratio, which is different from the first aspect ratio, by discarding a section of the original image as a discard section, and creating the converted image by, if the selected magnification of the converted image is lower than that of the original image, reducing the size of the original image according to the magnification and then adding a margin to the reduced original image and discarding the discard section according to the magnification as necessary.
摘要翻译：一种成像装置包括：成像装置，用于以第一纵横比对图像进行成像;以及图像处理装置，用于将由成像装置成像的第一纵横比的原始图像以第二纵横比转换为转换图像，通过将原始图像的一部分丢弃为丢弃部分，并且通过转换图像的所选倍率低于原始图像的大小来创建转换后的图像，与第一宽高比不同，根据放大率原始图像，然后向缩小的原始图像添加余量，并根据需要根据放大倍数丢弃丢弃部分。

9. 发明申请

US20080142922A1 Semiconductor chip 失效
标题翻译：半导体芯片
公开(公告)号：US20080142922A1
公开(公告)日：2008-06-19
申请号：US12000514
申请日：2007-12-13
申请人： Hitoshi Mitani
发明人： Hitoshi Mitani
IPC分类号： H01L25/00
CPC分类号： H01L23/5258 , H01L23/62 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Provided is a semiconductor chip (1) including: at least one fuse element (21); a fuse opening (17) formed above the fuse element (21); and a discharge electrode (31) that is formed below a bottom portion (17a) of the fuse opening (17), and is formed in one of the same layer with the fuse element (21) and the above layer of the fuse element (21). Accordingly, the current caused to flow due to the electrostatic discharge generated at the time of assembling the semiconductor chip can be discharged through the discharge electrode (31). As a result, the current caused to flow due to the electrostatic discharge generated at the time of assembling the semiconductor chip can be prevented from being discharged through the fuse element, whereby a problem in that a functional failure occurs in the semiconductor chip can be solved.
摘要翻译：提供一种半导体芯片（1），包括：至少一个熔丝元件（21）; 形成在熔丝元件（21）上方的保险丝开口（17）; 以及形成在熔断器开口（17）的底部（17a）下方的放电电极（31），并且与熔丝元件（21）和熔丝元件的上述层形成在同一层中的一个层（21）。因此，由于在组装半导体芯片时产生的静电放电引起的流过的电流可以通过放电电极（31）放电。结果，可以防止由于在组装半导体芯片时产生的静电放电而流过的电流通过熔丝元件放电，从而可以解决在半导体芯片中发生功能故障的问题。

10. 发明授权

US5949113A Static RAM having a stable high-resistance load 失效
标题翻译：具有稳定的高电阻负载的静态RAM
公开(公告)号：US5949113A
公开(公告)日：1999-09-07
申请号：US25154
申请日：1998-02-18
申请人： Noriyuki Ota , Shingo Hashimoto , Hitoshi Mitani
发明人： Noriyuki Ota , Shingo Hashimoto , Hitoshi Mitani
IPC分类号： H01L23/522 , H01L21/768 , H01L21/822 , H01L21/8244 , H01L27/04 , H01L27/11 , H01L29/76 , H01L29/00
CPC分类号： H01L27/11 , H01L27/1112 , Y10S257/904
摘要： A static RAM has a low resistive contact film disposed in direct contact with a storage node of a memory cell and the gate electrode of a driver transistor in a through-hole, and in direct contact with an end portion of a high-resistance load. An accurate and stable resistance can be obtained for the high-resistance load without raising the contact resistance between the storage node and the gate electrode of the driver transistor.
摘要翻译：静态RAM具有与存储单元的存储节点和通孔中的驱动晶体管的栅电极直接接触并与高电阻负载的端部直接接触的低电阻接触膜。对于高电阻负载，可以获得精确且稳定的电阻，而不会增加存储节点和驱动晶体管的栅电极之间的接触电阻。

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