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    • 1. 发明授权
    • Method of forming low resistance common source line for flash memory devices
    • 形成用于闪存器件的低电阻公共源线的方法
    • US06596586B1
    • 2003-07-22
    • US10152747
    • 2002-05-21
    • Nian YangUn Soon KimZhigang Wang
    • Nian YangUn Soon KimZhigang Wang
    • H01L21336
    • H01L27/11521H01L27/115H01L27/11517
    • A low resistance common source line (12) for high performance NOR-type flash memories cells in different bit-lines but on the same word-line is used to reduce the memory core cell size and to improve the circuit density as the device dimensions are scaled down. For advanced flash memory technology where shallow trench isolation (STI) (4) is used, the common source formation (12) is facilitated by a VCI implant (11) performed before STI field oxide fill (5). The process sequence is to first form the trenches (4) for the subsequent STI (4), then apply the VCI mask (10) and perform the VCI high energy ion implant (11) to form the “future” source line (12). Then field oxide fill (5) is deposited into the STI trench (4) to form the desired field isolation structures and the memory circuit is completed using conventional techniques.
    • 用于不同位线但在相同字线上的高性能NOR型闪速存储器单元的低电阻公共源线(12)用于减小存储器核心单元的尺寸并提高电路密度,因为器件尺寸 缩小比例。 对于使用浅沟槽隔离(STI)(4))的高级闪存技术,通过在STI场氧化物填充(5)之前执行的VCI注入(11)来促进公共源形成(12)。 处理顺序是首先形成随后的STI(4)的沟槽(4),然后施加VCI掩模(10)并执行VCI高能离子注入(11)以形成“未来”源极线(12) 。 然后将场氧化物填充物(5)沉积到STI沟槽(4)中以形成所需的场隔离结构,并且使用常规技术完成存储器电路。