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1. 发明授权

US07432575B2 Two-layer electrical substrate for optical devices 有权
标题翻译：用于光学器件的两层电气基板
公开(公告)号：US07432575B2
公开(公告)日：2008-10-07
申请号：US10864099
申请日：2004-06-08
申请人： Neeraj Anil Pendse , Jia Liu , Jitendra Mohan , Bruce Carlton Roberts , Luu Thanh Nguyen , William Paul Mazotti
发明人： Neeraj Anil Pendse , Jia Liu , Jitendra Mohan , Bruce Carlton Roberts , Luu Thanh Nguyen , William Paul Mazotti
IPC分类号： H01L31/0203
CPC分类号： H05K1/0219 , G02B6/4201 , H01L23/49838 , H01L25/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2924/00014 , H01L2924/10253 , H01L2924/30107 , H01L2924/3011 , H05K1/189 , H05K3/403 , H05K2201/0715 , H05K2201/09236 , H05K2201/10121 , H01L2924/00 , H01L2224/48 , H01L2224/05644
摘要： A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
摘要翻译：描述了高性能和小规模的电路基板。电路基板包括介电层，附接到电介质层的底表面的返回平面以及附着到电介质层顶表面的多个返回路径（接地）和信号线。顶表面上的返回路径通过围绕电介质材料的至少一个边缘缠绕在底表面上的返回平面上。顶层上的返回路径也可以分离每对或相邻的信号线。电路基板可以有利地用于形成光电子模块。

2. 发明授权

US06765275B1 Two-layer electrical substrate for optical devices 有权
公开(公告)号：US06765275B1
公开(公告)日：2004-07-20
申请号：US10290481
申请日：2002-11-06
申请人： Neeraj Anil Pendse , Jia Liu , Jitendra Mohan , Bruce Carlton Roberts , Luu Thanh Nguyen , William Paul Mazotti
发明人： Neeraj Anil Pendse , Jia Liu , Jitendra Mohan , Bruce Carlton Roberts , Luu Thanh Nguyen , William Paul Mazotti
IPC分类号： H01L310203
CPC分类号： H05K1/0219 , G02B6/4201 , H01L23/49838 , H01L25/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2924/00014 , H01L2924/10253 , H01L2924/30107 , H01L2924/3011 , H05K1/189 , H05K3/403 , H05K2201/0715 , H05K2201/09236 , H05K2201/10121 , H01L2924/00 , H01L2224/48 , H01L2224/05644
摘要： A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.

3. 发明申请

US20110234318A1 LOW VOLTAGE DIFFERENTIAL SIGNAL DRIVER WITH REDUCED POWER CONSUMPTION 有权
标题翻译：具有降低功耗的低电压差分信号驱动器
公开(公告)号：US20110234318A1
公开(公告)日：2011-09-29
申请号：US13159672
申请日：2011-06-14
申请人： Khaldoon Abugharbieh , Jitendra Mohan , Ivan Dyzevik
发明人： Khaldoon Abugharbieh , Jitendra Mohan , Ivan Dyzevik
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45094
摘要： A low voltage differential signal (LVDS) driver circuit with reduced power consumption. A pre-driver stage, implemented as a differential current mode amplifier, is driven by the differential input signal and provides a corresponding differential drive signal, which drives the output stage, implemented as a differential voltage mode amplifier, which, in turn, provides the differential output signal for the load. Total current consumption equals the load current, which is provided by the output stage, plus a much smaller current used by the pre-driver stage.
摘要翻译：低电压差分信号（LVDS）驱动电路，功耗降低。实现为差分电流模式放大器的预驱动器级由差分输入信号驱动，并提供驱动输出级的相应的差分驱动信号，该差分驱动信号被实现为差分电压模式放大器，其反过来提供负载的差分输出信号。总电流消耗等于由输出级提供的负载电流，加上预驱动级使用的电流要小得多。

4. 发明授权

US07502568B1 Method of using low bandwidth sensor for measuring high frequency AC modulation amplitude 有权
标题翻译：使用低带宽传感器测量高频交流调制幅度的方法
公开(公告)号：US07502568B1
公开(公告)日：2009-03-10
申请号：US10728065
申请日：2003-12-04
申请人： Jitendra Mohan
发明人： Jitendra Mohan
IPC分类号： H04B10/00
CPC分类号： H04B10/0799 , H04B10/564
摘要： A slow monitor diode having a bandwidth only partially overlapping a lower end of a data transmission spectrum for a data transmission laser is employed to detect and control average output power of the data transmission laser and, from peak-to-peak measurements, optical modulation amplitude. The output current from the monitor diode reaches a peak value for long runs of consecutive logical 1's or 0's. Using peak detectors with a long decay rate, the peak-to-peak signal amplitude, directly representative of optical modulation amplitude, may be determined.
摘要翻译：采用具有与数据传输激光器的数据传输频谱的下端仅部分重叠的带宽的缓慢监视二极管来检测和控制数据传输激光器的平均输出功率，并且从峰到峰测量得到光调制幅度。来自监视二极管的输出电流达到连续逻辑1或0的长时间运行的峰值。使用长衰减速率的峰值检测器，可以确定直接代表光调制幅度的峰 - 峰信号幅度。

5. 发明授权

US07209006B1 Differential amplifier with increased common mode loop gain at low frequencies 有权
标题翻译：差分放大器在低频时增加共模环路增益
公开(公告)号：US07209006B1
公开(公告)日：2007-04-24
申请号：US11161506
申请日：2005-08-05
申请人： Jitendra Mohan
发明人： Jitendra Mohan
IPC分类号： H03F3/45
CPC分类号： H03F3/4565 , H03F2203/45082 , H03F2203/45631
摘要： A differential amplifier circuit with feedback to increase common mode loop gain at low frequencies.
摘要翻译：具有反馈的差分放大器电路，以在低频下增加共模环路增益。

6. 发明授权

US06724251B1 Apparatus and method for employing gain dependent biasing to reduce offset and noise in a current conveyor type amplifier 有权
标题翻译：用于采用增益相关偏置以减小当前输送机型放大器中的偏移和噪声的装置和方法
公开(公告)号：US06724251B1
公开(公告)日：2004-04-20
申请号：US10244150
申请日：2002-09-12
申请人： Ramsin M. Ziazadeh , Jitendra Mohan , Abu-Hena Mostafa Kamal
发明人： Ramsin M. Ziazadeh , Jitendra Mohan , Abu-Hena Mostafa Kamal
IPC分类号： H03F136
CPC分类号： H03F1/0266 , H03F1/34
摘要： A circuit with low noise and reduced offset that feeds an input of an opamp with a programmable feedback resistor that provides variable gain settings. Input biasing currents are varied using control bits that are also used to adjust the gain. When the input signal is small (gain at higher setting), a minimum bias current is provided to source the input voltage swing. This scheme reduces the noise and offset generated by the lower transconductance of a biasing transistor while maintaining a constant SNR and fixed offset even in the presence of relatively small input swings. Also, when the input signal is large (gain at lower setting), a maximum bias current can be provided to accommodate the relatively large input swing level. Although the overall noise and offset current are increased for large input swings, the overall SNR and offset is maintained for relatively lower input swings.
摘要翻译：具有低噪声和偏移偏移的电路，可将运算放大器的输入与可编程反馈电阻器进行输入，从而提供可变增益设置。使用也用于调整增益的控制位来改变输入偏置电流。当输入信号较小（较高设定时的增益）时，提供最小偏置电流来输入电压摆幅。该方案减少了由偏置晶体管的较低跨导产生的噪声和偏移，同时即使在存在相对较小的输入摆幅的情况下也能保持恒定的SNR和固定偏移。此外，当输入信号较大（在较低设置下的增益）时，可以提供最大偏置电流以适应较大的输入摆幅电平。尽管对于大的输入摆幅，整体噪声和偏移电流增加，但是对于相对较低的输入摆幅，整体SNR和偏移量保持不变。

7. 发明授权

US06262603B1 RC calibration circuit with reduced power consumption and increased accuracy 有权
标题翻译： RC校准电路，功耗降低，准确度提高
公开(公告)号：US06262603B1
公开(公告)日：2001-07-17
申请号：US09515183
申请日：2000-02-29
申请人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
发明人： Jitendra Mohan , Devnath Varadarajan , Vijaya Ceekala
IPC分类号： H03K522
CPC分类号： H03H7/0153 , H03B5/20 , H03H2210/043
摘要： An RC calibration circuit, which utilizes a resistor and a variable capacitor connected in parallel, reduces power consumption and increases the accuracy of the calibration by comparing the voltage on the resistor to the voltage on the capacitor after a predetermined time has expired since the capacitor began charging up. The result of the comparison, which indicates whether the voltage on the resistor is greater than the voltage on the capacitor, is then used to adjust the capacitance of the capacitor to servo the RC time constant to a predetermined value.
摘要翻译：使用电阻器和可变电容并联连接的RC校准电路通过将电阻器上的电压与电容器上的电压进行比较，降低功耗并提高校准精度，这是由于电容器开始充电比较结果表明，电阻器上的电压是否大于电容器上的电压，然后用于调整电容器的电容以使RC时间常数维持在预定值。

8. 发明授权

US08638125B2 Low voltage differential signal driver with reduced power consumption 有权
标题翻译：低电压差分信号驱动器，降低功耗
公开(公告)号：US08638125B2
公开(公告)日：2014-01-28
申请号：US13159672
申请日：2011-06-14
申请人： Khaldoon Abugharbieh , Jitendra Mohan , Ivan Duzevik
发明人： Khaldoon Abugharbieh , Jitendra Mohan , Ivan Duzevik
IPC分类号： H03K5/22
CPC分类号： H03F3/45475 , H03F3/45094
摘要： A low voltage differential signal (LVDS) driver circuit with reduced power consumption. A pre-driver stage, implemented as a differential current mode amplifier, is driven by the differential input signal and provides a corresponding differential drive signal, which drives the output stage, implemented as a differential voltage mode amplifier, which, in turn, provides the differential output signal for the load. Total current consumption equals the load current, which is provided by the output stage, plus a much smaller current used by the pre-driver stage.
摘要翻译：低电压差分信号（LVDS）驱动电路，功耗降低。实现为差分电流模式放大器的预驱动器级由差分输入信号驱动，并提供驱动输出级的相应的差分驱动信号，该差分驱动信号被实现为差分电压模式放大器，其反过来提供负载的差分输出信号。总电流消耗等于由输出级提供的负载电流，加上预驱动级使用的电流要小得多。

9. 发明授权

US07395286B1 Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register 有权
标题翻译：使用移位寄存器以精确的1 / N占空比产生N个时钟的非重叠N相的方法
公开(公告)号：US07395286B1
公开(公告)日：2008-07-01
申请号：US10751674
申请日：2004-01-05
申请人： Yongseon Koh , Jitendra Mohan
发明人： Yongseon Koh , Jitendra Mohan
IPC分类号： G06F7/52 , G06F1/02
CPC分类号： G06F1/06 , G06F7/68
摘要： A divide-by-N clock frequency divider producing N non-overlapping clocks each with precise 1/N duty ratio is implemented by a counter, a token generator and N-bit shift register. Every N clock cycles, a pulse is generated as a token from a logical combination of signals from the counter. The pulse is passed along a shift register having balanced load capacitances under control of the clock edge, ensuring a precise 1/N duty ratio that is unaffected by load capacitances from the fault state detection and/or reset circuitry. In this manner, a higher operating frequency may be achieved with low power consumption.
摘要翻译：产生N个具有精确1 / N占空比的非重叠时钟的N分频分频器由计数器，令牌发生器和N位移位寄存器实现。每N个时钟周期，从来自计数器的信号的逻辑组合产生一个脉冲作为令牌。在时钟边沿的控制下，脉冲沿着具有平衡负载电容的移位寄存器传递，确保不受故障状态检测和/或复位电路的负载电容影响的精确1 / N占空比。以这种方式，可以以低功耗实现更高的工作频率。

10. 发明授权

US07209007B1 Combined analog signal gain controller and equalizer 有权
标题翻译：组合模拟信号增益控制器和均衡器
公开(公告)号：US07209007B1
公开(公告)日：2007-04-24
申请号：US11161504
申请日：2005-08-05
申请人： Abu-Hena Mostafa Kamal , Jitendra Mohan , Yongseon Koh
发明人： Abu-Hena Mostafa Kamal , Jitendra Mohan , Yongseon Koh
IPC分类号： H03F3/04
CPC分类号： H03F3/45475 , H03F1/3211 , H03F2200/165 , H03F2203/45136 , H03F2203/45522 , H03F2203/45526 , H03F2203/45576 , H03F2203/45591 , H04B3/14
摘要： An analog signal gain controller and equalizer with an increased signal bandwidth for reducing intersymbol interference (ISI) within a digital data signal.
摘要翻译：模拟信号增益控制器和均衡器具有增加的信号带宽，用于减少数字数据信号内的符号间干扰（ISI）。

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