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1. 发明申请

US20130285158A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130285158A1
公开(公告)日：2013-10-31
申请号：US13558746
申请日：2012-07-26
申请人： Naomu Kitano , Takashi Minami , Nobuo Yamaguchi , Takuya Seino , Takashi Nakagawa , Heiji Watanabe , Takayoshi Shimura , Takuji Hosoi
发明人： Naomu Kitano , Takashi Minami , Nobuo Yamaguchi , Takuya Seino , Takashi Nakagawa , Heiji Watanabe , Takayoshi Shimura , Takuji Hosoi
IPC分类号： H01L29/49 , H01L21/285
CPC分类号： H01L29/4966 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/51 , H01L29/78
摘要： Provided are a semiconductor device which enables reduction of diffusion of Si in the manufacturing process of an MIPS element and suppression of an increase in EOT, and a method of manufacturing the same. An embodiment of the present invention is a semiconductor device including a field effect transistor having a gate insulating film provided on a silicon substrate and a gate electrode provided on the gate insulating film. The gate electrode is a stack-type electrode including a conductive layer containing at least Ti, N, and O (oxygen) and a silicon layer provided on the conductive layer, and the concentration of oxygen in the conductive layer is highest in the side of the silicon layer.
摘要翻译：提供一种能够减少MIPS元件的制造工序中Si的扩散，抑制EOT的增加的半导体装置及其制造方法。本发明的实施例是一种半导体器件，其包括具有设置在硅衬底上的栅极绝缘膜和设置在栅极绝缘膜上的栅电极的场效应晶体管。栅电极是包括至少含有Ti，N和O（氧）的导电层和设置在导电层上的硅层的堆叠型电极，导电层中的氧浓度在硅层。

2. 发明授权

US08669624B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08669624B2
公开(公告)日：2014-03-11
申请号：US13558746
申请日：2012-07-26
申请人： Naomu Kitano , Takashi Minami , Nobuo Yamaguchi , Takuya Seino , Takashi Nakagawa , Heiji Watanabe , Takayoshi Shimura , Takuji Hosoi
发明人： Naomu Kitano , Takashi Minami , Nobuo Yamaguchi , Takuya Seino , Takashi Nakagawa , Heiji Watanabe , Takayoshi Shimura , Takuji Hosoi
IPC分类号： H01L21/70 , H01L21/02 , H01L29/78
CPC分类号： H01L29/4966 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/51 , H01L29/78
摘要： Provided are a semiconductor device which enables reduction of diffusion of Si in the manufacturing process of an MIPS element and suppression of an increase in EOT, and a method of manufacturing the same. An embodiment of the present invention is a semiconductor device including a field effect transistor having a gate insulating film provided on a silicon substrate and a gate electrode provided on the gate insulating film. The gate electrode is a stack-type electrode including a conductive layer containing at least Ti, N, and O (oxygen) and a silicon layer provided on the conductive layer, and the concentration of oxygen in the conductive layer is highest in the side of the silicon layer.
摘要翻译：提供一种能够减少MIPS元件的制造工序中Si的扩散，抑制EOT的增加的半导体装置及其制造方法。本发明的实施例是一种半导体器件，其包括具有设置在硅衬底上的栅极绝缘膜和设置在栅极绝缘膜上的栅电极的场效应晶体管。栅电极是包括至少含有Ti，N和O（氧）的导电层和设置在导电层上的硅层的堆叠型电极，导电层中的氧浓度在硅层。

3. 发明授权

US08026143B2 Semiconductor element and manufacturing method thereof 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US08026143B2
公开(公告)日：2011-09-27
申请号：US11933935
申请日：2007-11-01
申请人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
发明人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
IPC分类号： H01L21/336
CPC分类号： H01L29/517 , H01L21/28229 , H01L29/4966 , H01L29/513 , H01L29/78
摘要： The object of the present invention is to provide a method of manufacturing high permittivity gate dielectrics for a device such as an MOSFET. A HfSiO film is formed by sputtering a Hf metal film on a SiO2 film (or a SiON film) on a Si wafer. A TiO2 film is formed by sputtering a Ti metal film on the HfSiO film and subjecting the Ti metal film to a thermal oxidation treatment. A TiN metal film is deposited on the TiO2 film. The series of treatments are performed continuously, without exposing the films and the wafer to atmospheric air. The resultant TiN/TiO2/HfSiO/SiO2/Si structure satisfies the conditions: EOT
摘要翻译：本发明的目的是提供一种用于诸如MOSFET的器件的高介电常数栅极电介质的方法。通过在Si晶片上的SiO 2膜（或SiON膜）上溅射Hf金属膜来形成HfSiO膜。通过在HfSiO膜上溅射Ti金属膜并对Ti金属膜进行热氧化处理来形成TiO 2膜。在TiO 2膜上沉积TiN金属膜。连续进行一系列处理，而不会将膜和晶片暴露在大气中。所得TiN / TiO2 / HfSiO / SiO2 / Si结构满足条件：EOT <1.0nm，低漏电流和滞后<20mV。

4. 发明申请

US20100120238A1 SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD 有权
标题翻译：半导体制造设备和方法
公开(公告)号：US20100120238A1
公开(公告)日：2010-05-13
申请号：US12631286
申请日：2009-12-04
申请人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
发明人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
IPC分类号： H01L21/441 , C23C14/34 , C23C16/00
CPC分类号： H01L21/67207 , H01L21/28229 , H01L21/31683 , H01L29/513 , H01L29/517
摘要： A first aspect of the present invention provides a semiconductor manufacturing apparatus including: a load lock chamber; a transfer chamber; and a treatment chamber 1 and a treatment chamber 2 which carry out treatment using plasma, wherein, in the treatment chamber 2, an exhaust means is provided with a control means for making an oxygen partial pressure into 1*10−5 [Pa] or less. A second aspect of the present invention provides a method for forming a high dielectric constant film and a metal electrode successively, the method including the steps of: (1) depositing a metal film on a silicon oxide film or a silicon oxynitride film in the treatment chamber 1; (2) forming, in the treatment chamber 2, a high dielectric constant film by using the metal film formed in the treatment chamber 1; and (3) depositing, in the treatment chamber 1 or a treatment chamber 3 installed additionally, a metal electrode material on the high dielectric film formed in the treatment chamber 2, wherein the steps are carried out successively without being exposed to the atmosphere.
摘要翻译：本发明的第一方面提供一种半导体制造装置，包括：负载锁定室; 传送室; 以及处理室1和处理室2，其使用等离子体进行处理，其中在处理室2中，排气装置设置有用于使氧分压为1×10 -5 [Pa]或减。本发明的第二方面提供了一种依次形成高介电常数膜和金属电极的方法，所述方法包括以下步骤：（1）在处理中在氧化硅膜或氧氮化硅膜上沉积金属膜室1; （2）通过使用形成在处理室1中的金属膜在处理室2中形成高介电常数膜; （3）在处理室1或另外安装的处理室3内，在形成于处理室2中的高电介质膜上沉积金属电极材料，其中，这些步骤连续地进行而不暴露于大气中。

5. 发明授权

US08088678B2 Semiconductor manufacturing apparatus and method 有权
标题翻译：半导体制造装置及方法
公开(公告)号：US08088678B2
公开(公告)日：2012-01-03
申请号：US12631286
申请日：2009-12-04
申请人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
发明人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
IPC分类号： H01L32/05
CPC分类号： H01L21/67207 , H01L21/28229 , H01L21/31683 , H01L29/513 , H01L29/517
摘要： A first aspect of the present invention provides a semiconductor manufacturing apparatus including: a load lock chamber; a transfer chamber; and a treatment chamber 1 and a treatment chamber 2 which carry out treatment using plasma, wherein, in the treatment chamber 2, an exhaust means is provided with a control means for making an oxygen partial pressure into 1*10−5 [Pa] or less. A second aspect of the present invention provides a method for forming a high dielectric constant film and a metal electrode successively, the method including the steps of: (1) depositing a metal film on a silicon oxide film or a silicon oxynitride film in the treatment chamber 1; (2) forming, in the treatment chamber 2, a high dielectric constant film by using the metal film formed in the treatment chamber 1; and (3) depositing, in the treatment chamber 1 or a treatment chamber 3 installed additionally, a metal electrode material on the high dielectric film formed in the treatment chamber 2, wherein the steps are carried out successively without being exposed to the atmosphere.
摘要翻译：本发明的第一方面提供一种半导体制造装置，包括：负载锁定室; 传送室; 以及处理室1和处理室2，其使用等离子体进行处理，其中在处理室2中，排气装置设置有用于使氧分压为1×10 -5 [Pa]或减。本发明的第二方面提供了一种依次形成高介电常数膜和金属电极的方法，所述方法包括以下步骤：（1）在处理中在氧化硅膜或氧氮化硅膜上沉积金属膜室1; （2）通过使用形成在处理室1中的金属膜在处理室2中形成高介电常数膜; （3）在处理室1或另外安装的处理室3内，在形成于处理室2中的高电介质膜上沉积金属电极材料，其中，这些步骤连续地进行而不暴露于大气中。

6. 发明申请

US20090170300A1 SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：US20090170300A1
公开(公告)日：2009-07-02
申请号：US12395523
申请日：2009-02-27
申请人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
发明人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
IPC分类号： H01L21/4763
CPC分类号： H01L29/517 , H01L21/28229 , H01L29/4966 , H01L29/513 , H01L29/78
摘要： The object of the present invention is to provide a method of manufacturing high permittivity gate dielectrics for a device such as an MOSFET. A HfSiO film 104 is formed by sputtering a Hf metal film 103 on a SiO2 film (or a SiON film) 102 on a Si wafer 101. A TiO2 film 106 is formed by sputtering a Ti metal film 105 on the HfSiO film 104 and subjecting the Ti metal film 105 to a thermal oxidation treatment. A TiN metal film 107 is deposited on the TiO2 film 106. The series of treatments are performed continuously, without exposing the films and the wafer to atmospheric air. The resultant TiN/TiO2/HfSiO/SiO2/Si structure satisfies the conditions: EOT
摘要翻译：本发明的目的是提供一种用于诸如MOSFET的器件的高介电常数栅极电介质的方法。通过在Si晶片101上的SiO 2膜（或SiON膜）102上溅射Hf金属膜103而形成HfSiO膜104.通过在HfSiO膜104上溅射Ti金属膜105并形成TiO 2膜106， Ti金属膜105进行热氧化处理。 TiN金属膜107沉积在TiO 2膜106上。连续执行一系列处理，而不将膜和晶片暴露于大气中。所得TiN / TiO2 / HfSiO / SiO2 / Si结构满足条件：EOT <1.0nm，低漏电流和滞后<20mV。

7. 发明申请

US20080305597A1 SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20080305597A1
公开(公告)日：2008-12-11
申请号：US11933935
申请日：2007-11-01
申请人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
发明人： Naomu Kitano , Takashi Minami , Motomu Kosuda , Heiji Watanabe
IPC分类号： H01L21/336 , H01L21/3205
CPC分类号： H01L29/517 , H01L21/28229 , H01L29/4966 , H01L29/513 , H01L29/78
摘要： The object of the present invention is to provide a method of manufacturing high permittivity gate dielectrics for a device such as an MOSFET. A HfSiO film 104 is formed by sputtering a Hf metal film 103 on a SiO2 film (or a SiON film) 102 on a Si wafer 101. A TiO2 film 106 is formed by sputtering a Ti metal film 105 on the HfSiO film 104 and subjecting the Ti metal film 105 to a thermal oxidation treatment. A TiN metal film 107 is deposited on the TiO2 film 106. The series of treatments are performed continuously, without exposing the films and the wafer to atmospheric air. The resultant TiN/TiO2/HfSiO/SiO2/Si structure satisfies the conditions: EOT
摘要翻译：本发明的目的是提供一种用于诸如MOSFET的器件的高介电常数栅极电介质的方法。通过在Si晶片101上的SiO 2膜（或SiON膜）102上溅射Hf金属膜103而形成HfSiO膜104.通过在HfSiO膜104上溅射Ti金属膜105并形成TiO 2膜106， Ti金属膜105进行热氧化处理。 TiN金属膜107沉积在TiO 2膜106上。连续执行一系列处理，而不将膜和晶片暴露于大气中。所得TiN / TiO2 / HfSiO / SiO2 / Si结构满足条件：EOT <1.0nm，低漏电流和滞后<20mV。

8. 发明授权

US09244557B2 Input device and a display device including the input device 有权
标题翻译：输入装置和包括输入装置的显示装置
公开(公告)号：US09244557B2
公开(公告)日：2016-01-26
申请号：US13395401
申请日：2010-09-30
申请人： Yasunari Nagata , Takashi Minami , Takashi Shimizu , Natsuko Yamagata , Akinori Sato , Yoshio Miyazaki
发明人： Yasunari Nagata , Takashi Minami , Takashi Shimizu , Natsuko Yamagata , Akinori Sato , Yoshio Miyazaki
IPC分类号： G06F3/044 , G06F3/041 , G02F1/1333
CPC分类号： G06F3/0412 , G02F1/13338 , G06F3/044 , G06F2203/04111
摘要： An input device includes a substrate having a first main surface and a second main surface located opposite to the first main surface; a protective member having an opposed surface opposite to the first main surface; a bonding member configured to bond the first main surface and the opposed surface to each other; a first coloring member disposed between the first main surface and the opposed surface, the first coloring member being in contact with the bonding member; and a second coloring member disposed on the second main surface and having a color different from a color of the first coloring member.
摘要翻译：输入装置包括具有第一主表面和与第一主表面相对的第二主表面的基板; 保护构件，具有与第一主表面相对的相对表面; 接合构件，其被配置为将所述第一主表面和所述相对表面彼此接合; 第一着色部件设置在第一主表面和相对表面之间，第一着色部件与接合部件接触; 以及第二着色构件，其设置在所述第二主表面上并且具有与所述第一着色构件的颜色不同的颜色。

9. 发明授权

US08481061B2 Cosmetic composition 有权
标题翻译：化妆品组成
公开(公告)号：US08481061B2
公开(公告)日：2013-07-09
申请号：US10577036
申请日：2004-11-11
申请人： Kazunori Yamazaki , Yuuki Ogura , Kinya Hosokawa , Takashi Minami , Toshihiko Nakane
发明人： Kazunori Yamazaki , Yuuki Ogura , Kinya Hosokawa , Takashi Minami , Toshihiko Nakane
IPC分类号： A61K8/02 , C07C31/18
CPC分类号： A61Q19/00 , A61K8/375 , A61Q1/04 , A61Q1/06 , A61Q1/10 , A61Q3/02 , A61Q5/00 , A61Q5/06
摘要： A cosmetic composition is provided herein, the composition comprising: an ester of pentaerythritol and a benzoic acid having the formula (I) wherein R1 and R2 independently indicate a hydrogen atom or a linear or branched fatty acid residue having 1 to 24 carbon atoms or a benzoic acid residue, and a cosmetically acceptable carrier.
摘要翻译：本发明提供了一种化妆品组合物，该组合物包括：季戊四醇和具有式（I）的苯甲酸酯，其中R 1和R 2独立地表示氢原子或具有1至24个碳原子的直链或支链脂肪酸残基或苯甲酸残基和化妆品可接受的载体。

10. 发明授权

US07967518B2 Stick-shaped solid cosmetics and method for producing the same 有权
标题翻译：棒状固体化妆品及其制造方法
公开(公告)号：US07967518B2
公开(公告)日：2011-06-28
申请号：US11911158
申请日：2006-04-10
申请人： Kinya Hosokawa , Toshimitsu Kuroiwa , Masami Abe , Takashi Minami , Sadaki Takata
发明人： Kinya Hosokawa , Toshimitsu Kuroiwa , Masami Abe , Takashi Minami , Sadaki Takata
IPC分类号： A45D40/20
CPC分类号： A61K8/02 , A61K8/92 , A61Q1/06
摘要： Stick-shaped solid cosmetic 10 comprises a wax with a melting point of 45° C. or higher and liquid oil, wherein the hardness of top portion 16 is 0.07 N to 0.38 N and the hardness of boundary portion 20, which is a border between a retained portion in inner holder 12 and a portion outside of the inner holder 12, is 0.03 N to 0.31 N higher than the hardness of the top portion, and wherein the hardness gradually increases from the top portion 16 to the boundary portion 20. Thus, the stick-shaped solid cosmetic 10 has smooth spreadability and excellent product strength.
摘要翻译：棒状固体化妆品10包括熔点为45℃以上的蜡和液体油，其中顶部16的硬度为0.07N〜0.38N，边界部20的硬度为内保持器12中的保持部分和内保持器12的外侧的部分比顶部部分的硬度高0.03N至0.31N，并且其硬度从顶部16逐渐增加到边界部分20.因此棒状固体化妆品10具有平滑的铺展性和优异的产品强度。

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