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1. 发明授权

US5877717A D/A converter with a Gamma correction circuit 失效
标题翻译： D / A转换器，具有伽马校正电路
公开(公告)号：US5877717A
公开(公告)日：1999-03-02
申请号：US990443
申请日：1997-12-15
申请人： Nang-Ping Tu , Yong-Nian Rau , Chia-Yuan Chang
发明人： Nang-Ping Tu , Yong-Nian Rau , Chia-Yuan Chang
IPC分类号： H03M1/66 , H03M1/68 , H03M1/76 , H03M1/88
CPC分类号： H03M1/664 , H03M1/682 , H03M1/765
摘要： A D/A converter with a Gamma correction circuit according to the invention is designed for C-DAC which takes up much less space than the conventional R-DAC and 2-divided C-DAC. Therefore, this D/A converter has advantages of simple design and low cost. Furthermore, users can freely define the shape of a Gamma correction conversion curve to thereby widen application areas by adjusting terminal voltages.
摘要翻译：根据本发明的具有伽马校正电路的D / A转换器被设计用于C-DAC，其占用比常规R-DAC和2分频C-DAC少得多的空间。因此，该D / A转换器具有设计简单，成本低的优点。此外，用户可以自由地定义伽马校正转换曲线的形状，从而通过调整端子电压来扩大应用领域。

2. 发明授权

US06363508B1 Method for testing reflection LCD projector and display panel pixel area thereof 失效
标题翻译：反射液晶投影仪及其显示面板像素面积测试方法
公开(公告)号：US06363508B1
公开(公告)日：2002-03-26
申请号：US09436689
申请日：1999-11-08
申请人： Yung-Yuan Ho , Chia-Yuan Chang , Nang-Ping Tu
发明人： Yung-Yuan Ho , Chia-Yuan Chang , Nang-Ping Tu
IPC分类号： G06F1100
CPC分类号： G09G3/006 , G01R31/318505 , G01R31/318511 , G02F1/1309 , G09G3/3688 , G09G2300/0408 , G09G2310/027 , G09G2330/10 , G09G2330/12
摘要： A method of testing a reflection-type LCD projector is disclosed. The present invention provides a method of testing the digital-circuit portion of the data drivers of the silicon wafer LCD of the reflection-type LCD projector, and a method of testing the panel pixel area of the silicon wafer LCD display. The present invention can be applied to LCD display panels manufactured by CMOS process and polysilicon thin film transistor process for the benefits of helping to resolve manufacturing issues during the development stage, thereby shortening the required production time schedule, and reducing the production cost.
摘要翻译：公开了一种测试反射型LCD投影仪的方法。本发明提供了一种测试反射式LCD投影仪的硅晶片LCD的数据驱动器的数字电路部分的方法，以及测试硅晶片LCD显示器的面板像素区域的方法。本发明可以应用于通过CMOS工艺制造的LCD显示面板和多晶硅薄膜晶体管工艺，以有利于在开发阶段帮助解决制造问题，从而缩短所需的生产时间表，并降低生产成本。

3. 发明授权

US6166715A Thin-film transistor liquid-crystal display driver 失效
标题翻译：薄膜晶体管液晶显示驱动
公开(公告)号：US6166715A
公开(公告)日：2000-12-26
申请号：US805315
申请日：1997-02-25
申请人： Chia-Yuan Chang , Nang-Ping Tu
发明人： Chia-Yuan Chang , Nang-Ping Tu
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3688 , G09G2310/0297
摘要： A thin-film transistor liquid-crystal display (TFT LCD) driver includes a shift register, a sample and hold circuit, a group block, and a controller. The shift register provides N graded sample clocks. Video signals are delivered to the group block via the sample and hold circuit through the control of the controller. The group block having n groups of N switches transfers a group of N pixel signals from the sample and hold circuit to the display. The display driver of the invention providing n.times.N output lines by using N processing units by virtue of the output distribution of the group block not only reduces circuit space, but also lowers the power consumption requirements.
摘要翻译：薄膜晶体管液晶显示器（TFT LCD）驱动器包括移位寄存器，采样保持电路，组块和控制器。移位寄存器提供N个渐变采样时钟。通过控制器的控制，通过采样和保持电路将视频信号传送到组块。具有n组N个开关的组块将来自采样和保持电路的一组N个像素信号传送到显示器。通过根据组块的输出分配，通过使用N个处理单元提供n×N个输出线的本发明的显示驱动器不仅减少了电路空间，而且降低了功耗要求。

4. 发明授权

US09275598B2 DAC architecture for LCD source driver 有权
标题翻译： DAC架构用于LCD源驱动
公开(公告)号：US09275598B2
公开(公告)日：2016-03-01
申请号：US12859888
申请日：2010-08-20
申请人： Nang-Ping Tu , Fu-Lung Hsueh , Mingo Liu
发明人： Nang-Ping Tu , Fu-Lung Hsueh , Mingo Liu
IPC分类号： G09G3/36 , H03M1/68 , H03M1/72 , H03M1/76 , H03M1/80
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2310/027 , H03M1/687 , H03M1/72 , H03M1/76 , H03M1/804 , H03M1/806
摘要： A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a two-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, and a voltage selector. The voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
摘要翻译：用于响应于M位数字输入代码输出模拟电压的两级数模转换器包括具有高参考电压输入节点的两位串行电荷再分配数模转换器，用于接收高电平参考电压和用于接收低参考电压的低参考电压输入节点，以及电压选择器。电压选择器将高参考电压和低参考电压设置为所选电平，这取决于至少一部分M位数字输入代码。

5. 发明授权

US08981979B2 Integrated circuits, liquid crystal display (LCD) drivers, and systems 有权
标题翻译：集成电路，液晶显示（LCD）驱动器和系统
公开(公告)号：US08981979B2
公开(公告)日：2015-03-17
申请号：US13466608
申请日：2012-05-08
申请人： Nang-Ping Tu , Fu-Lung Hsueh , Mingo Liu , I-Fey Wang
发明人： Nang-Ping Tu , Fu-Lung Hsueh , Mingo Liu , I-Fey Wang
IPC分类号： H03M1/66 , G09G3/36 , H03M1/76
CPC分类号： H03M1/66 , G09G3/3648 , G09G3/3685 , G09G2310/027 , G09G2310/0286 , G09G2310/0289 , G09G2310/0294 , H03M1/662 , H03M1/765
摘要： An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type DAC and at least one second channel type DAC. The integrated circuit includes a plurality of sample and hold (S/H) circuits. Each of the S/H circuits is coupled with the DAC circuit. The S/H circuits are capable of receiving signals from the DAC circuit and outputting the signals in parallel.
摘要翻译：集成电路包括数模转换器（DAC）电路，其包括至少一个第一通道类型DAC和至少一个第二通道类型DAC。集成电路包括多个采样和保持（S / H）电路。每个S / H电路与DAC电路耦合。 S / H电路能够从DAC电路接收信号并并行输出信号。

6. 发明授权

US5818751A Single-port SRAM with no read/write collisions 失效
标题翻译：单端口SRAM，无读/写冲突
公开(公告)号：US5818751A
公开(公告)日：1998-10-06
申请号：US925358
申请日：1997-09-08
申请人： Yung-Yuan Ho , Nang-Ping Tu , Jian-Yau Yih
发明人： Yung-Yuan Ho , Nang-Ping Tu , Jian-Yau Yih
IPC分类号： G11C11/419 , G11C11/00
CPC分类号： G11C11/419
摘要： A single-port SRAM with no read/write collisions. The present invention uses some X-axis and Y-axis control circuits to reduce the amounts of lines used in the structure of the present invention, but still maintains circuitry stability.
摘要翻译：单端口SRAM，无读/写冲突。本发明使用一些X轴和Y轴控制电路来减少在本发明的结构中使用的线的数量，但仍保持电路的稳定性。

7. 发明授权

US09171518B2 Two-stage DAC achitecture for LCD source driver utilizing one-bit pipe DAC 有权
标题翻译：利用一位管道DAC的LCD驱动器的两级DAC架构
公开(公告)号：US09171518B2
公开(公告)日：2015-10-27
申请号：US12859892
申请日：2010-08-20
申请人： Nang-Ping Tu
发明人： Nang-Ping Tu
IPC分类号： G09G3/36 , H03M1/68 , H03M1/72 , H03M1/76 , H03M1/80
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2310/027 , H03M1/687 , H03M1/72 , H03M1/76 , H03M1/804 , H03M1/806
摘要： A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, and a voltage selector. The voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
摘要翻译：用于响应于M位数字输入代码输出模拟电压的两级数模转换器包括具有高参考电压输入节点的一位串行电荷再分配数模转换器，用于接收高电平参考电压和用于接收低参考电压的低参考电压输入节点，以及电压选择器。电压选择器将高参考电压和低参考电压设置为所选电平，这取决于至少一部分M位数字输入代码。

8. 发明授权

US08970639B2 Two-stage DAC architecture for LCD source driver utilizing one-bit serial charge redistribution DAC 有权
标题翻译：采用一位串行电荷再分配DAC的LCD源驱动器的两级DAC架构
公开(公告)号：US08970639B2
公开(公告)日：2015-03-03
申请号：US12859893
申请日：2010-08-20
申请人： Nang-Ping Tu
发明人： Nang-Ping Tu
IPC分类号： G09G5/10 , G09G3/36 , H03M1/68 , H03M1/66 , H03M1/72 , H03M1/76 , H03M1/80
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2310/027 , H03M1/687 , H03M1/72 , H03M1/76 , H03M1/804 , H03M1/806
摘要： A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage. A voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
摘要翻译：用于响应于M位数字输入代码输出模拟电压的两级数模转换器包括具有高参考电压输入节点的一位串行电荷再分配数模转换器，用于接收高电平参考电压和低参考电压输入节点，用于接收低参考电压。电压选择器根据M位数字输入代码的至少一部分将高参考电压和低参考电压设置为选定电平。

9. 发明授权

US08188898B2 Integrated circuits, liquid crystal display (LCD) drivers, and systems 有权
标题翻译：集成电路，液晶显示（LCD）驱动器和系统
公开(公告)号：US08188898B2
公开(公告)日：2012-05-29
申请号：US12762535
申请日：2010-04-19
申请人： Nang-Ping Tu , Fu-Long Hsueh , Mingo Liu , I-Fey Wang
发明人： Nang-Ping Tu , Fu-Long Hsueh , Mingo Liu , I-Fey Wang
IPC分类号： H03M1/66
CPC分类号： H03M1/66 , G09G3/3648 , G09G3/3685 , G09G2310/027 , G09G2310/0286 , G09G2310/0289 , G09G2310/0294 , H03M1/662 , H03M1/765
摘要： An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type DAC and at least one second channel type DAC. The integrated circuit includes a plurality of sample and hold (S/H) circuits. Each of the S/H circuits is coupled with one of the DAC circuit. The S/H circuits are capable of receiving signals from the DAC circuit and outputting the signals in parallel.
摘要翻译：集成电路包括数模转换器（DAC）电路，其包括至少一个第一通道类型DAC和至少一个第二通道类型DAC。集成电路包括多个采样和保持（S / H）电路。每个S / H电路与DAC电路中的一个耦合。 S / H电路能够从DAC电路接收信号并并行输出信号。

10. 发明授权

US5831906A Read/write collison-free static random access memory 失效
标题翻译：读/写无碰撞静态随机存取存储器
公开(公告)号：US5831906A
公开(公告)日：1998-11-03
申请号：US827043
申请日：1997-03-25
申请人： Jian-Yau Yih , Nang-Ping Tu
发明人： Jian-Yau Yih , Nang-Ping Tu
IPC分类号： G11C11/413 , G11C7/22 , G11C8/12 , G11C11/418 , G11C11/419 , H01L21/8244 , H01L27/11 , G11C7/00
CPC分类号： G11C11/419 , G11C11/418 , G11C7/22 , G11C8/12
摘要： A read/write collision-free static random access memory which can perform read/write operations simultaneously without read/write collisions. The static random access memory includes a plurality of memory cells and its features are that the memory cells are divided into several memory banks wherein each bank has independent reading and writing paths. The number of memory cells for each memory bank can be determined by a specific length of memory cells between some memory cells undergoing reading operation and other memory cells undergoing writing operation, and by the reading speed of said reading operation and the writing speed of the writing operation, whereby the reading operation and the writing operation read and write to two different memory banks of the static random access memory at the same time such that read/write collisions can be prevented.
摘要翻译：无读/写冲突的读/写无冲突静态随机存取存储器，可同时执行读/写操作。静态随机存取存储器包括多个存储单元，其特征在于，存储器单元被分成若干存储体，其中每个存储体具有独立的读取和写入路径。每个存储体的存储单元的数量可以由经历读取操作的一些存储单元和正在进行写入操作的其他存储单元之间的存储单元的特定长度以及所述读取操作的读取速度和写入的写入速度来确定从而读取操作和写入操作同时读取和写入静态随机存取存储器的两个不同的存储体，从而可以防止读/写冲突。

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