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1. 发明授权

US06531067B1 Method for forming contact hole 有权
标题翻译：形成接触孔的方法
公开(公告)号：US06531067B1
公开(公告)日：2003-03-11
申请号：US09623026
申请日：2000-08-25
申请人： Nagamasa Shiokawa , Atsushi Yamamoto
发明人： Nagamasa Shiokawa , Atsushi Yamamoto
IPC分类号： H01B1300
CPC分类号： H01L21/31116 , H01L21/76802
摘要： The subject of the present invention is to keep the wiring resistance low and reduce the variation of the wiring resistance in one identical lot in semiconductor devices of a multi level interconnect structure in which at least the lower wiring layer is an aluminum wiring layer. Contact holes (31, 51) are formed in dielectric interlayers (3, 5) of upper and lower wiring layers (1, 2, 4) by dry etching. In the method of forming the contact holes of the invention, the dry etching was applied in two steps divisionally. The first step of etching is applied with supplying CF4, CHF3, Ar and N2 into an etching chamber. The second step of etching is conducted with supplying CF4, CHF3 and Ar into the etching gas chamber.
摘要翻译：本发明的目的在于使至少下布线层为铝布线层的多层布线结构的半导体器件中的同一批次中的布线电阻变小，从而降低布线电阻的变化。接触孔（31,51）通过干蚀刻形成在上下布线层（1,2,4）的介电层间（3,5）中。在形成本发明的接触孔的方法中，分两次地进行干蚀刻。施加蚀刻的第一步骤，将CF4，CHF3，Ar和N2供应到蚀刻室中。蚀刻第二步骤是通过向蚀刻气体室中供应CF4，CHF3和Ar进行蚀刻。

2. 发明授权

US06593253B1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06593253B1
公开(公告)日：2003-07-15
申请号：US09763127
申请日：2001-02-20
申请人： Nagamasa Shiokawa
发明人： Nagamasa Shiokawa
IPC分类号： H01L2131
CPC分类号： H01L21/3185 , C23C8/10 , C30B33/005
摘要： A high quality thermal oxide film is provided. For the purpose of the film, a cooling step is conducted after replacing an atmosphere in the diffusion furnace (1) with a high purity gas mixture of nitrogen N2 99% and oxygen O2 1% after an oxidizing and an annealing steps. Then, a pump (DP) is turned on to evacuate a load-lock chamber (6), which is then filled with nitrogen N2. Then, while feeding a gas mixture of nitrogen N2 99% and oxygen O2 1% into the diffusion furnace (1), a wafer boat (3) is transferred from the diffusion furnace (1) to the load-lock chamber (6) (Removing step). Thus, the cooling and the removing steps are conducted under an atmosphere gas of a high purity mixture of nitrogen and a small amount of high purity oxygen free from impurities in the air. Only high purity oxygen is, therefore, introduced in an interface between a silicon substrate and an oxide film, so that a high quality thermal oxide film can be provided.
摘要翻译：提供高品质的氧化物膜。为了膜的目的，在氧化和退火步骤之后，用氮气N2 99％和氧气氧化1％的高纯度气体混合物代替扩散炉（1）中的气氛后进行冷却步骤。然后，泵（DP）被打开以抽出装载锁定室（6），然后填充氮气。然后，在氮气N2 99％和氧气1％的气体混合物供给到扩散炉（1）的同时，将晶片舟皿（3）从扩散炉（1）输送到负载锁定室（6）（删除步骤）。因此，冷却和除去步骤在氮气和空气中不含杂质的少量高纯度氧气的气体气氛下进行。因此，只有高纯度氧被引入到硅衬底和氧化物膜之间的界面中，从而可以提供高质量的氧化物膜。

3. 发明授权

US06472311B1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06472311B1
公开(公告)日：2002-10-29
申请号：US09719688
申请日：2000-12-15
申请人： Nagamasa Shiokawa
发明人： Nagamasa Shiokawa
IPC分类号： H01L214763
CPC分类号： H01L21/28518
摘要： To shorten a process for manufacturing a semiconductor device comprising a silicide and a non-silicide diffusion layers and to form a stable and highly homogenous non-silicide diffusion layer, ions are implanted to form a source/drain diffusion layer and then the substrate is subjected to rapid thermal oxidation in a short time to activate the ions while forming a new oxide film. A thermal oxide film (6) consisting of the new oxide film including a protective oxide film (3) is etched to form an oxide film for preventing silicidation (8), a Ti film (9) is formed over the whole surface including the oxide film for preventing silicidation (8), the product is annealed for silicidation and the unreacted Ti film (9) is removed. Thus, a diffusion layer (4) as a non-silicide layer which is little silicided and a diffusion layer (5) whose surface is a silicide layer (10) are formed.
摘要翻译：为了缩短用于制造包括硅化物和非硅化物扩散层的半导体器件的工艺，并且形成稳定和高均匀的非硅化物扩散层，注入离子以形成源/漏扩散层，然后对衬底进行在短时间内快速热氧化以激活离子同时形成新的氧化膜。蚀刻由包含保护氧化膜（3）的新的氧化物膜构成的热氧化膜（6），形成防止硅化的氧化膜（8），在包含氧化物的整个表面上形成Ti膜（9）防止硅化的膜（8），将产品退火以进行硅化处理，并除去未反应的Ti膜（9）。因此，形成硅化物少的非硅化物层的扩散层（4）和表面为硅化物层（10）的扩散层（5）。

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