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    • 4. 发明申请
    • INPUT CIRCUIT WITH MIRRORING
    • 输入电路与镜像
    • US20150137856A1
    • 2015-05-21
    • US14086150
    • 2013-11-21
    • NXP B.V.
    • Clemens Gerhardus Johannes de Haas
    • H03K3/012
    • H03K3/012H03K5/08
    • Various aspects are directed to providing an output/state based upon an input value. Consistent with one or more embodiments, an apparatus includes a bias circuit that is connected between power and common rails and includes first and second current paths that provide first and second reference currents. A current-mirroring circuit provides a first mirrored current in response to a voltage input transitioning in a first direction between voltage levels, and a second mirrored current in response to a voltage input transitioning in an opposite direction. A logic circuit operates in a first state based upon the first mirrored current and the first reference current, and operates in a second state based upon the second mirrored current and the second reference current.
    • 各方面针对基于输入值提供输出/状态。 根据一个或多个实施例,装置包括连接在功率和公共轨道之间的偏置电路,并且包括提供第一和第二参考电流的第一和第二电流路径。 电流镜像电路响应于在电压电平之间的第一方向上的电压输入转换和响应于在相反方向上的电压输入转换的第二镜像电流来提供第一镜像电流。 逻辑电路基于第一镜像电流和第一参考电流在第一状态下工作,并且基于第二镜像电流和第二参考电流在第二状态下操作。
    • 9. 发明授权
    • Comparator circuit
    • 比较器电路
    • US09331865B2
    • 2016-05-03
    • US14095036
    • 2013-12-03
    • NXP B.V.
    • Clemens Gerhardus Johannes de Haas
    • H04L12/40H04L12/12H03K5/24H03K19/0185
    • H04L12/40039H03K5/2472H03K19/018521H04L12/12
    • Various aspects are directed to communications, as may be implemented in an automotive network. An input transistor has a gate coupled to an input port and to a voltage-limiting circuit, connected between the gate and a power rail. The voltage-limiting circuit presents a voltage to the gate corresponding to a voltage on the input port and less than the supply voltage level, and clamps a gate-source voltage of the transistor. In a power-saving mode, current is blocked on the current path when the input port is at the supply or ground voltage levels. When the input port transitions away from the threshold voltage, the apparatus transitions to a wake-up mode in which current is no longer blocked in the current path and in which a wake-up signal is provided based on the voltage at the input port and a bias voltage.
    • 各种方面都针对通信,如可以在汽车网络中实现的。 输入晶体管具有耦合到输入端口和连接在栅极和电力轨道之间的限压电路的栅极。 电压限制电路向输入端口的电压施加与栅极相对应的电压,并且小于电源电压电平,并钳位晶体管的栅极 - 源极电压。 在省电模式下,当输入端口处于电源或接地电压电平时,电流在电流路径上被阻塞。 当输入端口转移离开阈值电压时,装置转换到唤醒模式,其中电流不再被阻塞在电流路径中,并且基于输入端口处的电压提供唤醒信号, 偏置电压。
    • 10. 发明申请
    • COMPARATOR CIRCUIT
    • 比较器电路
    • US20150156032A1
    • 2015-06-04
    • US14095036
    • 2013-12-03
    • NXP B.V.
    • Clemens Gerhardus Johannes de Haas
    • H04L12/40H04L12/12
    • H04L12/40039H03K5/2472H03K19/018521H04L12/12
    • Various aspects are directed to communications, as may be implemented in an automotive network. An input transistor has a gate coupled to an input port and to a voltage-limiting circuit, connected between the gate and a power rail. The voltage-limiting circuit presents a voltage to the gate corresponding to a voltage on the input port and less than the supply voltage level, and clamps a gate-source voltage of the transistor. In a power-saving mode, current is blocked on the current path when the input port is at the supply or ground voltage levels. When the input port transitions away from the threshold voltage, the apparatus transitions to a wake-up mode in which current is no longer blocked in the current path and in which a wake-up signal is provided based on the voltage at the input port and a bias voltage.
    • 各种方面都针对通信,如可以在汽车网络中实现的。 输入晶体管具有耦合到输入端口和连接在栅极和电力轨道之间的限压电路的栅极。 电压限制电路向输入端口的电压施加与栅极相对应的电压,并且小于电源电压电平,并钳位晶体管的栅极 - 源极电压。 在省电模式下,当输入端口处于电源或接地电压电平时,电流在电流路径上被阻塞。 当输入端口转移离开阈值电压时,装置转换到唤醒模式,其中电流不再被阻塞在电流路径中,并且基于输入端口处的电压提供唤醒信号, 偏置电压。