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1. 发明申请

US20130117548A1 ALGORITHM FOR VECTORIZATION AND MEMORY COALESCING DURING COMPILING 有权
标题翻译：在编译过程中进行视觉和记忆分析的算法
公开(公告)号：US20130117548A1
公开(公告)日：2013-05-09
申请号：US13660986
申请日：2012-10-25
申请人： NVIDIA Corporation
发明人： Vinod Grover , Manjunath Kudlur , Michael Murphy
IPC分类号： G06F9/30
CPC分类号： G06F8/443 , G06F8/41 , G06F8/433 , G06F8/4442 , G06F8/445 , G06F8/45 , G06F8/456 , G06F9/5066
摘要： One embodiment of the present invention sets forth a technique for reducing the number of assembly instructions included in a computer program. The technique involves receiving a directed acyclic graph (DAG) that includes a plurality of nodes, where each node includes an assembly instruction of the computer program, hierarchically parsing the plurality of nodes to identify at least two assembly instructions that are vectorizable and can be replaced by a single vectorized assembly instruction, and replacing the at least two assembly instructions with the single vectorized assembly instruction.
摘要翻译：本发明的一个实施例提出了一种用于减少包括在计算机程序中的组装指令数量的技术。该技术涉及接收包括多个节点的有向非循环图（DAG），其中每个节点包括计算机程序的汇编指令，分层解析多个节点以识别可向量化并且可以被替换的至少两个汇编指令通过单个向量化的组装指令，并用单个向量化的组装指令替换该至少两个组装指令。

2. 发明授权

US09134979B2 Convergence analysis in multithreaded programs 有权
标题翻译：多线程程序中的收敛分析
公开(公告)号：US09134979B2
公开(公告)日：2015-09-15
申请号：US13760946
申请日：2013-02-06
申请人： NVIDIA CORPORATION
发明人： Manjunath Kudlur
IPC分类号： G06F9/45
CPC分类号： G06F8/45 , G06F8/4451 , G06F8/456
摘要： A basic block within a thread program is characterized for convergence based on mapping the basic block to an indicator subnet within a corresponding Petri net generated to model the thread program. Each block within the thread program may be similarly characterized. Each corresponding Petri net is enumerated to generate a corresponding state space graph. If the state space graph includes an exit node with an odd execution count attribute, such as by Petri net coloring, then the corresponding basic block is divergent. The corresponding basic block is convergent otherwise. Using this characterization technique, a thread program compiler may advantageously identify all convergent blocks within a thread program and apply appropriate optimizations to the convergent blocks.
摘要翻译：线程程序中的基本块的特征在于基于将基本块映射到生成以对线程程序建模的相应Petri网内的指示符子网进行收敛。线程序中的每个块可以类似地表征。枚举每个相应的Petri网以产生相应的状态空间图。如果状态空间图包括具有奇数执行计数属性的退出节点，例如通过Petri网着色，则对应的基本块是不同的。否则相应的基本块是收敛的。使用该表征技术，线程程序编译器可以有利地识别线程程序内的所有收敛块，并对收敛块应用适当的优化。

3. 发明申请

US20140143755A1 SYSTEM AND METHOD FOR INSERTING SYNCHRONIZATION STATEMENTS INTO A PROGRAM FILE TO MITIGATE RACE CONDITIONS 审中-公开
标题翻译：将同步语句插入程序文件以减轻条件的系统和方法
公开(公告)号：US20140143755A1
公开(公告)日：2014-05-22
申请号：US13681554
申请日：2012-11-20
申请人： NVIDIA CORPORATION
发明人： Vinod Grover , Xiangyun Kong , Jae-Woo Lee , Manjunath Kudlur , Jian-Zhong Wang
IPC分类号： G06F9/44
CPC分类号： G06F8/458
摘要： A system and method are provided for inserting synchronization statements into a program file to mitigate race conditions. The method includes reading a program file and determining one or more convergent statements in the program file. The method also includes inserting one or more synchronization statements in the program file between the determined convergent statements. The method further includes removing one or more of the inserted synchronization statements and writing the modified program file. The method may include, after removing the inserted synchronization statements, identifying to a user any remaining inserted synchronization statements.
摘要翻译：提供了一种将同步语句插入到程序文件中以减轻竞争条件的系统和方法。该方法包括读取程序文件并确定程序文件中的一个或多个收敛语句。该方法还包括在确定的收敛语句之间的程序文件中插入一个或多个同步语句。该方法还包括移除插入的同步语句中的一个或多个并写入修改的程序文件。该方法可以在去除插入的同步语句之后，向用户标识任何剩余的插入的同步语句。

4. 发明申请

US20140149480A1 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR TRANSPOSING A MATRIX 审中-公开
标题翻译：用于传输矩阵的系统，方法和计算机程序产品
公开(公告)号：US20140149480A1
公开(公告)日：2014-05-29
申请号：US14062820
申请日：2013-10-24
申请人： NVIDIA Corporation
发明人： Bryan Christopher Catanzaro , Manjunath Kudlur
IPC分类号： G06F17/16
CPC分类号： G06F7/766
摘要： A system, method, and computer program product are provided for transposing a matrix. In use, a matrix is identified. Additionally, the matrix is transposed utilizing row-wise operations and column-wise operations, where the row-wise operations and the column-wise operations are performed independently.
摘要翻译：提供了一种用于转置矩阵的系统，方法和计算机程序产品。在使用中，识别出矩阵。另外，利用逐行操作和列逐行操作来矩阵被转置，其中行方式操作和列方式操作是独立执行的。

5. 发明申请

US20130305252A1 METHOD AND SYSTEM FOR HETEROGENEOUS FILTERING FRAMEWORK FOR SHARED MEMORY DATA ACCESS HAZARD REPORTS 有权
标题翻译：用于共享存储器数据访问危害报告的异构过滤框架的方法和系统
公开(公告)号：US20130305252A1
公开(公告)日：2013-11-14
申请号：US13728968
申请日：2012-12-27
申请人： NVIDIA CORPORATION
发明人： Vyas Venkataraman , Manjunath Kudlur , Vinod Grover
IPC分类号： G06F3/06
CPC分类号： G06F3/0653 , G06F9/4881 , G06F9/4887 , G06F11/0715 , G06F11/0751
摘要： A system and method for detecting, filtering, prioritizing and reporting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises initialization information for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a potential conflict by identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. First information associated with a first access and second information associated with the second access to the location is determined. Filter criteria is applied to the first and second information to determine whether the instruction causes a reportable hazard. The instruction is reported when it causes the reportable hazard.
摘要翻译：公开了一种用于检测，过滤，优先排序和报告共享内存危害的系统和方法。该方法包括对于在线程块上操作的硬件单元，将分配给该单元的多个共享存储器位置映射到跟踪表。跟踪表包括每个共享存储器位置的初始化信息。该方法还包括对于屏障区域内的程序的指令，通过识别由硬件单元执行的线程块内的共享存储器中的位置的第二访问来识别潜在的冲突。确定与第一访问相关联的第一信息和与对该位置的第二访问相关联的第二信息。过滤标准被应用于第一和第二信息以确定该指令是否导致可报告的危险。当导致可报告的危险时，报告该指令。

6. 发明授权

US09639336B2 Algorithm for vectorization and memory coalescing during compiling 有权
公开(公告)号：US09639336B2
公开(公告)日：2017-05-02
申请号：US13660986
申请日：2012-10-25
申请人： NVIDIA Corporation
发明人： Vinod Grover , Manjunath Kudlur , Michael Murphy
IPC分类号： G06F9/44 , G06F9/45 , G06F9/50
CPC分类号： G06F8/443 , G06F8/41 , G06F8/433 , G06F8/4442 , G06F8/445 , G06F8/45 , G06F8/456 , G06F9/5066
摘要： One embodiment of the present invention sets forth a technique for reducing the number of assembly instructions included in a computer program. The technique involves receiving a directed acyclic graph (DAG) that includes a plurality of nodes, where each node includes an assembly instruction of the computer program, hierarchically parsing the plurality of nodes to identify at least two assembly instructions that are vectorizable and can be replaced by a single vectorized assembly instruction, and replacing the at least two assembly instructions with the single vectorized assembly instruction.

7. 发明授权

US09038080B2 Method and system for heterogeneous filtering framework for shared memory data access hazard reports 有权
标题翻译：用于共享内存数据访问危害报告的异构过滤框架的方法和系统
公开(公告)号：US09038080B2
公开(公告)日：2015-05-19
申请号：US13728968
申请日：2012-12-27
申请人： NVIDIA Corporation
发明人： Vyas Venkataraman , Manjunath Kudlur , Vinod Grover
IPC分类号： G06F9/46 , G06F3/06 , G06F9/48 , G06F11/07
CPC分类号： G06F3/0653 , G06F9/4881 , G06F9/4887 , G06F11/0715 , G06F11/0751
摘要： A system and method for detecting, filtering, prioritizing and reporting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises initialization information for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a potential conflict by identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. First information associated with a first access and second information associated with the second access to the location is determined. Filter criteria is applied to the first and second information to determine whether the instruction causes a reportable hazard. The instruction is reported when it causes the reportable hazard.
摘要翻译：公开了一种用于检测，过滤，优先排序和报告共享内存危害的系统和方法。该方法包括对于在线程块上操作的硬件单元，将分配给该单元的多个共享存储器位置映射到跟踪表。跟踪表包括每个共享存储器位置的初始化信息。该方法还包括对于屏障区域内的程序的指令，通过识别由硬件单元执行的线程块内的共享存储器中的位置的第二访问来识别潜在的冲突。确定与第一访问相关联的第一信息和与对该位置的第二访问相关联的第二信息。过滤标准被应用于第一和第二信息以确定该指令是否导致可报告的危险。当导致可报告的危险时，报告该指令。

8. 发明申请

US20140223420A1 CONVERGENCE ANALYSIS IN MULTITHREADED PROGRAMS 有权
标题翻译：多元化程序的综合分析
公开(公告)号：US20140223420A1
公开(公告)日：2014-08-07
申请号：US13760946
申请日：2013-02-06
申请人： NVIDIA CORPORATION
发明人： Manjunath Kudlur
IPC分类号： G06F9/45
CPC分类号： G06F8/45 , G06F8/4451 , G06F8/456
摘要： A basic block within a thread program is characterized for convergence based on mapping the basic block to an indicator subnet within a corresponding Petri net generated to model the thread program. Each block within the thread program may be similarly characterized. Each corresponding Petri net is enumerated to generate a corresponding state space graph. If the state space graph includes an exit node with an odd execution count attribute, such as by Petri net coloring, then the corresponding basic block is divergent. The corresponding basic block is convergent otherwise. Using this characterization technique, a thread program compiler may advantageously identify all convergent blocks within a thread program and apply appropriate optimizations to the convergent blocks.
摘要翻译：线程程序内的一个基本块的特征在于基于将基本块映射到生成以对线程程序建模的相应Petri网内的指示符子网进行收敛。线程序中的每个块可以类似地表征。枚举每个相应的Petri网以产生相应的状态空间图。如果状态空间图包括具有奇数执行计数属性的退出节点，例如通过Petri网着色，则对应的基本块是不同的。否则相应的基本块是收敛的。使用该表征技术，线程程序编译器可以有利地识别线程程序内的所有收敛块，并对收敛块应用适当的优化。

9. 发明申请

US20130304996A1 METHOD AND SYSTEM FOR RUN TIME DETECTION OF SHARED MEMORY DATA ACCESS HAZARDS 审中-公开
标题翻译：用于运行时间检测共享存储器数据访问危险的方法和系统
公开(公告)号：US20130304996A1
公开(公告)日：2013-11-14
申请号：US13728990
申请日：2012-12-27
申请人： NVIDIA CORPORATION
发明人： Vyas Venkataraman , Jaydeep Marathe , Manjunath Kudlur , Vinod Grover , Geoffrey Gerfin , Alban Douillet , Mayank Kaushik
IPC分类号： G06F3/06
CPC分类号： G06F3/067 , G06F11/0715 , G06F11/073 , G06F11/0751
摘要： A system and method for detecting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises an initialization bit as well as access type information, collectively called the state tracking bits for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. The second access is identified based on a status of the state tracking bits. The method also includes determining a hazard based on a first type of access and a second type of access to the shared memory location. Information related to the first access is provided in the table.
摘要翻译：公开了一种用于检测共享内存危害的系统和方法。该方法包括对于在线程块上操作的硬件单元，将分配给该单元的多个共享存储器位置映射到跟踪表。跟踪表包括初始化位以及访问类型信息，统称为用于每个共享存储器位置的状态跟踪位。该方法还包括对于屏障区域内的程序的指令，识别由硬件单元执行的线程块内的共享存储器中的位置的第二访问。基于状态跟踪位的状态来识别第二访问。该方法还包括基于第一类型的访问确定危险，以及对共享存储器位置进行第二类型的访问。与第一次访问相关的信息在表中提供。

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