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1. 发明申请

US20160233897A1 TRANSMITTER AND TRANSMISSION CONTROL METHOD 有权
标题翻译：发射机和传输控制方法
公开(公告)号：US20160233897A1
公开(公告)日：2016-08-11
申请号：US15023719
申请日：2014-06-03
申请人： NEC CORPORATION
发明人： Masaaki TANIO
IPC分类号： H04B1/04 , H03F3/24 , H03F3/193 , H03F3/217 , H03F1/32
CPC分类号： H04B1/0475 , H03F1/3247 , H03F3/193 , H03F3/2171 , H03F3/245 , H03F3/3022 , H03F2200/331 , H03F2200/336 , H03F2200/408 , H03F2200/451
摘要： A transmitter according to the present invention includes: a baseband amplitude value distribution processor (90) for changing a distribution of an amplitude value of a baseband signal based on a control signal that has been input and outputting the baseband signal as an output signal; a digital transmitter (91) that ΔΣ modulates the output signal and transmits the modulated signal; an in-band distortion measurement unit (92) for measuring an in-band distortion amount of the output signal; an amplitude value distribution measurement unit (93) for calculating an amplitude value distribution of the output signal; a sideband distortion prediction unit (94) for predicting a sideband distortion amount occurring in the output signal by the digital transmitter (91) from the calculated amplitude value distribution; and a baseband processing controller (95) for adjusting the control signal based on the measured in-band distortion amount and the sideband distortion amount and outputting the adjusted signal.
摘要翻译：根据本发明的发射机包括：基带振幅值分布处理器，用于根据输入的控制信号改变基带信号的振幅值的分布，并输出基带信号作为输出信号; 数字发送器（91），ΔΣ调制输出信号并发送调制信号; 用于测量输出信号的带内失真量的带内失真测量单元（92）; 用于计算输出信号的振幅值分布的振幅值分布测量单元（93）边带失真预测单元，用于根据所计算的振幅值分布来预测由数字发射机（91）产生的输出信号中的边带失真量; 以及基带处理控制器（95），用于基于测量的带内失真量和边带失真量来调整控制信号，并输出调整后的信号。

2. 发明申请

US20180248724A1 DELTA-SIGMA MODULATOR, TRANSMITTER, AND INTEGRATOR 审中-公开
公开(公告)号：US20180248724A1
公开(公告)日：2018-08-30
申请号：US15755191
申请日：2015-09-01
申请人： NEC Corporation
发明人： Masaaki TANIO , Tomoyuki YAMASE , Shinichi HORI
IPC分类号： H04L27/12 , H04B1/04 , H03M3/00 , G06F7/544
CPC分类号： H04L27/12 , G06F7/544 , H03K19/21 , H03M3/39 , H03M3/50 , H03M7/3017 , H04B1/04 , H04B2001/0408
摘要： This ΔΣ modulator is a ΔΣ modulator using multiple integrators. The integrator: includes a plurality of stages of adder sequences, each of the adder sequences including a plurality of adders connected in series; performs feedback of a result of a second adder sequence as an input to a first adder sequence, the first adder sequence being a first stage of the plurality of stages, and the second adder sequence being a last stage of the plurality of stages; and processes inputs supplied to the plurality of adders of the first adder sequence and supplies it to the second adder sequence.

3. 发明申请

US20170331491A1 DELTA-SIGMA MODULATOR AND MODULATION METHOD, TRANSMISSION DEVICE, AND TRANSMISSION METHOD 有权
公开(公告)号：US20170331491A1
公开(公告)日：2017-11-16
申请号：US15528164
申请日：2015-11-18
申请人： NEC Corporation
发明人： Masaaki TANIO , Shinichi HORI
IPC分类号： H03M7/30 , H04B14/06 , H03M3/02 , G06F7/60 , H03L7/197 , H03L7/081 , H03F3/24 , H04L27/36
CPC分类号： H03M7/304 , G06F7/602 , H03F3/2171 , H03F3/24 , H03F3/245 , H03L7/0816 , H03L7/1976 , H03M3/02 , H03M3/37 , H03M3/502 , H03M7/3011 , H03M7/3015 , H04B14/062 , H04L27/36
摘要： The purpose of the present invention is to provide a high-power-efficiency and low-design-cost transmission device by implementing, with a constant clock, delta-sigma modulation maintaining a zero current switching property in an amplifier. This delta-sigma modulator comprises: a pulse phase signal generation unit for generating a pulse phase signal from a phase signal; a delta-sigma modulation unit for generating a pulse amplitude signal obtained by delta-sigma modulating an amplitude signal with a constant clock; a phase sorting unit for outputting a control signal on the basis of the phase signal; a delay switching unit for delaying the pulse amplitude signal on the basis of the control signal; and a mixing unit for outputting a pulse string obtained by multiplying together the delayed pulse amplitude signal and the pulse phase signal.

4. 发明申请

US20220360231A1 DOHERTY POWER AMPLIFIER 有权
公开(公告)号：US20220360231A1
公开(公告)日：2022-11-10
申请号：US17430036
申请日：2020-02-12
申请人： NEC Corporation
发明人： Masaaki TANIO
IPC分类号： H03F1/02 , H03F1/22 , H03F1/56 , H03F3/193
摘要： An input signal is input to a main power amplifier and an auxiliary power amplifier. A combiner is connected to an output of the main power amplifier and an output of the auxiliary power amplifier. The combiner includes an impedance converter, first and second lumped elements. The impedance converter is connected to a combining point. The first lumped element is connected between the output of the main power amplifier and the combining point. The second lumped element is connected between the output of the auxiliary power amplifier and the combining point. A line length between the output of the main power amplifier and the combining point is the same as that between a line length between the output of the auxiliary power amplifier and the combining point.

5. 发明申请

US20200014412A1 TRANSMITTER, COMMUNICATION SYSTEM, CONTROL METHOD, AND PROGRAM 审中-公开
公开(公告)号：US20200014412A1
公开(公告)日：2020-01-09
申请号：US16483467
申请日：2017-02-08
申请人： NEC Corporation
发明人： Wataru HATTORI , Masaaki TANIO
IPC分类号： H04B1/04 , H04B1/40 , H04B1/00 , H04B7/0417
摘要： A transmitter includes a plurality of transmitter circuits configured to generate signals that are within the same frequency band; and a feedback circuit that is shared by the plurality of transmitter circuits, the feedback circuit being configured to feed back a part of a transmission amplification signal to a transmitter circuit, the transmission amplification signal being output from each of the plurality of transmitter circuits through a transmission amplifier, and the transmitter circuit being configured to output the transmission amplification signal among the plurality of transmitter circuits. The feedback circuit includes a frequency selective extraction unit configured to extract different-band signals in frequency bands from the transmission amplification signal, the frequency bands being different from each other, a synthesis unit configured to synthesize the different-band signals extracted by the frequency selective extraction unit, and to generate a synthesis signal, a frequency conversion unit configured to frequency-convert the synthesis signal generated by the synthesis unit by using a local signal of the same frequency, the local signal being common to a plurality of transmission paths, and a distortion compensation coefficient calculation unit configured to calculate a distortion compensation coefficient based on signals of frequency bands of the different-band signals, the distortion compensation coefficient being used when compensating for distortion of signals in outputs of the plurality of transmitter circuits.

6. 发明申请

US20230054311A1 DELTA-SIGMA MODULATION APPARATUS, DELTA-SIGMA MODULATION METHOD, AND RECORDING MEDIUM 有权
公开(公告)号：US20230054311A1
公开(公告)日：2023-02-23
申请号：US17881152
申请日：2022-08-04
申请人： NEC Corporation
发明人： Masaaki TANIO , Naoto ISHII , Kazushi MURAOKA
IPC分类号： H03M3/00
摘要： A delta-sigma modulation apparatus performs delta-sigma modulation on a first signal as an input signal and outputs a second signal, outputs, using the second signal and a third signal generated through a transmission process of the second signal, a fourth signal that is an approximated value of a signal which is generated through at least part of the transmission process, and performs the delta-sigma modulation on the first signal using the fourth signal and outputs the second signal.

7. 发明申请

US20220345163A1 PARAMETER DETERMINATION APPARATUS, SIGNAL TRANSMISSION APPARATUS, PARAMETER DETERMINATION METHOD, SIGNAL TRANSMISSION METHOD AND RECORDING MEDIUM 有权
公开(公告)号：US20220345163A1
公开(公告)日：2022-10-27
申请号：US17641187
申请日：2020-09-02
申请人： NEC Corporation
发明人： Masaaki TANIO , Norifumi KAMIYA , Naoto ISHII
IPC分类号： H04B1/04 , G06N3/08
摘要： A parameter determination apparatus (2) includes: a first learning device (2111) learning a weight between a [j−1]-th layer (j is an integer that satisfies a condition that “2≤j≤the number of the layer”) and a [j]-th layer to which an output of the [j−1]-th layer is inputted among a plurality of layers of a neural network; a selecting device (2112) selecting at least one valid path for each node included in the [j]-th layer from a plurality of connection paths that connect nodes in the [j−1]-th layer and nodes in the [j]-th layer, respectively, on the basis of the weight learned by the first learning device; and a second learning device (2113) learning at least one of the weight and a bias as the parameters relating to a network structure between the [j−1]-th layer and the [j]-th layer on the basis of the sample signal, the label signal and the valid path.

8. 发明申请

US20180262219A1 DIGITAL TRANSMITTER 审中-公开
公开(公告)号：US20180262219A1
公开(公告)日：2018-09-13
申请号：US15760683
申请日：2016-09-23
申请人： NEC Corporation
发明人： Masaaki TANIO , Shinichi HORI , Tomoyuki YAMASE
IPC分类号： H04B1/02 , H03F3/19 , H03K5/133 , H03K5/135 , H03F3/21 , H04L27/20
CPC分类号： H04B1/02 , H03F3/19 , H03F3/211 , H03F3/2175 , H03F3/245 , H03F2200/171 , H03F2200/331 , H03F2200/336 , H03F2200/451 , H03F2203/21106 , H03F2203/21142 , H03F2203/21157 , H03K5/133 , H03K5/135 , H03K2005/00019 , H03K2005/00234 , H04L27/00 , H04L27/20 , H04M1/6008
摘要： In a digital transmitter, a digital RF signal generation unit executes digital modulation on I and Q signals to convert the I and Q signal into first and second digital RF signals , respectively, with a bit rate which is twice a carrier frequency. A retiming unit delays the first digital RF signal according to a clock signal with a frequency which is 4n times (n is an integer) the carrier frequency to output the delayed first digital RF signal and delays the phase of the second digital RF signal by 90 degrees with respect to an output of the first digital RF signal to output the delayed second digital RF signal. First and second amplifiers amplify the first and second digital RF signals output by the retiming unit, respectively. A combiner combines the amplified first and second digital RF signals to generate one signal sequence.

9. 发明申请

US20210297125A1 TRANSMITTER AND METHOD OF CONTROLLING TRANSMITTER 有权
公开(公告)号：US20210297125A1
公开(公告)日：2021-09-23
申请号：US16336514
申请日：2017-09-20
申请人： NEC CORPORATION
发明人： Masaaki TANIO , Shinichi HORI , Tomoyuki YAMASE
IPC分类号： H04B7/06 , H04B7/10 , H04L7/00
摘要： This transmitter is provided with: a digital delay circuit which delays a 1-bit digital RF signal on the basis of another 1-bit digital RF signal; an amplifier which amplifies a signal output by the digital delay circuit; and a band-pass filter which allows signals in a prescribed frequency band, from among signals output by the amplifier, to pass. A signal output by the band-pass filter is input into a corresponding one antenna element from among a plurality of antenna elements, and controls the directionality of a beam formed by the plurality of antenna elements.

10. 发明申请

US20210218413A1 SECOND-ORDER DELTA-SIGMA MODULATOR, RADIO, AND SIGNAL PROCESSING METHOD PERFORMED BY SECOND-ORDER DELTA-SIGMA MODULATOR 有权
公开(公告)号：US20210218413A1
公开(公告)日：2021-07-15
申请号：US16769177
申请日：2018-12-04
申请人： NEC Corporation
发明人： Masaaki TANIO
IPC分类号： H03M3/00 , H03K19/21 , H03K5/01 , H04B1/04 , H04B1/16
摘要： A second-order ΔΣ modulator includes: a two-stage integrator; a first arithmetic operation circuit; and a second arithmetic operation circuit. The two-stage integrator includes a plurality of adder arrays, each of which includes a plurality of adders. The plurality of adder arrays includes first to fourth adder arrays. An output of a last stage of the second adder array is fed back as an input of a first stage of the first adder array. An output of a last stage of the fourth adder array is fed back as an input of a first stage of the third adder array. A sum bit string obtained in the first adder array is input to the third adder array. A sum bit string obtained in the second adder array is input to the fourth adder array.

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